Dell Studio 1555 - Quanta FM9

1
FM9 XXXX Intel Discrete GFX
VER : 1A
PWA:
PWB:
FAN & THERMAL

SMSC1422
POWER
SYSTEM
RESET CIRCUIT
BATT
CHARGER
AC/BATT
CONNECTOR
PG 53
PG 38
CLOCK
PG 42
SLG8SP585VTR
(QFN-32)
PG 15
Auburndale/
Clarksfield
PG 45
RUN POWER SW
REGULATOR
PCIEx16
PG 47
+1.05V
PG 48
+1.1V_DDR_VTT
PG 49
ATI M92-XT
DDR3-SODIMM1
PG 13
Dual Channel DDR3

800/1067/1333 1.5V
( rPGA 989 )
DDR3-SODIMM2
HDMI
VGA
PG 16,17,18,19,21,22
PG 51
DC/DC
+3.3V_ALW/+5V_ALW/
+15V_ALW
PG 46
VGA Core
Panel Connector
PG 50
PG 24
B
HDMI CONN.
PG 24
CRT CONN.
PG 25
PG 3,4,5,6
PG 14
SATA
SATA-ODD
FDI
PG 35
SATA-HDD
& Fall Sensor PG 35
SATA
PI2EQX3211BHE
SATA
DMI X 4
E-SATA Combo
with USB CONN PG 33
LAN
RTL8111DL\RJ45\Transformer
USB conn x 3
PG 33, 34
USB2.0 x 3
PCIEx1
PCIEx1
PCH
C
PCI EXPRESS GFX
DDR3 x 4
(512M 64bits)
PG 20
CPU VR
+1.5V_SUS/+0.75V_DDR_VTT
LVDS
PG 52
POWER
+3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V
PG 41
EXPRESS/Card Reader CONN.
USB2.0
PG 28
PG 33
PCIEx2
IHDA
USB2.0
MINI-CARD
WLAN
USB2.0
PG 32
AUDIO/AMP
92HD73C
PG 39
Audio
SPK conn
PG 39
Camera + D-MIC
PG 40
PG 7,8,9,10,11,12
MINI-CARD
WWAN
USB2.0
Bluetooth BTB Conn
LPC
Audio
Jacks x3
PG 40
PG 31
PG 32
KBC
ITE8502
17X8
PG 29
Keyboard
SPI
USER
INTERFACE
PG 37
FLASH
2Mbyts
PG 36
QUANTA
COMPUTER
Touchpad
Title
Schematic Block Diagram1
PG 30
1
PS/2
PG 36
4
Size
Document Number
FM9
Date:
Thursday, February 26, 2009

7
Rev
1A
Sheet
of
8
64
Table of Contents
PAGE
Schematic Block Diagram
Front Page
3-6
Clarksfield/Auburndale
7-12
PCH
13-14
DDRIII SO-DIMM(204P)
15
16-22
Clock Generator
M92-S2-XT
23
BLANK PAGE
24
LCD CONN / HDMI CONN
25
CRT CONN
26
OZ888GS0L3N
27
BLANK PAGE
28
Express/CRard/1394
29
SIO (ITE8512)
30
FLASH / RTC
31
MINI-Card (WWAN)
32
MINI-Card (WLAN\WPAN)
33
Left PUSB/ESATA
34
Right USB
35
SATA (HDD & CD_ROM)
36
TP / KEYBOARD
37
SWITCH / /LED
38
FAN / THERMAL
39
Azelia CODEC
40
AUDIO CONN
41
LAN(RTL8111DL/RJ-45)
42
System Reset Circuit
43
Blank Page
44
1.8V_RUN(RT9018/RT9024)
45
Charger (ISL88731)
46
3V/5V (TPS51427A)
47
1.5_DDR/0.75(TPS51116)
48
1.05V_PCH(TPS51218)
49
1.1_VTT(TPS51218)
50
VGA_M92-XT(MAX8792)
51
V_CORE(ISL62882)
52
Run Power Switch
53
DCin & Batt
54
PAD & SCREW
55
EMI CAP
56
SMBUS BLOCK
57
THERMAL MAP
58
Power Block Diagram
59
XDP
Power States
DESCRIPTION
POWER PLANE
VOLTAGE
+PWR_SRC
10V~+19V
+RTC_CELL
+3.0V~+3.3V
PAGE
CONTROL
SIGNAL
DESCRIPTION
24,30,45,46,47,48,49,50,51
MAIN POWER
ACTIVE IN
S0~S5
08,11,29,30
RTC
+3.3V_ALW
+3.3V
08,29,30,35,36,37,42,44,45,46,47,52,53
8051 POWER
ALWON
S0~S5
+5V_ALW2
+5V
37,46,53
LARGE POWER
RUN_ON
S0~S5
+3.3V_LAN
+3.3V
41
LAN POWER
AUX_ON
+5V_SUS
+5V
11,33,34,35,37,51,52
SLP_S5# CTRLD POWER
SUS_ON
+3.3V_SUS
+3.3V
7,09,10,11,13,14,19,24,26,28,29,37,41,42,44
,48,49,50,51,52
SLP_S5# CTRLD POWER
SUS_ON
+1.5V_SUS
+1.8V
03,05,13,14,47,50,52
SODIMM POWER
SUS_ON
+0.75V_DDR_VTT
+0.9V
13,14,47,52
SODIMM POWER
RUN_ON
+5V_RUN
+5V
11,18,24,25,35,36,38,39,40,52
SLP_S3# CTRLD POWER
RUN_ON
+3.3V_RUN
+3.3V
3,7,8,9,10,11,13,14,15,17,24,25,26,28,29,30
,31,32,33,35,37,38,39,40,41,42,46,51,52,59
SLP_S3# CTRLD POWER
RUN_ON
+1.8V_RUN
+1.8V
05,11,26,44,52
SDVO POWER
RUN_ON
+1.5V_RUN
+1.5V
11,18,19,20,28,31,32,52
CALISTOGA/ICH9 POWER
RUN_ON
+1.25V
17,18,21,22,44,52
VGA POWER
RUN_ON
18,21,50
VGA POWER
RUN_ON
08,09,11,15,48
CPU/CALISTOGA/ICH8 POWER 1.05V_RUN_ON
+1.8V_RUN_GFX
+VCC_GFX_CORE
+0.9V~+1.2V
+1.05V_PCH
+VCC_CORE
+1.05V
+0.7V~+1.77V
S0~S5
05,51
CPU CORE POWER
IMVP_VR_ON
+LCDVCC
+3.3V
26
LCD Power
LCDVCC_TST_EN
& ENVDD
+5V_MOD
+5V
36
Module Power
MODC_EN
HDD Power
HDDC_EN
+5V_HDD
+5V
36
+1.1V_VTT
+1.1V
03,05,10,11,49,59
+1.1V_GFX_PCIE
+1.1V
18,50
GND PLANE
PAGE
GND_CHG
DESCRIPTION
46
GND_1.05V
47
GND_VGA
50
GND_SIGNAL
51
AGND_DC/DC
52
GND
ALL
QUANTA
COMPUTER
Title
Index & Power Status
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
of
8
64
AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)
AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)
SC(V1.0),P11: Should be shorted at the pins

and then routed to one end of the 49.9- 1%
resistor, pulled-down to GND on the board.
U3031A
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
F17
E17
FDI_FSYNC[0]
FDI_FSYNC[1]
C17
FDI_INT
F18
D17
FDI_LSYNC[0]
FDI_LSYNC[1]
R762
1K
PCIE_MRX_GTX_P15
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P0
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
0214
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
DG(V1.0),P79: should be tied to GND

(through 1K 5% resistors),
if these signals are left floating,
there are nofunctional impacts
but a small amount of power (~15 mW)
maybe wasted.
DG(V1.1) P83:
FDI_FSYNC[0], FDI_FSYNC[1],
FDI_LSYNC[0],FDI_LSYNC[1]
can be ganged together
with one resistor.
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
PCIE_MTX_GRX_C_N15
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N0
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PCIE_MTX_GRX_C_P15
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P0
10
PCIE_MRX_GTX_P[0..15]
R751
H_PECI
COMP2
G16
COMP1
H_COMP0
AT26
COMP0
TP_SKT0CC# AH24
AK14
CATERR#
H_PECI_ISO
AT15
PECI
H_PROCHOT#_D
16
10
R755
H_THERM
60
H_CPURST#
PM_SYNC
SC(V1.0),P17,35:
This signal should be connected to
the processor's VCCPWRGOOD_1
and VCCPWRGOOD_0 input to
10,60 H_PWRGOOD
indicate when the
processor power is valid.
AP26
PROCHOT#
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
42 H_VTTPWRGD
AM15
VTTPWRGOOD
60 H_PWRGD_XDP
AM26
TAPPWRGOOD
AL14
RSTIN#
9,16,26,28,29,31,32,41
PLTRST#
R776
1.5K/F
C1175
C1177
C1179
C1181
C1183
C1185
C1187
C1189
C1191
C1193
C1195
C1197
C1199
C1201
C1203
C1205
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
PCIE_MTX_GRX_N[0..15]
+1.5V_SUS
PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P15
R778
4.75K/F
PM_DRAM_PWRGD
R779
12K/F
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
C1176
C1178
C1180
C1182
C1184
C1186
C1188
C1190
C1192
C1194
C1196
C1198
C1200
C1202
C1204
C1206
PEG_CLK
PEG_CLK#
E16
D16
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
A18
A17
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
SM_DRAMPWROK:
DG(V1.0) P311&SC(V1.0) P18:recommend 4.75-k
pull-up to DDR3 Power Rail (VDDQ) of +V1.5U
and a 12-k pull-down to ground to convert
to processors VTT level.
CRB(V1.0) P11:CRB uses a 3.3V (always ON) rail
with 2K and 1K combination. CRB Implementation
is different for the Calpella Platform Design Guide.
Customers to
follow the latest Calpella Platform Design
Guide for DRAMPWROK Implementation.
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P[0..15]
CLK_PCIE_3GPLL 9
CLK_PCIE_3GPLL# 9
DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND
on Auburndale directly if motherboard
only supports discrete graphics.
F6
DDR3_DRAMRST#
13,14
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
AL1
AM1
AN1
+1.1V_VTT
R752
R753
R754
R756
PM_EXT_TS#[0]
PM_EXT_TS#[1]
AN15
AP15
PRDY#
PREQ#
AT28
AP27
XDP_PREQ#
TCK
TMS
TRST#
AN28
AP28
AT27
XDP_TCLK
XDP_TMS
XDP_TRST#
TDI
TDO
TDI_M
TDO_M
AT29
AR27
AR29
AP29
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
DBR#
AN25
H_DBR#_R
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
XDP_OBS0_R
XDP_OBS1_R
XDP_OBS2_R
XDP_OBS3_R
XDP_OBS4_R
XDP_OBS5_R
XDP_OBS6_R
XDP_OBS7_R
RSTIN#:
DG(V1.11)(Doc.# 414044),P10:
0214
Need a voltage divider
network to scale down from
3.3V (PCH driven) to 1.05V/1.1V (Clarksfield/Auburndale)
10K/F
10K/F
0
0
PM_EXTTS#0 13
PM_EXTTS#1 14
CRB(v0.71) P.11
XDP_PRDY# 60
XDP_PREQ# 60
R1065
*12.4K/F_NC
XDP_TCLK 60
XDP_TMS 60
XDP_TRST# 60
T186
T168
T169
2
R759
R758
R760
R761
R763
R764
R766
R767
R769
0
0
0
0
0
0
0
0
XDP_DBRESET#
XDP_OBS[0:7]
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
7,60
60
DBR#:(Intell feedback)
Nothing wrong w/ CRB design. If you want to
connect it to PCH directly, make sure pull high
to 3.3V (S0) main power.
+3.3V_RUN
PM_THRMTRIP#
H_THERM 2
1
46
JTAG MAPPING
R28
10M
2
Q6
2N7002W-7-F
C24
0.1U
10
XDP_TDI_R
R780
R781
*0_NC
XDP_TDI 60
XDP_TDO_M
XDP_TDO 60
XDP_TRST#
R783
16
R784
51
SM_DRAMPWROK:(Intell Feedback)
Either way works.
XDP_TDI_M
R785
*0_NC
R786
XDP_TDO_R
T188
+1.1V_VTT
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
CRB(V1.0) P11:
T187
is it necessery?
Processor Compensation Signals
+1.1V_VTT
Processor
Pullups
16
BCLK_ITP 60
BCLK_ITP# 60
DBR#:
SC(V1.0) P22:Connected to the DBR# pin of the Processor.50- to 5-k pull-up to 3.3VS
CRB(V1.0) P11,P71:CRB uses a 1-k pull-up to 3.3VS.
On the CRB this signal is ANDed with Master Reset to generate SYS_RESET.
Q7
MMST3904-7-F
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
BCLK_ITP
BCLK_ITP#
R777
750/F
PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N15
CLK_CPU_BCLK 10
CLK_CPU_BCLK# 10
AR30
AT30
SM_DRAMRST#
THERMTRIP#
AN27
PM_DRAM_PWRGD
7 PM_DRAM_PWRGD
VTTPWRGOOD
SC(V1.0)P18:
VTT_1.1 VR power good signal
to processor. Signal voltage level
is 1.1 V.
AN26
AK15
H_CPURST#
SKTOCC#
H_CATERR#
A16
B16
BCLK
BCLK#
PWR MANAGEMENT
D22
C21
D20
C18
G22
E20
F20
G19
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
Intel(R) FDI
E22
D21
D19
D18
G21
E19
F21
G18
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
T182
COMP3
H_COMP1
CLOCKS
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
16
AT24
D25
F24
E23
G23
PCIE_MRX_GTX_N[0..15]
AT23
H_COMP2
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
PCIE_MRX_GTX_N15
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N0
H_COMP3
DDR3
MISC
7
7
7
7
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
U3031B
SC(V1.0),P17:
SKTOCC#
Can be left No Connect
or tied to GND
JTAG & BPM
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
750/F
D24
G24
F23
H23
49.9/F
R744
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
R742
B26
A26
B27
A25
THERMAL
7
7
7
7
PEG_ICOMPI
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
PCI EXPRESS -- GRAPHICS
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
B24
D23
B23
A22
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI
7
7
7
7
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
MISC
7
7
7
7
A24
C23
B22
A21
R787
R788
R789
R790
*51_NC
*51_NC
*51_NC
*51_NC
Scan Chain
(Default)
STUFF -> R780, R783, R786

NO STUFF -> R781, R785
CPU Only
STUFF -> R780, R781

NO STUFF -> R783, R785, R786
GMCH Only
STUFF -> R785, R786

NO STUFF -> R780, R781, R783
DDR3 Compensation Signals
H_COMP0
SM_RCOMP_2
TRST#
SC(V1.0)P22:
should be routed as a single
daisy chain to all loads and
terminated at the end of the trace.
51 5% pull down resistor.
CRB()V1.0)P11
DG(v1.0) table 27
H_COMP1
R793
49.9/F
R794
49.9/F
R795
*68_NC
SM_RCOMP_1
SC(1.0V),P17:
H_PROCHOT#D
use: pull to 68 ohm
if it isn'tt used: pull to 50 ohm
H_COMP2
SM_RCOMP_0
H_COMP3
H_CATERR#
R796
49.9/F
SC(1.0V),P17:
H_CATERR#
49.9- 1% Pull-Up to the VTT rail
(+V1.1S_VTT)
H_PROCHOT#_D
H_CPURST#
R797
49.9/F
R798
20/F
R799
20/F
R800
130/F
R802
100/F
Layout Note: Place

these resistors
near Processor
DG(V1.0),P83:
SM_RCOMP[0] 100- 1% pull-down to GND
SM_RCOMP[1] 24.9- 1% pull-down to GND
SM_RCOMP[2] 130- 1% pull-down to GND
DG(V1.0),P17:
COMP[0.1] 49.9- 1% pull-down to GND
COMP[2.3] 20- 1% pull-down to GND
R801
24.9/F
Title
QUANTA
COMPUTER
AUBURNDA 1/4
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
of
64
AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U3031D
U3031C
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
13
13
13
M_A_BS0
M_A_BS1
M_A_BS2
AC3
AB2
U7
SA_BS[0]
SA_BS[1]
SA_BS[2]
13
13
13
M_A_CAS#
M_A_RAS#
M_A_WE#
AE1
AB3
AE9
SA_CAS#
SA_RAS#
SA_W E#
DDR SYSTEM MEMORY A
13 M_A_DQ[63:0]
14 M_B_DQ[63:0]
AA6
AA7
P7
M_A_CLK0 13
M_A_CLK0# 13
M_A_CKE0 13
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
Y6
Y5
P6
M_A_CLK1 13
M_A_CLK1# 13
M_A_CKE1 13
SA_CS#[0]
SA_CS#[1]
AE2
AE8
M_A_CS0# 13
M_A_CS1# 13
SA_ODT[0]
SA_ODT[1]
AD8
AF9
M_A_ODT0 13
M_A_ODT1 13
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
B9
D7
H7
M7
AG6
AM7
AN10
AN13
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
C9
F8
J9
N9
AH7
AK9
AP11
AT13
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
C8
F9
H9
M9
AH8
AK10
AN11
AR13
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_A_DM[7:0] 13
M_A_DQS#[7:0]
M_A_DQS[7:0]
13
13
M_A_A[15:0] 13
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
14
14
14
M_B_BS0
M_B_BS1
M_B_BS2
AB1
W5
R7
SB_BS[0]
SB_BS[1]
SB_BS[2]
14
14
14
M_B_CAS#
M_B_RAS#
M_B_WE#
AC5
Y7
AC6
SB_CAS#
SB_RAS#
SB_W E#
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
W8
W9
M3
M_B_CLK0 14
M_B_CLK0# 14
M_B_CKE0 14
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
V7
V6
M2
M_B_CLK1 14
M_B_CLK1# 14
M_B_CKE1 14
SB_CS#[0]
SB_CS#[1]
AB8
AD6
M_B_CS0# 14
M_B_CS1# 14
SB_ODT[0]
SB_ODT[1]
AC7
AD1
M_B_ODT0 14
M_B_ODT1 14
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
D4
E1
H3
K1
AH1
AL2
AR4
AT8
M_B_DM[7:0] 14
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
DDR SYSTEM MEMORY - B
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D5
F4
J4
L4
AH2
AL4
AR5
AR8
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C5
E3
H4
M5
AG2
AL5
AP5
AR7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#[7:0]
M_B_DQS[7:0]
14
14
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_A[15:0] 14
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
A
Channel A DQ[15,32,48,54], DM[5]

Requires minimum 12mils spacing
with all other signals, including data signals.
Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.
Title
QUANTA
COMPUTER
AUBURNDA 2/4
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
of
64
C1211
10U
C1212
10U
C1213
10U
C1214
C1215
*10U_NC *10U_NC
+1.1V_VTT
C1217
22U
C1222
22U
C1223
22U
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
J24
J23
H25
VTT1_45
VTT1_46
VTT1_47
C1235
22U
3
C1237
22U
C1238
22U
VAXG_SENSE
VSSAXG_SENSE
AR22
AT22
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
AM22
AP22
AN22
AP23
AM23
AP24
AN24
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
AR25
AT25
AM24
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
VTT_SELECT
H_PSI#
VID0
VID1
VID2
VID3
VID4
VID5
VID6
DPRSLPVR
51
C1273
22U
C1274
22U
VID0
51
VID1
51
VID2
51
VID3
51
VID4
51
VID5
51
VID6
51
DPRSLPVR 51
G15
H_VTTVID1
49
VTT_SELECT:
High level 1.05V for Auburndale
Low level 1.1V for Clarksfield
GFX_VID[0..6],GFX_VR_EN,GFX_DPRSLPVR,GFX_IMON:
Could this be left unconnected when not in use?
GFX_VID[0..6],GFX_VR_EN,GFX_DPRSLPVR,GFX_IMON:(Intel feedback)
Yes, see DG rev1.5
R803
*1K/F_NC
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
VTT0_59
VTT0_60
VTT0_61
VTT0_62
P10
N10
L10
K10
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
J22
J20
J18
H21
H20
H19
C1216
1U
C1218
1U
C1219
1U
C1220
1U
C1221
1U
+ C1224
330U
7343
2.5
C1225
22U
C1226 +VCC_CORE
22U
C
C1228
22U
C1229
22U
C1230
22U
C1231
22U
C1239
22U
C1240
22U
C1241
22U
C1242
22U
C1243
22U
C1232
22U
+1.1V_VTT
C1247
10U
C1248
10U
C1271
22U
C1272
22U
+ C1258
*330U_NC
7343
2.5
C1244
22U
C1249
10U
C1250
10U
C1251
10U
C1252
10U
C1253
10U
C1254
10U
C1255
10U
C1256
10U
VCCPLL1
VCCPLL2
VCCPLL3
L26
L27
M26
C1261
10U
C1262
10U
C1263
10U
C1264
10U
C1265
10U
C1266
10U
C1267
10U
C1268
10U
C1275
1U
C1276
1U
C1277
2.2U
C1278
4.7U
C1279
22U
+ C1507
*470U_NC
+ C1508
*470U_NC
+VCC_CORE
ISENSE
AN35
VCC_SENSE
VSS_SENSE
AJ34
AJ35
VTT_SENSE
VSS_SENSE_VTT
B15
A15
I_MON
51
R807
100/F
VCC_SENSE & VSS_SENSE:

SC(V1.0)P19
100- 1% pull-down to GND near processor
+1.1V_VTT
VCCSENSE 51
VSSSENSE 51
VTT_SENSE 49
TP_VSS_SENSE_VTT
T196
VSS_SENSE_VTT:
SC(V1.0)P20
Connect VSS_SENSE_VTT to GND
or can be left floating.
Note: CRB has the VSS_SENSE_VTT floating.
R810
1K
R811
1K
R812
1K
R813
*1K_NC
R814
*1K_NC
R815
1K
R816
*1K_NC
R817
1K
R818
*1K_NC
R820
*1K_NC
R821
*1K_NC
R822
*1K_NC
R823
1K
R824
1K
R825
*1K_NC
R826
1K
R827
*1K_NC
R828
1K
VID0
VID1
VID2
VID3
VID4
VID5
VID6
DPRSLPVR
H_PSI#
R819
100/F
PROC_DPRSLPVR:
SC(V1.0)P19:
It is important to have the resistor stuffing options
in the design for the Turbo functionality.
The stuffing and no-stuffing of the resistors
will depend on the POC configuration of AUB
and CFD
Note:
CRB(V1.0)P67:
For Validating IMVP VR R814 should be STUFF
uses 1K pull-up and pull-down resistors
and R827 NO_STUFF
CRB default setting is "1"
AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5
C1227
22U
+1.8V_RUN
1.8V
CPU VIDS
AN33
C1270
22U
PEG & DMI
PSI#
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR
C1269
22U
VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58
1.1V
VTT0_43,VTT0_44:
CRB(V1.0)P13
Why add 0ohm?? Is it trace width control??
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
+1.5V_SUS
+1.1V_VTT
C1234
22U
VTT0_43,VTT0_44:(Intel feedback)
They are connected to hidden page for
intel validation purpose.
POWER
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
SENSE
LINES
C1210
10U
GRAPHICS VIDs
C1209
10U
- 1.5V RAILS
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16 +VTT_43
J15 +VTT_44
C1208
10U
DDR3
1.1V RAIL POWER
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
C1207
10U
FDI
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
GRAPHICS
CPU CORE SUPPLY
U3031G
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
+1.1V_VTT
SENSE LINES
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)
+1.1V_VTT
+VCC_CORE
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
POWER
CPU Core Power
U3031F
Title
QUANTA
COMPUTER
AUBURNDA 3/4
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
of
64
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
U3031I
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W 35
W 34
W 33
W 32
W 31
W 30
W 29
W 28
W 27
W 26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9
U3031E
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30
+M_VREF_DQ_DIMM0
+M_VREF_DQ_DIMM1
CFG0
CFG3
CFG4
CFG7
VSS
NCTF
U3031H
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
R833
R834
0
0
TP_RSVD17_R
TP_RSVD18_R
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86
B19
A19
RSVD15
RSVD16
A20
B20
RSVD17
RSVD18
U9
T9
RSVD19
RSVD20
AC9
AB9
RSVD21
RSVD22
C1
A3
RESERVED
AUBURNDALE/CLARKSFIELD PROCESSOR (GND)
RSVD_NCTF_23
RSVD_NCTF_24
J29
J28
RSVD26
RSVD27
A34
A33
RSVD_NCTF_28
RSVD_NCTF_29
C35
B35
RSVD_NCTF_30
RSVD_NCTF_31
RSVD32
RSVD33
AJ13
AJ12
RSVD34
RSVD35
AH25
AK26
RSVD36
RSVD_NCTF_37
AL26
AR2
RSVD38
RSVD39
AJ26
AJ27
RSVD_NCTF_40
RSVD_NCTF_41
AP1
AT2
RSVD_NCTF_42
RSVD_NCTF_43
AT3
AR1
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65
E15
F15
A2
D15
C15
AJ15
AH15
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
VSS
RSVD64_R
RSVD65_R
R831
R832
0
0
AP34
R839
0
Can be left NC is Intel CRM

implementation; ESD/DG
recommendation to GND
The Clarkfield processor's PCI Express interface may

not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resistor to
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
issue is fixed.
CFG4
R835
*3.01K/F_NC
CFG0
R836
*3.01K/F_NC
CFG3
R837
3.01K/F
CFG7
R838
*3.01K/F_NC
PCIE LANE is Lane Numbers Reversed

5
CFG4
(Display Port
Presence)
Disabled; No Physical Display Port

attached to Embedded Diplay Port
CFG0
(PCI-Epress
Configuration Select)
Single PEG
0
Enabled; An external Display port
device is connected to the Embedded
Display port
Bifurcation enabled
Title
CFG3
(PCI-Epress Static
Lane Reversal)
Normal Operation
AUBURNDA 4/4
Lane Numbers Reversed
QUANTA
COMPUTER
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
of
64
IBEX PEAK-M (DMI,FDI,GPIO)

IBEX PEAK-M (LVDS,DDI)
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
3
3
3
3
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
BE22
BF21
BD20
BE18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
3
3
3
3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
BD22
BH21
BC20
BD18
BH25
+1.05V_VCCIO
R842
49.9/F DMI_ZCOMP
BF25
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
DMI_IRCOMP
FDI_LSYNC0
FDI_LSYNC1
3,60 XDP_DBRESET#
29 PCH_PW RGD
T6
SYS_RESET#
WAKE#
M6
SYS_PWROK
CLKRUN# / GPIO32
R1062
SYS_PW ROK
R1063
PW ROK
R846
MEPW ROK
K5
LAN_RST#
A10
B17
D9
3 PM_DRAM_PW RGD
ICH_RSMRST#
29 ICH_RSMRST#
C16
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#
29 SUS_PW R_ACK
M1
SUS_PWR_DN_ACK / GPIO30
29 SIO_PW RBTN#
P5
PWRBTN#
29 AC_PRESENT
P7
PM_BATLOW #
MEPWROK
SC(V1.0)P32:
It can be connected to PCH_PWROK pin
on PCH when Intel AMT is not enabled.
PM_RI#
A6
F14
R1075
10K/F
ICH_RSMRST#
R861
10K/F
LAN_RST#
R1013
10K/F
LAN_RST#
DG(V1.0) P311
If integrated LAN is not used, recommend
to connect LAN_RST# to GND via an 8.2-k
to 10-k pull-down resistor.
EDS(V1.0)P64
must be grounded if Intel LAN is disabled.
SDVO_STALLN
SDVO_STALLP
BJ48
BG48
SDVO_INTN
SDVO_INTP
BF45
BH45
L_DDC_CLK
L_DDC_DATA
AB46
V48
L_CTRL_CLK
L_CTRL_DATA
AP39
AP41
LVD_IBG
LVD_VBG
AT43
AT42
BF13
AV53
AV51
BH13
BB47
BA52
AY48
AV47
BJ12
BG14
ACPRESENT / GPIO31
CLKRUN#
RSV_LPCPD#
SUSCLK / GPIO62
F3
ICH_SUSCLK
SLP_S5# / GPIO63
E4
SLP_S5#_R
R1073
H7
SLP_S4#_R
R1074
SLP_S3#
P12
SLP_S3#_R
SLP_M#
K8
SLP_M#_R
SLP_S4#
TP23
PMSYNCH
RI#
Y1
P8
SUS_STAT# / GPIO61
BATLOW# / GPIO72
J12
SLP_LAN# / GPIO29
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
AY51
AT48
AU50
AT51
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
AA52
AB53
AD53
CRT_BLUE
CRT_GREEN
CRT_RED
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
T223
T224
CRT_DDC_CLK
CRT_DDC_DATA
Y53
Y51
CRT_HSYNC
CRT_VSYNC
AD48
AB51
PM_SYNC 3
R856
1K
DAC_IREF
CRT_IRTN
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
DDPD_CTRLCLK
DDPD_CTRLDATA
V51
V53
T51
T53
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
SIO_SLP_S4# 13
SIO_SLP_S3# 29
PM_SLP_LAN#_R
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
AY53
AT49
AU52
AT53
SIO_SLP_S5# 29
BJ10
F6
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
CLKRUN#
T222
N2
LVDSA_CLK#
LVDSA_CLK
AP48
AP47
29
SDVO_CTRLCLK
SDVO_CTRLDATA
LVD_VREFH
LVD_VREFL
PCIE_W AKE# 28,31,32,41
T221
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
IbexPeak-M_R1P0
T225
+3.3V_SUS
10K/F
PCH_PW RGD
L_BKLTCTL
BJ14
+3.3V_SUS
R580
Y48
AB48
Y45
IbexPeak-M_R1P0
+3.3V_RUN
CLKRUN#
BJ46
BG46
BB48
BA50
AY49
AV48
System Power Management
CS(V1.0) P32
PWROK and SYS_PWROK should be tied
together on the platform.MEPWROK can be connected
to PCH_PWROK pin on PCH when Intel AMT
is not enabled.
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO
BD24
BG22
BA20
BG20
L_BKLTEN
L_VDD_EN
Display port B
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
U3035D
T48
T47
Display port C
3
3
3
3
DG(V1.0)P185:
If the LVDS interface is not implemented,
all signals associated with the interface can
be left as No Connects. The supply pins
VccTX_LVDS and VCCA_LVD can be
connected to ground.
DG(V1.1) P83:FDI_FSYNC[0], FDI_FSYNC[1],
FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT
signals on PCH side can be left as
no connect without any power
or functional impact.
Display port D
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
Digital Display Interface
BC24
BJ22
AW20
BJ20
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
LVDS
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
CRT
3
3
3
3
DMI
FDI
U3035C
PM_RI#
R858
10K/F
PCIE_W AKE#
R860
1K
PM_BATLOW #
R859
DG(V1.0)P189:
If the CRT interface is not implemented,
all signals associated with the interface can
be left as No Connects. The pins
CRT_IRTN Connect this signals to GND
and DAC_IREF Connect to GND
via a 1.0 k 0.5% pull-down resistor
8.2K/F
PM_BATLOW#:
EDS(V1.0)P95: 15K~40K (+3.3V_SUS)
CRB(V1.0)P25: 8.2K (+3.3V_ALW)
PM_BATLOW#:(Intel feedback)
15K ~ 40K is a simulation result,
the expected value should be 20K
internal pull high in PCH.
8.2K is external pull high.
Title
PWROK
SC(V1.0)P32:
8.2 k to 10 k pull-down resistor to GND.
PWROK and SYS_PWROK should be tied together on the platform.
QUANTA
COMPUTER
IBEX PEAK-M 2/6
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
of
64
+RTC_CELL
D
C1280
18PF
20K/F
IBEX PEAK-M (HDA,JTAG,SATA)

2
1
C1282
1U
Y5
32.768KHZ
20K/F
U3035A
18PF
RTC_X1
RTC_X2
B13
D13
RTCX1
RTCX2
RTC_RST#
C14
RTCRST#
SRTC_RST#
D17
SRTCRST#
SM_INTRUDER#
A16
INTRUDER#
PCH_INVRMEN
C1281
Cap values depend on Xtal

R867
1M
R869
39 ICH_AZ_CODEC_BITCLK
33
ACZ_BIT_CLK
39
39 ICH_AZ_CODEC_SDOUT
HDA_SYNC
SPKR
SPKR
P1
R871
33
ACZ_SYNC
R872
33
ACZ_RST#
R873
33
ACZ_SDOUT
GPIO33
Low = Enabled
High = Disabled
R503 1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
ACZ_SDOUT
B29
HDA_SDO
GPIO33
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
2 *10K/F_NC GPIO33
36 KB_LED_DET
(Internal 20K/F pull high to +3.3V_RUN)

Note : GPIO33 is a signal used for Flash
Descriptor Security Override/ME Debug
Mode.This signal should be only asserted
lowthrough an external pull-down in
manufacturing or debug environments
ONLY.
No Reboot strap.
SPKR
T183
PCH_JTAG_TCK_BUF
M3
JTAG_TCK
T180
PCH_JTAG_TMS
K3
JTAG_TMS
T178
PCH_JTAG_TDI
K1
JTAG_TDI
T174
PCH_JTAG_TDO
J2
JTAG_TDO
T175
PCH_JTAG_RST#
30
SPI_CLK
30
SPI_CS0#
T185
Low = Default.
High = No Reboot.
+3.3V_RUN
30
SPKR
2
*1K_NC
1
R221
LPC
HDA_BCLK
D29
39 ICH_AZ_CODEC_SDIN0
Place all series terms close to PCH except for SDIN input
lines,which should be close to source.Placement of R773, R775,
R776 & R777 should equal distance to the T split trace point.
Basically, keep the same distance from T for all series
termination resistors.
A30
ACZ_SYNC
Flash Descriptor Security Override
50
29,39 ICH_AZ_CODEC_RST#
INTVRMEN
ACZ_RST#
C1284
*27P_NC
39 ICH_AZ_CODEC_SYNC
A14
ACZ_BIT_CLK
30
SPI_SI
SPI_SO
J4
TRST#
SATA
330K
IHDA
R868
+RTC_CELL
INTVRMEN(Internal Voltage Regulator Enable) :

This signal enables the internal 1.05 V regulators.
This signal must be always pulled-up to VccRTC.
RTC
1U
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
D33
B33
C32
A32
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
FWH4 / LFRAME#
C34
LPC_LFRAME# 29,32
LDRQ0#
LDRQ1# / GPIO23
A34
F34
SERIRQ
AB9
IRQ_SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AK7
AK6
AK11
AK9
SATA_RX0- 35
SATA_RX0+ 35
SATA_TX0- 35
SATA_TX0+ 35
SATA HDD
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AH6
AH5
AH9
AH8
SATA_RX1- 35
SATA_RX1+ 35
SATA_TX1- 35
SATA_TX1+ 35
SATA ODD
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF11
AF9
AF7
AF6
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AH3
AH1
AF3
AF1
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AD9
AD8
AD6
AD5
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AD3
AD1
AB3
AB1
29,32
29,32
29,32
29,32
29
Distance between the PCH and

cap on the "P" signal should be
identical distace between the
PCH and cap on the "N" signal
for the same pair.
SATA port 2/3 are not support in HM55 .

They are only in PM 55
SATA_RX4- 33
SATA_RX4+ 33
SATA_TX4- 33
SATA_TX4+ 33
E-SATA
JTAG
R865
R866
10M
3
4
C1283
SATAICOMPO
SATAICOMPI
AF16
SATA_COMP
AF15
R877
37.4/F
R51
100K
SPI_CLK
BA2
SPI_CLK
SPI_CS0#
AV3
SPI_CS0#
SPI_CS1#
AY3
SPI_CS1#
SATALED#
T3
SPI_SI
AY1
SPI_MOSI
SATA0GP / GPIO21
Y9
R8811
2 10K/F
SPI_SO
AV1
SATA1GP / GPIO19
V1
R8821
2 10K/F
+1.05V_PCH
+3.3V_RUN
SPI_MISO
SPI
R864
SATA_ACT#
SATA_ACT# 29
+3.3V_RUN
IbexPeak-M_R1P0
JTAG
Test Pads are need to put on
the same side of mother board.
A
Title
QUANTA
COMPUTER
IBEX PEAK-M 1/6
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
of
64
IBEX PEAK-M (PCI,USB,NVRAM)
IBEX PEAK-M (PCI-E,SMBUS,CLK)

Place TX DC blocking caps close PCH.
U3035B
U3035E
T234
T239
32 USB_MCARD1_DET#
F51
A46
B45
M53
GNT3#
SB_WPAN_PCIE_RST#
SB_WLAN_PCIE_RST#
PIRQG#
PCH_IRQH_GPIO5
T240
T241
T243
35 PCH_IRQH_GPIO5
PCI_RST#
PCI_SERR#
PCI_PERR#
PCI_IRDY#
PCI_PLOCK#
D49
PCI_STOP#
PCI_TRDY#
D41
C48
PME#
M7
T238
PCI_PLTRST#
D5
22/F CLK_LPC_DEBUG_C
R892
32 CLK_LPC_DEBUG
22/F CLK_PCI_8512_C
22/F CLK_PCI_FB_C
R896
CLK_PCI_FB R898
29 CLK_PCI_8512
CLKOUT_PCI[0..4]:
22 ohm series resistor is recommend
(single & double load) on PDG v1.1
N52
P53
P46
P51
P48
NV_RB#
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
PLOCK#
USBRBIAS#
STOP#
TRDY#
USBRBIAS
PME#
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
50
*27P_NC
50
*27P_NC
10K/F
10K/F
2.2K/F
2.2K/F
2.2K/F
2.2K/F
2.2K/F
2.2K/F
10K/F
R900
R902
R903
R905
R907
R910
R911
R912
R913
PEG_CLKREQ#
10K/F
R916
10
10
41
41
41
41
Giga Bit LOM
PCIE_RX6-/GLAN_RXPCIE_RX6+/GLAN_RX+
PCIE_TX6-/GLAN_TXPCIE_TX6+/GLAN_TX+
PCIE_TXN2_C
PCIE_TXP2_C
AW30
BA30
BC30
BD30
PERN2
PERP2
PETN2
PETP2
AU30
AT30
AU32
AV32
PERN3
PERP3
PETN3
PETP3
0.1U
0.1U
PCIE_TXN4_C
PCIE_TXP4_C
C712
C713
0.1U
0.1U
PCIE_TXN5_C
PCIE_TXP5_C
BF33
BH33
BG32
BJ32
PCIE_TXN6_C
PCIE_TXP6_C
BA34
AW34
BC34
BD34
C721
C722
0.1U
0.1U
AT34
AU34
AU36
AV36
AY8
AY5
PCI-E port 7/8 are not support in HM55 .

BG34
BJ34
BG36
BJ36
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
ICH_USBP0- 33
ICH_USBP0+ 33
ICH_USBP1- 33
ICH_USBP1+ 33
ICH_USBP2- 34
ICH_USBP2+ 34
ICH_USBP4- 32
ICH_USBP4+ 32
ICH_USBP5- 31
ICH_USBP5+ 31
Left Side pair Top
AK48
AK47
Left Side pair bottom

CLK_PEG0_REQ#
MiniWWAN
Mini Card (WLAN)
AM43
AM45
31 CLK_PCIE_MINI2#
31 CLK_PCIE_MINI2
31 CLK_PCIE_REQ1#
Mini Card (WWAN)
CLK_PCIE_REQ1# R883
USB port 6/7 are not support in HM55 .

ICH_USBP8- 32
ICH_USBP8+ 32
ICH_USBP9- 28
ICH_USBP9+ 28
ICH_USBP11- 40
ICH_USBP11+ 40
ICH_USBP12- 37
ICH_USBP12+ 37
USB_BIAS
B25
R887
22.6/F
D25
OC0#
OC1#
U4
AM47
AM48
CLK_PCIE_REQ2# R1100
MINI1CLK_REQ#
N4
Mini Card (WPAN)

Express Card
AH42
AH41
32 CLK_PCIE_MINI1#
32 CLK_PCIE_MINI1
MiniWLAN
32 MINI1CLK_REQ#
Camera
R884
A8
RSV_SMBALERT#
H14
ICH_SMBCLK
C8
ICH_SMBDATA
J14
RSV_ICH_CL_RST1#
C6
SMB_CLK_ME0
G8
SMB_DATA_ME0
SML1ALERT# / GPIO74
M14
LPD_SPI_INTR#
T167
SML1CLK / GPIO58
E10
SMB_CLK_ME1
G12
SMB_DATA_ME1
SML0CLK/SML0DATA:
DG(V1.1) P255: The 82577 SMBus
signals
(SMB_DATA and SMB_CLK) cannot be
connected to any other
devices other than the PCH.
Connect the SMB_DATA and SMB_CLK
pins
to the PCH SML0DATA and SML0CLK
pins,
respectively.
SMBCLK
SMBDATA
SML0ALERT# / GPIO60
SML0CLK
SML0DATA
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
SML1DATA / GPIO75
PERN6
PERP6
PETN6
PETP6
CL_CLK1
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
T11
CL_RST1#
T9
32,41,60
ICH_SMBDATA
32,41,60
T166
D
PEG_CLKREQ#
H1
T171
AD43
AD45
CLK_PCIE_VGA# 16
CLK_PCIE_VGA 16
CLKOUT_DMI_N
CLKOUT_DMI_P
AN4
AN2
CLK_PCIE_3GPLL# 3
CLK_PCIE_3GPLL 3
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
AT1
AT3
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
AW24
BA24
CLK_BUF_PCIE_3GPLL# 15
CLK_BUF_PCIE_3GPLL 15
CLKIN_BCLK_N
CLKIN_BCLK_P
AP3
AP1
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
F18
E18
CLK_BUF_DREFCLK# 15
CLK_BUF_DREFCLK 15
AH13
AH12
CLK_BUF_DREFSSCLK# 15
CLK_BUF_DREFSSCLK 15
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
CLKOUT_PCIE3N
CLKOUT_PCIE3P
REFCLK14IN
CLKIN_PCILOOPBACK
P41
J42
Express Card
28 CARD_CLK_REQ#
Note : place these

resistors near to PCIe
Slots
AM51
AM53
28 CLK_PCIE_EXPCARD#
28 CLK_PCIE_EXPCARD
CARD_CLK_REQ# R885
AJ50
AJ52
26 CLK_PCIE_CARD_READER#
26 CLK_PCIE_CARD_READER
26 CLK_PCIE_REQ5#
CLK_PCIE_REQ5# R888
33
34
41 LOM_CLK_REQ#
H6
AK53
AK51
41 CLK_PCIE_LOM#
41 CLK_PCIE_LOM
Giga Bit LOM
M9
LOM_CLK_REQ# R894
P13
CLKOUT_PCIE4N
CLKOUT_PCIE4P
XTAL25_IN
XTAL25_OUT
CLK_ICH_14M
15
15
15
CLKIN_PCILOOPBACK:
PDG (V1.1): 22 ohm series resistor
is recommend
CLK_PCI_FB
XCLK_RCOMP
CLKOUT_PCIE5N
CLKOUT_PCIE5P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
CLKOUTFLEX0 / GPIO64
AH51
AH53
AF38
+3.3V_RUN
8.2K/F
8.2K/F
8.2K/F
8.2K/F
R904
R906
R908
R909
R1014
10K
10K
10K
10K
10K
MINI1CLK_REQ#
CARD_CLK_REQ#
CLK_PCIE_REQ5#
CLK_PEG0_REQ#
LOM_CLK_REQ#
R914
R915
10K
10K
CLK_PCIE_REQ1#
CLK_PCIE_REQ2#
90.9/F
+1.05V_PCH
CLK_FLEX0
T179
P43
CLK_FLEX1
T176
T42
CLK_FLEX2
T177
N50
CLK_FLEX3
T184
CLKOUTFLEX3:
0214
EDS(V1.0) :support 48MHz
33MHz and 14.31818MHz.
CLKOUT_PEG_A_P/N,CLKOUT_PEG_B_P/N,
CLKOUT_DMI_P/N,support GEN-1 and GEN-2
+3.3V_SUS
DG(V1.1) P256: XTAL_OUT and XTAL_IN

are the signal names for the PHY.
XCLK_RCOMP
R886
T45
IbexPeak-M_R1P0
R901
R1117
R1118
R1119
ICH_SMBCLK
T13
CL_DATA1
PEG_A_CLKRQ# / GPIO47
PERN7
PERP7
PETN7
PETP7
T165
0214
Touch Screen Module
Card Reader
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#
N16
J16
F16
L16
E14
G16
F12
T15
P9
Right Side pair top (Cable)
B9
SMBALERT# / GPIO11
SMBus
C711
C710
BA32
BB32
BD32
BE32
AV7
OC0#~OC7#:
DG(V1.0)P214
Pin
Default Port Mapping
OC0#
Port0,Port1
OC1#
Port2,Port3
PIRQG#
SB_WPAN_PCIE_RST#
SB_WWAN_PCIE_RST#
SB_WLAN_PCIE_RST#
0.1U
0.1U
PERN1
PERP1
PETN1
PETP1
Link
26 PCIE_RX526 PCIE_RX5+
26 PCIE_TX526 PCIE_TX5+
Card Reader
NV_ALE
NV_CLE
PCIE_RX4PCIE_RX4+
PCIE_TX4PCIE_TX4+
C714
C715
PCIE_TXN1_C
PCIE_TXP1_C
Controller
28
28
28
28
Express Card
AU2
IbexPeak-M_R1P0
RSV_SMBALERT#
RSV_ICH_CL_RST1#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0
SMB_CLK_ME1
SMB_DATA_ME1
LPD_SPI_INTR#
MiniWLAN
PCIE_RX2PCIE_RX2+
PCIE_TX2PCIE_TX2+
0.1U
0.1U
PCI-E*
NVRAM
NV_RCOMP
+3.3V_SUS
Reserve capacitor pads for

improving WWAN.
CLK_LPC_DEBUG
C1287
CLK_PCI_8512
C1289
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
A42
H44
F46
C46
PCI_DEVSEL#
PCI_FRAME#
PME:
DG(V1.0) P277
Can be left unconnected.
0214
B41
K53
A36
A48
E44
E50
BD3
AY6
REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
T237
PCIRST#:
DG(V1.0) P277
Can be left unconnected.
PAR:
SC(V1.0) P36
Can be left unconnected
if not using PCI.
NV_ALE
NV_CLE
PIRQA#
PIRQB#
PIRQC#
PIRQD#
F48
K45
F36
H53
K6
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
32
32
32
32
C717
C718
BG30
BJ30
BF29
BH29
PEG
PCI_REQ0#
REQ1#
SB_WWAN_PCIE_RST#
USB_MCARD1_DET#
PCI_GNT0#
GNT#1
GNT#2
T235
T236
10
G38
H51
B37
A44
AV9
BG8
PCIE_RX1PCIE_RX1+
PCIE_TX1PCIE_TX1+
CLKOUTFLEX[0..3]:
PDG v1.1: 22 ohm series resistor is
recommend (PCI & non PCI routing,
single & double load)
PCIECLKRQ{0,3,4,5,6,7}# should have a

10K pull-up to +V3.3A.PCIECLKRQ{1,2}
should have a 10K pull-up to +3.3S
+3.3V_SUS
+3.3V_RUN
T173
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
NV_DQS0
NV_DQS1
MiniWWAN
31
31
31
31
From CLK BUFFER
T172
C/BE0#
C/BE1#
C/BE2#
C/BE3#
AY9
BD1
AP15
BD8
Clock Flex
J50
G42
H47
G34
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
USB
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCI
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
+3.3V_SUS
Q82
2N7002W-7-F
RP45
OC7#
OC5#
OC4#
OC3#
Add Buffers as needed for

Loading and fanout concerns.
+3.3V_SUS
5
4
3
2
1
SMB_CLK_ME1
OC2#
OC6#
OC1#
OC0#
R917
R918
1K
1K
PCI_GNT0#
GNT#1
10P8R-8.2K
SMB_DATA_ME1
RP46
PCH_IRQH_GPIO5
PCI_REQ0#
PCI_PIRQB#
USB_MCARD1_DET#
+3.3V_SUS
C1290 0.047U
+3.3V_RUN
U56
6
7
8
9
10
5
4
3
2
1
PCI_TRDY#
PCI_FRAME#
REQ1#
PCI_PIRQD#
10P8R-8.2K
10
PCI_PLTRST#
PLTRST# 3,16,26,28,29,31,32,41
+3.3V_RUN
RP47
TC7SZ32FU(T5L,F,T)
PCI_STOP#
PCI_PIRQA#
PCI_PIRQC#
PCI_IRDY#
+3.3V_RUN
6
7
8
9
10
5
4
3
2
1
SMBCLK1 29
+3.3V_SUS
+3.3V_RUN
A
Non-iAMT
6
7
8
9
10
Q83
2N7002W-7-F
SMBDAT1 29
Boot BIOS Strap

PCI_GNT0#
GNT#1
Boot BIOS Location
LPC
Reserved (NAND)
PCI
SPI
PCI_SERR#
PCI_PERR#
PCI_PLOCK#
PCI_DEVSEL#
Title
QUANTA
COMPUTER
IBEX PEAK-M 3/6
Size
Document Number
FM9
Date:
Rev
1A
10P8R-8.2K
5
Sheet
of
64
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U3035F
SIO_EXT_SMI#
C38
TACH1 / GPIO1
29 SIO_EXT_SCI#
SIO_EXT_SCI#
D37
TACH2 / GPIO6
SIO_EXT_WAKE#
J32
TACH3 / GPIO7
RSV_WOL_EN
F10
GPIO8
R926
29,41 LAN_PCIE_PWR_CTRL
*0_NC LAN_PHY_PWR_CTRL K9
TEST_WOOFER_EN
39 TEST_WOOFER_EN
SATA4GP
R942
32 PCIE_MCARD1_DET#
SATA4GP / GPIO16
F38
TACH0 / GPIO17
PCIE_MCARD2_DET#
Y7
GPIO27
AB12
TP_PCH_GPIO28
V13
USB_MCARD2_DET#
M11
*10K_NC
31 USB_MCARD2_DET#
H10
GPIO35
31 WWAN_RADIO_DIS#
29 CRIT_TEMP_REP#
AB7
SATA3GP
AB13
0 CRB_SV_DET
R940
32 BT_RADIO_DIS#
SATA2GP
WLAN_RADIO_DIS#
32 WLAN_RADIO_DIS#
V6
V3
P3
CLKOUT_PCIE6N
CLKOUT_PCIE6P
AH45
AH46
CLKOUT_PCIE7N
CLKOUT_PCIE7P
AF48
AF47
U2
+3.3V_RUN
SCLOCK / GPIO22
GPIO24
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AM3
CLK_CPU_BCLK# 3
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
AM1
CLK_CPU_BCLK 3
BG10
H_PECI 3
T1
SIO_RCIN#
PECI
RCIN#
GPIO27
GPIO28
PROCPWRGD
THRMTRIP#
BE10
BD10
SATA2GP / GPIO36
TP1
SATA3GP / GPIO37
TP2
SLOAD / GPIO38
TP3
SDATAOUT0 / GPIO39
TP4
AV43
SDATAOUT1 / GPIO48
TP7
AV45
SATA5GP / GPIO49
TP8
GPIO57
TP9
TP11
RSVD
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
NCTF
A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
R935
R936
R937
R938
R939
R941
R943
R944
10K/F
10K/F
10K/F
10K/F
10K/F
10K/F
10K/F
10K/F
AY45
AY46
TP10
10K/F
10K/F
10K/F
BB22
TP6
F8
10K/F
10K/F
10K/F
10K/F
AW22
GPIO57
SIO_RCIN#
SIO_A20GATE
SATA2GP
SATA5GP
SATA3GP
SATA4GP
USB_MCARD2_DET#
CRIT_TEMP_REP#
H_THERM 3
BA22
F1
AA4
54.9/F
(Both these should be close to PCH)
GPIO46
AB6
R934
R927
R928
R929
R930
PCIE_MCARD1_DET#_R R1012
WLAN_RADIO_DIS#
R1070
CRB_SV_DET
R1071
R933
56/F
29
SATACLKREQ# / GPIO35
TP5
0 SATA5GP
SIO_EXT_SMI#
SIO_EXT_SCI#
SIO_EXT_WAKE#
PCIE_MCARD2_DET#
+1.1V_VTT
H_PWRGOOD 3,60
PCH_THRMTRIP#_R
STP_PCI# / GPIO34
0 SV_SET_UP
1K
10K/F
10K/F
10K/F
10K/F
10K/F
10K/F
SIO_A20GATE 29
H3
R946
R920
R921
R922
R923
R924
R925
R1001
A20GATE
GPIO45
R945
TEST_WOOFER_EN
RSV_WOL_EN
TP_PCH_GPIO28
GPIO45
GPIO46
GPIO57
LAN_PHY_PWR_CTRL
GPIO15
0 PCIE_MCARD1_DET#_R
GPIO24 register not cleared by CF9h reset event.

R995
LAN_PHY_PWR_CTRL / GPIO12
AA2
31 PCIE_MCARD2_DET#
GPIO27 reserve for internal VR.
T7
MISC
29 SIO_EXT_SMI#
29 SIO_EXT_WAKE#
+3.3V_SUS
BMBUSY# / GPIO0
CPU
Y3
GPIO
S_GPIO
AF13
M18
N18
AJ24
AK41
DMI Termination Voltage

AK42
Set to Vcc when LOW
M32
NV_CLE
Set to Vcc/2 when HIGH
N32
+NVRAM_VCCQ
M30
N30
H12
NV_ALE
NV_CLE
R947
*1K_NC
R948
*1K_NC
Danbury Technology Enabled
AA23
High = Enable
AB45
NV_ALE
Low = Disable
AB38
AB42
AB41
T39
P6
C10
IbexPeak-M_R1P0
+3.3V_RUN
R1072
10K/F
R950
GPIO35
*1K/F_NC
GNT3#
A16 swap override Strap/Top-Block

Swap Override jumper
SV_SET_UP
S_GPIO
R530
10K/F
SV_SET_UP
R951
10K/F
BMBUSY#:
If not used, require a weak pull-up (8.2- K to 10 k) to Vcc3_3.
CRB(V1.0)P28: it has 1K PU and 100 ohm on this net for validation purpose.
1-X High = Strong (Default)
Low = A16 swap

override/Top-Block
Swap Override enabled
High = Default
GNT3#
BMBUSY#:(Intel feedback)
Follow CRB checklist, 1K is
for intel BIOS validation purpose.
Title
QUANTA
COMPUTER
IBEX PEAK-M 4/6
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
10
of
64
+1.05V_LAN_VCCAPLL_EXP BJ24
VCCAPLLEXP:
This pin can be left as no connect in
On-Die VR enabled mode (default).
+1.05V_VCCIO
PJP32
+1.05V_PCH
C1298
*10U_NC
1
C1307
10U
4
0805
POWER_JP
VCCIO = 3.208A max
C1308
1U
C1309
1U
C1310
1U
C1311
1U
+3.3V_RUN
VCC3_3 = 0.357A max
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31
C1423
0.1U
AN35
VCCVRM =
VCCFDIPLL = 100mA max
+1.05V_PCH
L112
VCC3_3[1]
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
AM23
VCCIO[1]
C1294
C1295
0.01U
10U
10
0.1U
U3035J
VCCALVDS
AH38
VSSA_LVDS
AH39
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
L110
*10uH_NC
+1.1V_LAN_VCCA_CLK
AP51
VCCACLK[1]
POWER
C1296
C1297
AP53
*10U_NC *1U_NC
VCCACLK[2]
+1.05V_PCH
AP43
AP45
AT46
AT45
AF23
VCCLAN[1]
AF24
VCCLAN[2]
C1312
1U
DCPSUSBYP
Y20
AB34
VCC3_3[3]
AB35
VCC3_3[4]
AD35
AD38
VCCME[1]
AD39
VCCME[2]
AD41
VCCME[3]
AF43
VCCME[4]
AF41
VCCME[5]
AF42
VCCME[6]
V39
VCCME[7]
0.1U
+3.3V_RUN
C1305
0.1U
V41
VCCME[8]
C1314
V42
VCCME[9]
1U
Y39
VCCME[10]
Y41
VCCME[11]
Y42
VCCME[12]
+1.05V_PCH
C1300
C1306
22U
22U
VCCVRM[2]
AT24
VCCDMI[1]
AT16
R954
+1.1V_VTT
VCCDMI[2]
AU16
R955
*0_NC
+1.05V_PCH
+1.5VS_1.8VS
C1315
1U
C1316
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
0.1U DCPRTC
V9
+NVRAM_VCCQ
AU24
+1.5VS_1.8VS
+1.1V_VCCADPLLA
0.1U
BB51
BB53
VCCADPLLB = 0.073A max

BD51
BD53
VCCME3_3 = 0.085A max

+3.3V_RUN
VCCADPLLB[1]
VCCADPLLB[2]
AH23
AJ35
AH35
VCCIO[21]
VCCIO[22]
VCCIO[23]
1U
AF34
VCCIO[2]
AH34
VCCIO[3]
AF32
VCCIO[4]
1U
1U
C1326
0.1U
IbexPeak-M_R1P0
C1327
VCCME3_3:
EDS(V1.0)P84:supply for the Intel Management Engine.This is a separate power plane
that may or may not be powered in S3S5 states.
This plane must be on in S0
and other times the Intel Management Engine is used.
VCCADPLLA[1]
VCCADPLLA[2]
C1321 C1322 C1323
+1.05V_PCH
AM8
AM9
AP11
AP9
VCCVRM[3]
VCCADPLLA = 0.072A max
C1319
VCCIO = 3.208A max
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
DCPRTC
VCCPNAND = 0.156A max
+1.1V_VCCADPLLB
VCCIO = 3.208A max
DCPSUSBYP
C1299
VCC3_3 = 0.357A max

VCC3_3[2]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
V24
V26
Y24
Y26
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
VCCSUS3_3[28]
U23
VCCIO[56]
V23
V5REF_SUS
F24
VCCME = 1.998A max
VCCDMI = 0.061A max
VCCIO[54]
VCCIO[55]
+1.5VS_1.8VS
C1293
VCCVRM = 0.035A max
0.035A max
+1.05V_PCH
AF51
VCCAPLLEXP
*1uH_NC +1.05V_VCCFDIPLL
C1324
*10U_NC
AF53
VSSA_DAC[2]
VCCACLK = 100mA max
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
VCCADAC = 100mA max
+3.3V_RUN
HCB1608KF-181T15
0.1U DCPSST
V12
USB
*1uH_NC
VSSA_DAC[1]
+VCCA_DAC_1_2
Clock and Miscellaneous
L111
AE52
+1.05V_PCH
LVDS
VCCAPLLEXP = 100mA max

+1.05V_PCH
AK24
+1.05V_PCH
AE50
VCCADAC[2]
HVCMOS
VCCADAC[1]
DMI
1U
NAND / SPI
C1292
VCC CORE
C1291
10U
4
0805
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
PCI E*
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
+1.05V_PCH
L109
FDI
IBEX PEAK-M (POWER)
POWER
U3035G
CRT
VCCCORE=1.524A max
V5REF
K49
VCC3_3[8]
J38
VCC3_3[9]
L38
VCC3_3[10]
M36
VCC3_3[11]
N36
VCC3_3[12]
P36
VCC3_3[13]
U35
VCC3_3[14]
AD13
0.1U DCPSUS
Y22
VCCIO = 3.208A max
+3.3V_SUS
VCCSUS3_3 = 0.163A max
C1303
C1304
0.1U
0.1U
VCCIO = 3.208A max
+1.05V_PCH
+V5REF_SUS
+V5REF
R956
100
+5V_SUS
D33
RB500V-40
+3.3V_SUS
R957
100
+5V_RUN
D34
RB500V-40
+3.3V_RUN
C1318
1U
+3.3V_RUN
V5REF_SUS>1mA
V5REF>1mA
VCC3_3 = 0.357A max
C1320
0.1U
C1325
0.1U
VCCSATAPLL[1]
VCCSATAPLL[2]
DCPSST
AK3
AK1
+1.05V_VCCSATAPLL
C1328
*1U_NC
C1330
+1.05V_PCH
C1301
1U
C1317
1U
PCI/GPIO/LPC
C1329
*10U_NC
L113
*10uH_NC +1.05V_PCH
VCCIO = 3.208A max

B
DCPSUS
VCCIO[9]
AH22
VCCVRM[4]
AT20
VCCIO[10]
AH19
VCCIO[11]
AD20
VCCIO[12]
AF22
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
AD19
AF20
AF19
AH20
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
AB19
AB20
AB22
AD22
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
AA34
Y34
Y35
AA35
+1.05V_PCH
*0_NC
R960
*0_NC
+1.8V_RUN
+3.3V_RUN
P18
VCCSUS3_3[29]
U19
VCCSUS3_3[30]
VCCSUS3_3 = 0.163A max

R961
R962
R963
*0_NC
+1.5VS_1.8VS
+3.3V_SUS
C1451
0.1U
+NVRAM_VCCQ
U20
VCCSUS3_3[31]
U22
VCCSUS3_3[32]
VCC3_3 = 0.357A max
PCH EDS(V1.0) P84

+NVRAM_VCCQ:
1.8 V supply for Dual Channel NAND interface.
This power is supplied by core
well. If unused, this pin should
be connected to Vcc3_3.
V15
VCC3_3[5]
C1332
V16
VCC3_3[6]
0.1U
Y16
VCC3_3[7]
+3.3V_RUN
SATA
R959
+1.5V_RUN
PCI/GPIO/LPC
VCCVRM = 0.035A max

+1.05V_PCH
10uH
+1.1V_VTT
+1.1V_VCCADPLLA
C1334
+ C1333
220U
3528
4.7U
C1335
AT18
V_CPU_IO[1]
AU18
V_CPU_IO[2]
C1337
0.1U
0.1U
C1485
C1339
C1336
1U
A12
+RTC_CELL
VCCRTC
C1342
IbexPeak-M_R1P0
L115
10uH
+1.1V_VCCADPLLB
1U
0.1U
VCCSUSHDA
HDA
L114
RTC
+1.05V_PCH
CPU
V_CPU>1mA
C1331
1U
+1.5VS_1.8VS
+1.05V_PCH
L30
VCCME = 1.998A max
R965
0.1U
VCCSUSHDA = 6mA max

A
VCCRTC = 2mA max

+ C1340
220U
3528
+3.3V_SUS
C1341
1U
C1338
1U
Title
QUANTA
COMPUTER
IBEX PEAK-M 5/6
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
11
of
64
U3035I
IBEX PEAK-M (GND)

D
U3035H
AB16
VSS[0]
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
IbexPeak-M_R1P0
A
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
IbexPeak-M_R1P0
Title
QUANTA
COMPUTER
IBEX PEAK-M 6/6
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
12
of
64
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
116
120
ODT0
ODT1
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
11
28
46
63
136
153
170
187
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
4
M_A_ODT0
4
M_A_ODT1
4 M_A_DM[7:0]
4 M_A_DQS[7:0]
4 M_A_DQS#[7:0]
+3.3V_RUN
PM_EXTTS#0
3 PM_EXTTS#0
3,14 DDR3_DRAMRST#
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
199
VDDSPD
77
122
125
NC1
NC2
NCTEST
198
30
EVENT#
RESET#
1
126
VREF_DQ
VREF_CA
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
Place these Caps near So-Dimm1.

C1353
0.1U
R966
C1350
10U
C1352
0.1U
C1354
0.1U
M1:Fixed voltage resistor divider or

DDR Voltage Regulator drives the Vref
M2:A set of Digital potentiometers
and op amps are added on the motherboard (one pair
for each channel). This circuit is controlled by
SMBUS (SMB_CLK & SMB_DATA) on PCH.
M3:Intel investigating future processor
VREF_DQ generation to replace M1 and M2. This
would require routing processor signal balls
J17 and H17 to SO-DIMM connectors
directly.
+5V_ALW
R969
100K
2
2N7002W-7-F
Q84
+1.5V_SUS
R970
1M
+3.3V_SUS
+3.3V_SUS
B
C1343
1U
603
10
C1344
R971 1U
12.1K/F603
10
U57
EC_SMBCLK0
EC_SMBDAT0
3
4
VCC
SCL
SDA
RH
RW
6
5
GND
R974
12.1K/F
+SMDDR_VREF_DQ0
U58
OPA343NA/3K
1
R972
2.2
R973
C1345
*1U_NC
603
10
PP_S4GT
*0_NC
R975
10
2N7002W-7-F
Q85
2
1
C1356
0.1U
C1360
0.1U
R976
+SMDDR_VREF_DIMM
+DDR_VTTREF
+0.75V_DDR_VTT
R978
R977
C1364
C1365
C1366
C1367
C1368
2.2U/6.3V_6
0.1U
1U
1U
1U
1U
C1369
10U
4
0805
C1370
10U
4
0805
*10K/F_NC
*10K/F_NC
R979
C1363
+0.75V_DDR_VTT
7 SIO_SLP_S4#
C1362 470P/50V
+3.3V_RUN
Intel is requesting that customers implement

all methods (M1 and M2 and M3
described below) to generate and control
Reference voltage for Data/Strobe inputs
(VREFDQ) on Clarksfield based platforms.
for fine tuning of the VREFDQ levels to
optimize the voltage and timing margins.
+ C1357
C1358
330U
7343 0.1U
2.5
C1348
10U
*10K/F_NC PM_EXTTS#0
G1
G2
+SMDDR_VREF_DIMM
C1359
C1361
2.2U/6.3V_6 2.2U/6.3V_6
C1355
0.1U
C1346
10U
203
204
+3.3V_RUN
C1351
10U
VTT1
VTT2
G1
G2
ISL90727WIE627Z-TK
C1349
10U
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
PP_S4GT 14
14,15,38 EC_SMBCLK0
14,15,38 EC_SMBDAT0
C1347
10U
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
AS0A626-UARN-7F
AS0A626-UARN-7F
+1.5V_SUS
11
JDIM1B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
14,15,38 EC_SMBCLK0
14,15,38 EC_SMBDAT0
DIMM0_SA0
DIMM0_SA1
EC_SMBCLK0
EC_SMBDAT0
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
10K/F_4
10K/F_4
M_A_BS0
M_A_BS1
M_A_BS2
M_A_CS0#
M_A_CS1#
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
R967
R968
4
4
4
4
4
4
4
4
4
4
4
4
4
4
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
PC2100 DDR3 SDRAM SO-DIMM

(204P)
M_A_A[15:0]
+1.5V_SUS
M_A_DQ[63:0] 4
JDIM1A
4

(204P)
C1371
10U
4
0805
R980
+1.5V_SUS
*0_NC
+M_VREF_DQ_DIMM0
+SMDDR_VREF_DQ0
Title
QUANTA
COMPUTER
DDR3 DIMM-0
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
13
of
64
R982
R983
10K/F_4
10K/F_4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
M_B_BS0
M_B_BS1
M_B_BS2
M_B_CS0#
M_B_CS1#
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#
13,15,38 EC_SMBCLK0
13,15,38 EC_SMBDAT0
+3.3V_RUN
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
DIMM1_SA0
DIMM1_SA1
EC_SMBCLK0
EC_SMBDAT0
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
116
120
ODT0
ODT1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
11
28
46
63
136
153
170
187
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
4
M_B_ODT0
4
M_B_ODT1
4 M_B_DM[7:0]
4 M_B_DQS[7:0]
4 M_B_DQS#[7:0]
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
+3.3V_RUN
PM_EXTTS#1
3 PM_EXTTS#1
3,13 DDR3_DRAMRST#
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
12
JDIM2B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
199
VDDSPD
77
122
125
NC1
NC2
NCTEST
198
30
EVENT#
RESET#
1
126
VREF_DQ
VREF_CA
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
VTT1
VTT2
203
204
G1
G2
+3.3V_RUN
R981
*10K/F_NC
PM_EXTTS#1
+0.75V_DDR_VTT
G1
G2
AS0A626-U2RN-7F
+1.5V_SUS
+3.3V_SUS
+3.3V_SUS
AS0A626-U2RN-7F
13,15,38 EC_SMBCLK0
13,15,38 EC_SMBDAT0
C1373
R984 1U
12.1K/F603
10
C1372
1U
603
10
VCC
EC_SMBCLK0
EC_SMBDAT0
3
4
SCL
SDA
U59
RH
RW
6
5
GND
R987
12.1K/F
+SMDDR_VREF_DQ1
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

(204P)
M_B_A[15:0]
+1.5V_SUS
M_B_DQ[63:0] 4
JDIM2A
4

(204P)
U60
OPA343NA/3K
1
2.2
R986
*0_NC
R988
10
ISL90728WIE627Z-TK
R985
C1374
*1U_NC
603
10
Place these Caps near So-Dimm2.
C1376
10U
C1378
10U
C1380
10U
C1382
0.1U
C1384
0.1U
2N7002W-7-F
Q86
+ C1386
C1387
330U
7343 0.1U
2.5
C1375
10U
C1377
10U
A
13 PP_S4GT
+SMDDR_VREF_DIMM
C1388
C1390
2.2U/6.3V_6 2.2U/6.3V_6
+1.5V_SUS
+3.3V_RUN
C1379
10U
C1381
0.1U
C1383
0.1U
C1385
0.1U
C1389
0.1U
A
+0.75V_DDR_VTT
+SMDDR_VREF_DIMM
C1391
C1392
C1393
C1394
C1395
C1396
2.2U/6.3V_6
0.1U
1U
1U
1U
1U
C1397
10U
4
0805
C1398
10U
4
0805
R989
R990
*0_NC
+M_VREF_DQ_DIMM1
+SMDDR_VREF_DQ1
C1399
10U
4
0805
Title
QUANTA
COMPUTER
DDR3 DIMM-1
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
14
of
64
Place within 0.5" of CLKGEN
Realtek: 0.1uFx6pcs, 22uFx1pcs

IDT: 0.1uFx5pcs, 10uFx1pcs
+3.3V_RUN
U61
L116BLM21PG600SN1D
+3.3V_CLK_VDD
40mil
805
C1400
C1401
C1402
C1403
C1404
C1405
10U/6.3V
0.1U
0.1U
0.1U
0.1U
0.1U
+VDDIO_CLK
0.1uF near the every power pin.
1
5
17
24
29
15
18
VDD_USB
VDD_LCD
VDD_SRC
VDD_CPU
VDD_REF
VDD_SRC_IO
VDD_CPU_IO
9
2
8
12
21
26
VSS_SATA
VSS_USB
VSS_LCD
VSS_SRC
VSS_CPU
VSS_REF
CK505
QFN32
+3.3V_RUN
42 CK_PWRGD_R
9 CLK_ICH_14M
CLK_ICH_14M
R991
10K
R994
33
Place the 33 ohm

resistors close to the CK 505
13,14,38 EC_SMBDAT0
13,14,38 EC_SMBCLK0
CPU_SEL
16
25
30
CPU_STOP#
CK_PWRGD/PD#_3.3
REF_0/CPU_SEL
XTAL_OUT
XTAL_IN
27
28
XOUT
XIN
EC_SMBDAT0
EC_SMBCLK0
31
32
SDATA
SCLK
CPU-0
CPU-0#
23
22
CPU-1
CPU-1#
20
19
CLK_BUF_BCLK_P
CLK_BUF_BCLK_N
3
4
CLK_BUF_DREFCLK
CLK_BUF_DREFCLK#
SRC-1
SRC-1#
13
14
CLK_BUF_PCIE_3GPLL
CLK_BUF_PCIE_3GPLL#
SATA
SATA#
10
11
CLK_BUF_DREFSSCLK
CLK_BUF_DREFSSCLK#
6
7
CLK_VGA_27M_R
CLK_VGA_27M_SS_R
DOT96T_LPR
DOT96C_LPR
27MHz_nonSS
27MHz_SS
GND
CLK_BUF_BCLK_P
CLK_BUF_BCLK_N
9
9
CLK_BUF_DREFCLK 9
CLK_BUF_DREFCLK# 9
CLK_BUF_PCIE_3GPLL 9
CLK_BUF_PCIE_3GPLL# 9
CLK_BUF_DREFSSCLK 9
CLK_BUF_DREFSSCLK# 9
R992
R993
33
33
CLK_VGA_27M 17
CLK_VGA_27M_SS 17
33
SLG8SP585VTR
Realtek: 0.1uFx3pcs, 22uFx1pcs

IDT: 0.1uFx2pcs, 10uFx1pcs
+3.3V_RUN
+VDDIO_CLK
Add capacitor pads for improving WWAN.
L117BLM21PG600SN1D
R996
C1288
Y7
CLK_ICH_14M
XTAL_IN
*27P_NC
50
14.318MHZ
C1409
33P
50
40mil
805
+1.05V_PCH
XTAL_OUT
*0_NC
C1410
33P
R998
PIN 30
CPU_0
CPU_1
0(default)
133MHz
133MHz
1(0.7V-1.5V)
100MHz
100MHz
CPU_SEL
2
1
5
0.1U
0.1U
Place each 0.1uF cap as close as

possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.
+VDDIO_CLK:
SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.
Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.
IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.
R999
*4.7K_NC
R1000
4.7K
C1408
10U
HP: 10u x2pcs
50
+3.3V_RUN
C1407
SLG,IDT: +1.05V
Realtek: +3.3V
C1406
C1411
*10P_NC
CPU_SEL:
SLG date sheet (V0.2) P15:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.
Realtek date sheet(V1.2) P11:
IDT date sheet(V0.7) P10:
Title
QUANTA
COMPUTER
Clock Generator
EMI Capacitor
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
15
of
64
U32A
PART 1 OF 10
3 PCIE_MTX_GRX_P[0..15]
3 PCIE_MTX_GRX_N[0..15]
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
PCIE_TX0P
PCIE_TX0N
AH30
AG31
PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_C_N0
AE29
AD28
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
AG29
AF28
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_N1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
AD30
AC31
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
AF27
AF26
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_N2
AC29
AB28
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
AB30
AA31
AA29
Y28
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
Y30
W 31
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
W 29
V28
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8
V30
U31
PCIE_RX8P
PCIE_RX8N
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
U29
T28
PCIE_RX9P
PCIE_RX9N
T30
R31
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
R29
P28
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
P30
N31
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
N29
M28
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
M30
L31
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15
L29
K30
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCI-EXPRESS INTERFACE
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_RX0P
PCIE_RX0N
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
AF30
AE31
3 PCIE_MRX_GTX_P[0..15]
3 PCIE_MRX_GTX_N[0..15]
PCIE_TX3P
PCIE_TX3N
AD27
AD26
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_N3
PCIE_TX4P
PCIE_TX4N
AC25
AB25
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_N4
Y23
Y24
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_N5
PCIE_TX6P
PCIE_TX6N
AB27
AB26
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_N6
PCIE_TX7P
PCIE_TX7N
Y27
Y26
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_N7
PCIE_TX5P
PCIE_TX5N
PCIE_TX8P
PCIE_TX8N
W 24
W 23
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_N8
PCIE_TX9P
PCIE_TX9N
V27
U26
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_N10
PCIE_TX11P
PCIE_TX11N
T26
T27
PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_N11
PCIE_TX12P
PCIE_TX12N
T24
T23
PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_N12
PCIE_TX13P
PCIE_TX13N
P27
P26
PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_N13
PCIE_TX14P
PCIE_TX14N
P24
P23
PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_N14
PCIE_TX15P
PCIE_TX15N
M27
N26
PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N15
(1.1V)
100 MHz (+/-300 ppm) input frequency, 0-0.7 V single-ended swing.

clock must be provided less than 400ns
after CLKREQ# is asserted
+PCIE_VDDC
AK30
AK32
9 CLK_PCIE_VGA
9 CLK_PCIE_VGA#
3,9,26,28,29,31,32,41
PLTRST#
AL27
PCIE_REFCLKP
PCIE_REFCLKN
0.1U
1 C814 10
PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_P1
0.1U
1 C815 10
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_P2
0.1U
1 C816 10
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_P3
0.1U
1 C817 10
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_P4
0.1U
1 C818 10
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_P5
0.1U
1 C819 10
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_P6
0.1U
1 C820 10
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_P7
0.1U
1 C821 10
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_P8
0.1U
1 C822 10
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_P9
0.1U
1 C823 10
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_P10 0.1U
1 C824 10
PCIE_MRX_GTX_C_P10
1 C825 10
PCIE_MRX_GTX_C_P11
1 C826 10
PCIE_MRX_GTX_C_P12
1 C827 10
PCIE_MRX_GTX_C_P13
1 C828 10
PCIE_MRX_GTX_C_P14
1 C829 10
PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_N0
0.1U
1 C830 10
PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_N1
0.1U
1 C831 10
PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_N2
0.1U
1 C832 10
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_N3
0.1U
1 C833 10
PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_N4
0.1U
1 C834 10
PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_N5
0.1U
1 C835 10
PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_N6
0.1U
1 C836 10
PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_N7
0.1U
1 C837 10
PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_N8
0.1U
1 C838 10
PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_N9
0.1U
1 C839 10
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_N10 0.1U
1 C840 10
PCIE_MRX_GTX_C_N10
1 C841 10
PCIE_MRX_GTX_C_N11
1 C842 10
PCIE_MRX_GTX_C_N12
1 C843 10
PCIE_MRX_GTX_C_N13
1 C844 10
PCIE_MRX_GTX_C_N14
1 C845 10
PCIE_MRX_GTX_C_N15
U24
U23
PCIE_TX10P
PCIE_TX10N
PCIE_MRX_GTX_P0
PCIE_CALRN
AA22
PCIE_CALRN
2.0K
R591
PCIE_CALRP
Y22
PCIE_CALRP
1.27K
R592
PERSTB
M92-S2/M92-XT
Title
M92-S2 XT AJ072800T04
100-CG1675(216-0728004)
M92-S2 AJ072800T03
100-CG1643(216-0728003)
QUANTA
COMPUTER
VGA-M92-XT (PCIe)
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
16
of
64
MEMORY APERTURE SIZE SELECT

CFG3
GPIO9
CFG2
GPIO13
R1151
CFG1
GPIO12
CFG0
GPIO11
603
Q69
*SI2303BDS-T1-E3_NC
U32B
VGA_BLU
VGA_GRN
VGA_RED
PART 2 OF 10
256MB
+3.3V_DELAY
+3.3V_RUN
R146 1
R651
2 10K
2 *10K_NC
2 *10K_NC
*75K/F_NC
C868
*0.1U_NC
25
603
C867
*0.1U_NC
10
R145 1
L86
*BLM15BD121SN1D_NC
+DPC_VDD18
GPIO1
GPIO(1) - TX_DEEMPH_EN (Transmitter De-emphasis Enable)

0: Tx de-emphasis disabled for mobile mode
1: Tx de-emphasis enabled (Default setting for Desktop)
L84
R142 1
RAM_TYPE_CFG0
RAM_TYPE_CFG1
RAM_TYPE_CFG2
GPIO6
ATI Internal use only
2 *0_NC
0
0
OSC_SPREAD
R631
*0_reserve
2
R633
*0_NC
2
15 CLK_VGA_27M_SS
+3.3V_DELAY
CLK_VGA_27M_SSIN_R
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
R634
100/F
R637
120/F
OSC_OUT
1
R643
50 GFX_CORE_CNTRL2
29 PANEL_BKEN
2
*182R_reserve
R644
*1M_reserve
XTALIN
21
T86
50 GFX_CORE_CNTRL0
R638
*221/F_reserve
19 THERMAL_INT#
1
R640
2
*0_reserve
XTALOUT 21
18
BB_ENA
T89 PAD
GFX_CLKREQ#
R449 2
1 1K
T13
T28
T24
T25
C860
*12P_reserve
50
C861
*12P_reserve
HSYNC
VSYNC
+3.3V_RUN
2
*0_reserve
2
3
4
XIN/CLKIN XOUT
VSS
VDD
SO
PD#
SSCLK
REFCLK
1
R641
8
+3VL
7
6
5
2
OSC_SPREAD
U45
C955
*10U_reserve
805
10
L81
R669
1
2
R639
*10K_reserve
PAD
PAD
PAD
PAD
PAD
HPD1
R660
*10K_reserve
R664
PAD
PAD
PAD
PAD
U6
U10
T10
U8
U7
T9
T8
T7
P10
P4
P2
N6
N5
N3
Y9
N1
M4
R6
W10
M2
P8
P7
N8
N7
L6
L5
L3
L1
K4
*BLM11A05S_reserve
C956
*0.1U_reserve
+3.3V_RUN
C859
AB13
W8
W9
W7
AD10
AC14
+1.8V_RUN_GFX
R659
*10K_reserve
AVDD
AVDD=70mA max
AG24
C856
*0.1U_NC
R616
10K
R617
10K
HPD1
AVSSQ
AE22
+1.8V_RUN_GFX
VDD1DI
Q67
MMST3904-7-F
AE23
VDD1DI=45mA max
HDMI_DET
C863
*0.1U_NC
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6_TACH
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
RSET
Q68
DTC114TUAT106
AD23
R2
R2B
G2
G2B
B2
B2B
H2SYNC
V2SYNC
C
Y
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
A2VDD
AD22
RSET
R612
499R
AM12
AK12
VGA_RED
VGA_RED 25
AL11
AJ11
VGA_GRN
VGA_GRN
AK10
AL9
VGA_BLU
VGA_BLU 25
VGAHSYNC
VGAVSYNC
AL13
AJ13
25
VGAHSYNC
VGAVSYNC
25
25
AH12
AM10
AJ9
VREFG
AC16
L82
BLM15BD121SN1D
A2VDD=65mA max
C847
0.1U
C848
1U
C849
4.7uF
+1.8V_RUN_GFX
HPD1
+A2VDDQ
AE17
L85
BLM15BD121SN1D
A2VDDQ=1mA max
VREFG
C857
0.1U
2
249/F
A2VSSQ
0.1U
C858
1U
AE19
RESERVED
10
T29
PAD
N10
T27
T26
PAD
PAD
AB22
AC22
Keep A2VSSQ away from noisy ground.
NC_PWRGOOD
+1.8V_RUN_GFX
RSVD#8
RSVD#9
VDD2DI
PAD
PAD
L9
N9
T161 PAD
2
0
AB16
AB12
AB11
T77
T49
+1.8V_RUN_GFX
24
24
RAM_TYPE_CFG0
RAM_TYPE_CFG1
RAM_TYPE_CFG2
+A2VDD
AE20
C846
10nF
S0
-1.75% (DOWN)
24
R625
100K
DAC2
A2VDDQ
1
499/F
*P1819GF-08SR_reserve
+3.3V_DELAY
AH26
AJ27
+3.3V_DELAY
T21
T20
T22
T10
T12
If U4, the discrete spread spectrum chip

is not used, then pop R48 in order to
pull-down BXTALOUT for EMI reasons.
2 10K
2 *10K_NC
2 *10K_NC
AH24
AG25
50
Spread Spectrum
R596 1
R598 1
R600 1
Layout Note:
Place 150 ohm
termination resistors
close to ATI CHIP.
AL25
AJ25
+1.8V_RUN_GFX
COMP
OSC_OUT
PAD
50 GFX_CORE_CNTRL1
*1M_reserve
R642
VGAVSYNC
VGAHSYNC
TEMP_FAIL
2 *10K_NC
2 *10K_NC
2 10K
PAD
CLK_VGA_27M_SSIN_R
R141 1 *0_NC 2
T23
TEMP_FAIL
*27MHZ_reserve
R628 1
R627 1
R624 1
HDMI_HD_EN
TEMP_FAIL
GFX_CLKREQ#
VGAVSYNC
VGAHSYNC
1
10K
*10K_NC
10K
10K
10K
HDMI_HD_EN
T158 PAD
T159 PAD
RAM_CFG0
RAM_CFG1
RAM_CFG2
Y4
2
2
2
2
2
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23
R415
150/F
I/O
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
R636
*10K_NC
15 CLK_VGA_27M
1
1
1
1
1
Y7
V2
Y8
V4
AB7
W1
AB8
W3
AB9
W5
AC6
W6
AD7
AA3
AC8
AA5
AE8
AA6
AE9
AB4
AD9
AB2
AC10
AC5
VSS1DI
R635
R611
R613
R614
R615
R620
G
GB
DVPCNTL_MVP_0
DVPCNTL_MVP_1
R414
150/F
GPIO5
GPIO_5_AC_BATT
0 : Battery saving mode = 0.0 V
1 : AC (Performance mode) = 3.3 V
*10K_NC
*10K_NC
*10K_NC
*10K_NC
*10K_NC
*10K_NC
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
R413
150/F
AM26
AK26
As M82 design, for GPIO use
ATI reserved configuration straps.

ATI reserved configuration straps.
2
2
2
2
2
2
R143 1
R
RB
GPIO3
1
1
1
1
1
1
2 *0_NC
C891
*1U_NC
+DPC_VDD18
GPIO4
R603
R604
R605
R606
R607
R608
*BLM15BD121SN1D_NC
GPIO(2) - BIF_GEN2_EN (5.0 GT/s Enable)

0 : Default. (Driver Controlled Gen2)
1 : Strap Controlled Gen2
GPIO2
+PCIE_VDDC
GPIO0
2 *0_NC
C905
*1U_NC
FM9
setting
GPIO(0) - TX_PWRS_ENB (Transmitter Power Savings Enable)

0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
AA1
Y4
DIS only
DAC1
DVPCLK
B
BB
+1.8V_RUN_GFX
OPTIONAL RC NETWORK
TO FINE TUNE
POWER SEQUENCING
GPIO Straps DESCRIPTION OF DEFAULT SETTINGS

table
2 *0_NC
DPC_VDD18#1 and DPC_VDD18#2 are for

Future ASIC
For M92-S2: DO NOT Install any Component
in this Box.
Q72
*2N7002W-7-F_NC
19,29,50 GFX_ON
RAM_CFG0
RAM_CFG1
RAM_CFG2
U1
AC7
Y2
U5
+3.3V_DELAY
R595 1
R597 1
R599 1
2 *0_NC
512MB
R144 1
64MB
DVP PORT
For Park S3:

Install All components in this Box
L86,C960,C905,C898,L84,
C959,C891,C890,R142,
R143,R144,R145
R649
*100K_NC
128MB
MEMORY
SIZE
ENVDD
BIA_PWM
1
R645
R621
10K
R57
1
1K
2
AD19
+VDD2DI
L83
VDD2DI=40mA max
C850
10nF
NC#1
NC#2
RSVD#3
RSVD#2
RSVD#1
VSS2DI
TESTEN
R2SET
BLM15BD121SN1D
C851
0.1U
C852
1U
AC19
Place very close to ASIC balls.
A
AF24
AG13
R2SET
R646
715
M92-S2/M92-XT
Memory Straps
800MHz
512MB(64M*16) Samsung
800MHz
512MB(64M*16) Hynix
RAM_TYPE
_CFG2
RAM_TYPE
_CFG1
RAM_TYPE Quanta PN
_CFG0
(QuantaBuy)
AKD5LGGT502
AKD5LZGTW00
Quanta PN
(WinBuy)
Vendor PN
31 level PN
QUANTA
COMPUTER
K4W1G1646E-HC12
Title
H5TQ1G63BFR-12C
Size
Document Number
FM9
Date:
VGA-M92-XT (PCIe)
Rev
1A
Sheet
17
of
64
+1.5V_RUN
layout note: close to VDDR1#[1:17]
VDDR1#[1..17]=2A max
(PCIE_VDDC 1.0~1.1V +/- 5%@ 2A )

L12
C875
100nF
C877
100nF
C878
100nF
BLM18PG121SN1D
+PCIE_VDDC
+1.8V_RUN_GFX
C881
1U
C882
1U
C883
1U
C886
100nF
PCIE_VDDR#[1..8]=500mA max
C880
1U
C879
1U
(1.1V)
+1.1V_GFX_PCIE
C888
1U
C892
100nF
C889
1U
C893
10nF
C874
100nF
C168
10U
603
6.3
C873
10nF
C872
10nF
C68
10U
603
6.3
C871
10nF
C870
10nF
C869
10nF
C183
1U
402
6.3
C211
0.1U
C74
1U
402
6.3
C196
0.1U
10
10
C894
10U
U32D
+1.5V_RUN
PART 4 OF 10
+1.5V_RUN
C895
10U
C896
10U
H13
H16
H19
J10
J23
J24
J9
K10
K23
K24
K9
L11
L12
L13
L20
L21
L22
C897
10U
+1.8V_RUN_GFX
POWER
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
VDD_CT#[1..4]=110mA max
+VDD_CT
L87
AA20
AA21
AB20
AB21
BLM15BD121SN1D
C909
10U
+3.3V_DELAY
C910
100nF
C911
1U
C912
1U
C913
100nF
C914
1U
C899
1U
C915
1U
C916
100nF
AA17
AA18
AB17
AB18
C908
100nF
R45 2
VDDR4#[1..4] & VDDR5#[1..4]=340mA max
C920
100nF
C921
1U
C922
100nF
1 R148 0 2
1 R149 0 2
+1.5V_RUN
+VDDRH1
BLM15BD121SN1D
C923
1U
VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
1*150/F_NC
1 R150 0 2
1 R147 0 2
C919
1U
AA11
AA12
Y11
Y12
U11
U12
V11
V12
L17
VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4
VDDR5#1
VDDR5#2
VDDR5#3
VDDR5#4
VDDRHA
C924
1U
L16
(0.9~1.2V)
VDDC#[2..3]=120mA max
AA15
M11
M12
N15
N17
R13
R16
R18
R21
T12
T15
T17
T20
U13
U16
U18
U21
V15
V17
V20
V21
Y13
Y16
Y18
Y21
+BBP
C917
100nF
C918
1U
DDCI=2A max
+VDDCI
M13
M15
M16
M17
M18
M20
M21
N20
(0.9~1.2V)
(0.9~1.2V)
+1.8V_RUN_GFX
+VCC_GFX_CORE
Q70
2N7002W-7-F
(0.9~1.2V)
C866
1U
Q71
+VCC_GFX_CORE
SI2301BDS-T-GE3
402
1
R652
2
100K
layout note: close to VDDC#[1:25]

+5V_RUN
6.3
Q74
2N7002W-7-F
BB_ENA
C925
1U
C926
1U
C927
1U
C929
1U
C933
1U
C934
1U
C935
1U
C904
1U
C906
1U
C907
10U
C930
1U
GND
AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U3
U9
V13
V16
V18
V6
Y10
Y15
Y17
Y20
Y6
T11
R11
A32
AM1
AM32
M92-S2/M92-XT
17
C903
1U
PART 5 OF 10
M92-S2/M92-XT
+BBP
C902
1U
U32E
C901
1U
L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22
VSSRHA
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
C900
1U
+VCC_GFX_CORE
+1.8V_RUN_GFX
L88
+PCIE_VDDC
PCIE_VDDC#[1..12]=2A max
VDDR3#[1..4]=50mA max
For M92-S2: Install R147,R148,R149

Use R150 0R to VDDR4
M93-S3 and Park: Remove R147,R148,R149
Use R45 150 Ohms Pull Down
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
(1.1V)
AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26
R653
10K
(0.9~1.2V)
C931
1U
C932
1U
C936
1U
C937
1U
C939
1U
+VCC_GFX_CORE
(0.9~1.2V)
+VDDCI
L89
BLM18EG221SN1D
(0.9~1.2V)
C941
100nF
+VCC_GFX_CORE
C942
100nF
C943
1U
C944
1U
C945
10U
C947
10U
C946
10U
C948
10U
Title
QUANTA
COMPUTER
VGA-M92-XT (PCIe)
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
18
of
64
MEMORY INTERFACE
U32C
D
PART 3 OF 10
20
A_BA[2..0]
A_BA[2..0]
DIVIDER RESISTORS
DDR3
MVREF TO 1.5V
100R
MVREF TO GND
100R
H28
C27
A23
E19
E15
D10
D6
G5
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B
H27
A27
C23
C19
C15
E9
C5
H4
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
ODTA0
ODTA1
L18
K16
ODTA0 20
ODTA1 20
CLKA0
CLKA1
H26
G9
CLKA0 20
CLKA1 20
CLKA0B
CLKA1B
H25
H9
CLKA0# 20
CLKA1# 20
RASA0B
RASA1B
G22
G17
RASA0# 20
RASA1# 20
CASA0B
CASA1B
G19
G16
CASA0# 20
CASA1# 20
CSA0B_0
CSA0B_1
H22
J22
CSA0_0# 20
CSA1B_0
CSA1B_1
G13
K13
CSA1_0#
CKEA0
CKEA1
K20
J17
CKEA0 20
CKEA1 20
WEA0B
WEA1B
G25
H10
WEA0# 20
WEA1# 20
R671
4.7K
2
2N7002W-7-F
R656
100R
MVREFD_A
K26
J26
R657
100R
C950
0.1U
+3.3V_ADM1032A
SMBDAT2
SCLK
SDATA
ALERT#
GND
VDD
D+
D-
THERM#
29
THERMAL_INT#
VGA_THERMDP
21
VGA_THERMDN
21
U46
17 THERMAL_INT#
MVREFS_A
R661
4.7K
C952
0.1U
C953
10nF
MVREFDA
MVREFSA
C951
10nF
R658
100R
C957
2200P
50
MB_THERM#
MB_THERM# 46
ADM1032ARMZ-1
MB_THERM#
R673 2
1 10K
THERMAL_INT#
R674 2
1 10K
+3.3V_ADM1032A
C958
0.1U
10
Q80
SI2303BDS-T1-E3
+3.3V_ADM1032A
+3.3V_SUS
R686
100K
17,29,50
GFX_ON
Q81
2N7002W-7-F
R662
4.7K
CLKTESTA
CLKTESTB
K8
L7
CLKTESTA
CLKTESTB
MEMTEST
J8
MEM_CALRP1
R663
243R
R667
R668
R670
243R
243R
243R
G20
G14
K7
K25
J25
NC_MAA_13
NC_MAA_14
NC_MEM_CALRN1
NC_MEM_CALRP0
NC_MEM_CALRN0
DRAM_RST
L10
DRAM_RST#
20
A
M92-S2/M92-XT
C884
R192
4.7K
1U
20
+1.5V_RUN
R151
4.7K
+1.5V_RUN
20
R665
100R
R672
4.7K
Q76
1
2N7002W-7-F
+1.5V_RUN
+1.5V_RUN
THERMAL MONITOR
Q75
1
SMBCLK2
QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7
29
MAA[12..0]
20 MAA[12..0]
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
+3.3V_ADM1032A
20 MDA[63..0]
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
E32
E30
A21
C21
E13
D12
E3
F4
+3.3V_ADM1032A
MDA[63..0]
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_BA0
MAA_BA1
MAA_12
MAA_BA2
DQMA#[7..0]
20 DQMA#[7..0]
MEMORY
INTERFACE
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
A_BA0
A_BA1
MAA12
A_BA2
20 QSA[7..0]
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
K17
J20
H23
G23
G24
H24
J19
K19
J14
K14
J11
J13
J16
L15
H11
G11
QSA[7..0]
K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
WRITE STROBE READ STROBE
QSA#[7..0]
20 QSA#[7..0]
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MAA13
Title
QUANTA
COMPUTER
VGA-M92-XT (PCIe)
Reserve for Park-S3

5
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
19
of
64
MDA[63..0]
19 MDA[63..0]
MAA[12..0]
19 MAA[12..0]
QSA[7..0]
19 QSA[7..0]
QSA#[7..0]
19 QSA#[7..0]
DQMA#[7..0]
19 DQMA#[7..0]
DDR3
DRAM_RST#
19 DRAM_RST#
A_BA[2..0]
19 A_BA[2..0]
U47
U48
U49
U50
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
Reserve for Park-S3
ODTA0
CSA0_0#
RASA0#
CASA0#
WEA0#
K1
L2
J3
K3
L3
QSA0
QSA2
F3
C7
DQMA#0
DQMA#2
E7
D3
QSA#0
QSA#2
G3
B7
DRAM_RST# T2
L8
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
R574
243/F
A1
A8
C1
C9
D2
E9
F1
H2
H9
J7
K7
K9
ODTA0
CSA0_0#
RASA0#
CASA0#
WEA0#
K1
L2
J3
K3
L3
QSA1
QSA3
F3
C7
DQMA#1
DQMA#3
E7
D3
QSA#1
QSA#3
G3
B7
DRAM_RST# T2
L8
Should be 240
Ohms +-1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R581
240/F
Reserve for Park-S3
+1.5V_RUN
A1
A8
C1
C9
D2
E9
F1
H2
H9
19
19
19
CLKA1
CLKA1#
CKEA1
19
19
19
19
19
ODTA1
CSA1_0#
RASA1#
CASA1#
WEA1#
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
A_BA0
A_BA1
A_BA2
M2
N8
M3
CLKA1
CLKA1#
CKEA1
J7
K7
K9
ODTA1
CSA1_0#
RASA1#
CASA1#
WEA1#
K1
L2
J3
K3
L3
QSA5
QSA4
F3
C7
DQMA#5
DQMA#4
E7
D3
QSA#5
QSA#4
G3
B7
DRAM_RST#
T2
L8
Should be 240
Ohms +-1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA45
MDA42
MDA47
MDA40
MDA44
MDA43
MDA46
MDA41
D7
C3
C8
C2
A7
A2
B8
A3
MDA33
MDA38
MDA35
MDA34
MDA36
MDA37
MDA32
MDA39
19
+1.5V_RUN
BA0
BA1
BA2
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
DQSL
DQSU
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
RESET
ZQ
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R582
240/F
M8
H1
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
Reserve for Park-S3
+1.5V_RUN
A1
A8
C1
C9
D2
E9
F1
H2
H9
19
19
19
CLKA1
CLKA1#
CKEA1
19
19
19
19
19
ODTA1
CSA1_0#
RASA1#
CASA1#
WEA1#
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
A_BA0
A_BA1
A_BA2
M2
N8
M3
CLKA1
CLKA1#
CKEA1
J7
K7
K9
ODTA1
CSA1_0#
RASA1#
CASA1#
WEA1#
K1
L2
J3
K3
L3
QSA7
QSA6
F3
C7
DQMA#7
DQMA#6
E7
D3
QSA#7
QSA#6
G3
B7
DRAM_RST#
T2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA63
MDA58
MDA56
MDA59
MDA60
MDA62
MDA57
MDA61
D7
C3
C8
C2
A7
A2
B8
A3
MDA52
MDA50
MDA55
MDA49
MDA54
MDA51
MDA53
MDA48
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
RESET
ZQ
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
DQSL
DQSU
+1.5V_RUN
A1
A8
C1
C9
D2
E9
F1
H2
H9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
R583
240/F
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
K4W1G1646E-HC12
J1
L1
J9
L9
E3
F7
F2
F8
H3
H8
G2
H7
+1.5V_RUN
BA0
BA1
BA2
L8
Should be 240
Ohms +-1%
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
K4W1G1646E-HC12
B2
D9
G7
K2
K8
N1
N9
R1
R9
MAA13
VREFC_U50
VREFD_U50
J1
L1
J9
L9
E3
F7
F2
F8
H3
H8
G2
H7
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
K4W1G1646E-HC12
B2
D9
G7
K2
K8
N1
N9
R1
R9
MAA13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
J1
L1
J9
L9
19
+1.5V_RUN
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
VREFCA
VREFDQ
+1.5V_RUN
2
1
C1033
0.1U
10
R515
4.99K/F
R517
4.99K/F
C1034
0.1U
10
C1027
0.1U
10
R512
4.99K/F
C1026
0.1U
10
R518
4.99K/F
VREFD_U50
VREFC_U50
C1025
0.1U
10
R508
4.99K/F
R514
4.99K/F
2
VREFD_U49
C1024
0.1U
10
R510
4.99K/F
R516
4.99K/F
VREFC_U49
2
2
C1023
0.1U
10
R511
4.99K/F
2
VREFD_U48
R506
4.99K/F
C1022
0.1U
10
R513
4.99K/F
VREFC_U48
VREFD_U47
1
R499
4.99K/F
R507
4.99K/F
R509
4.99K/F
R505
4.99K/F
VREFC_U47
56/F
0.01U
ODTA0
CSA0_0#
RASA0#
CASA0#
WEA0#
CLKA0
CLKA0#
CKEA0
MDA29
MDA27
MDA31
MDA24
MDA28
MDA26
MDA30
MDA25
M8
H1
+1.5V_RUN
Placement has to be close to VRAM
C1051
19
19
19
19
19
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
R497
4.99K/F
R949
CLKA0
CLKA0#
CKEA0
D7
C3
C8
C2
A7
A2
B8
A3
VREFC_U49
VREFD_U49
+1.5V_RUN
CLKA0
19
19
19
M2
N8
M3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA8
MDA14
MDA11
MDA9
MDA10
MDA15
MDA12
MDA13
NC#J1
NC#L1
NC#J9
NC#L9
96-BALL
SDRAM DDR3
K4W1G1646E-HC12
+1.5V_RUN
A_BA0
A_BA1
A_BA2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
E3
F7
F2
F8
H3
H8
G2
H7
J1
L1
J9
L9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B2
D9
G7
K2
K8
N1
N9
R1
R9
MAA13
Reserve for Park-S3
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
Should be 240
Ohms +-1%
19
+1.5V_RUN
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
VREFCA
VREFDQ
MDA18
MDA22
MDA17
MDA21
MDA19
MDA23
MDA16
MDA20
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
M8
H1
ODTA0
CSA0_0#
RASA0#
CASA0#
WEA0#
J7
K7
K9
D7
C3
C8
C2
A7
A2
B8
A3
VREFC_U48
VREFD_U48
19
19
19
19
19
CLKA0
CLKA0#
CKEA0
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
MDA4
MDA3
MDA7
MDA1
MDA6
MDA2
MDA5
MDA0
CLKA0
CLKA0#
CKEA0
M2
N8
M3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
E3
F7
F2
F8
H3
H8
G2
H7
19
19
19
A_BA0
A_BA1
A_BA2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
VREFCA
VREFDQ
MAA13
M8
H1
19
VREFC_U47
VREFD_U47
25
0.01U
C1021
1U
6.3
C1028
1U
6.3
6.3
6.3
C1047
10U
603
6.3
C1018
1U
C1017
1U
C1064
10U
603
6.3
C1065
10U
603
6.3
Sheet
20
6.3
C1016
1U
6.3
+1.5V_RUN
C1010
1U
6.3
C1009
1U
6.3
C1008
1U
6.3
6.3
+1.5V_RUN
C1002
1U
C1015
1U
6.3
C1014
1U
6.3
C1013
1U
6.3
6.3
C1001
1U
C1066
10U
603
6.3
C1056
10U
603
6.3
C1057
10U
603
6.3
C1044
10U
603
6.3
C1062
10U
603
6.3
C1061
10U
603
6.3
C1060
10U
603
6.3
C1045
10U
603
6.3
+1.5V_RUN
C1053
10U
603
6.3
C1050
10U
603
6.3
C1049
10U
603
6.3
C1043
10U
603
6.3
C1007
1U
+1.5V_RUN
C1000
1U
6.3
6.3
C1006
1U
+1.5V_RUN
6.3
6.3
+1.5V_RUN
C1005
1U
6.3
C996
1U
6.3
6.3
+1.5V_RUN
C995
1U
C994
1U
+1.5V_RUN
C999
1U
close to U50
+1.5V_RUN
6.3
C993
1U
6.3
C992
1U
6.3
C991
1U
close to U49
+1.5V_RUN
close to U48
+1.5V_RUN
close to U47
+1.5V_RUN
25
C1052
56/F
R958
CLKA1#
56/F
R953
CLKA1
56/F
R952
CLKA0#
C1058
10U
603
6.3
Title
QUANTA
COMPUTER
VGA-M92-S (VRAM)
Size
Document Number
FM9
Date:
Rev
1A
of
64
U32J
Part 10 of 10
XTAL / PLL
H7
T163 PAD
NC_SPV18
AF14
+DPLL_PVDD
L98
BLM15BD121SN1D
C1131
10nF
J7
+1.8V_RUN_GFX
DPLL_PVDD=120mA max
DPLL_PVDD
SPVSS
DPLL_PVSS
C1132
0.1U
C1133
10U
C1134
10U
AE14
SPV10=120mA max
(1.1V)
(0.9~1.2V)
+SPV10
L99
BLM15BD121SN1D
+VCC_GFX_CORE
C1135
1U
C1136
C1137
0.1U
1U
H8
+PCIE_VDDC
SPV10
DPLL_VDDC=150mA max
C1138
10nF
DPLL_VDDC
AD14
+DPLL_VDDC
L100
BLM15BD121SN1D
C1139
10nF
C1140
0.1U
C1141
1U
C1142
10U
+1.8V_RUN_GFX
PCIE_PVDD=40mA max
17
AM28
XTALIN
XTALIN
PCIE_PVDD
AM30
+PCIE_PVDD
L101
BLM15BD121SN1D
C1144
1U
17
AK28
XTALOUT
C1146
0.1U
C1147
10U
XTALOUT
NC_MPV18
C
C1145
10nF
L8
PAD T164
C
M92-S2/M92-XT
U32H
Part 8 of 10
I2C / DDC / AUX

AUX1P
AUX1N
DDC6CLK
DDC6DATA
R1
R3
SCL
SDA
TMDP / DAC1
25 G_CLK_DDC2
25 G_DAT_DDC2
CRT
DDC1CLK
DDC1DATA
LVTMDP / DAC2
AC1
AC3
DDCCLK_AUX5P
DDCDATA_AUX5N
AUX2P
AUX2N
DDC2CLK
DDC2DATA
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N
AD2
AD4
AE6
AE5
+3.3V_DELAY
LVDS
LCD_DDCCLK
LCD_DDCDAT
LCD_DDCCLK 24
LCD_DDCDAT 24
LCD_DDCDAT
LCD_DDCCLK
R418 2
R404 2
1 2.2K
1 2.2K
AD13
AD11
AC11
AC13
HDMI
HDMI_SCL 24
HDMI_SDA 24
AE16
AD16
AD20
AC20
M92-S2/M92-XT
U32I
Part 9 of 10
+1.8V_RUN_GFX
TSVDD=20mA max
C1155
1U
TSS FDO
+TSVDD
L102
BLM15BD121SN1D
AD17
TSVDD
C1156
0.1U
TS_FDO
DPLUS
GND
AC17
TSVSS
DMINUS
R5
T4
VGA_THERMDP 19
T2
VGA_THERMDN 19
M92-S2/M92-XT
Title
QUANTA
COMPUTER
VGA-M92-XT (PCIe)
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
21
of
64
TMDP(HDMI) INTERFACE
LVDS INTERFACE
U32F
PART 6 OF 10
D
+DPA_PVDD
AG8
AG7
+DPA_VDD18
AF11
AE11
+DPA_VDD10
AF6
AF7
U32G
DPA
DPA_PVDD
TX2P_DPA0P
TX2M_DPA0N
AK3
AK1
TX1P_DPA1P
TX1M_DPA1N
AH3
AH1
TX0P_DPA2P
TX0M_DPA2N
AG3
AG5
TXCAP_DPA3P
TXCAM_DPA3N
AF2
AF4
DPA_VSSR#5
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#2
DPA_VSSR#1
AH5
AG1
AG6
AE3
AE1
DPA_PVSS
NC_DPA_VDD18#2
NC_DPA_VDD18#1
DPA_VDD10#1
DPA_VDD10#2
+DPF_PVDD
+DPF_VDD18
+DPF_VDD10
DPB
C
+DPA_PVDD
AG10
AG11
+DPA_VDD18
AE13
AF13
DPB_PVDD
DPB_PVSS
TX5P_DPB0P
TX5M_DPB0N
AK8
AL7
HDMI_TX2+ 24
HDMI_TX2- 24
TX4P_DPB1P
TX4M_DPB1N
AJ7
AH6
HDMI_TX1+ 24
HDMI_TX1- 24
TX3P_DPB2P
TX3M_DPB2N
AK6
AM5
HDMI_TX0+ 24
HDMI_TX0- 24
TXCBP_DPB3P
TXCBM_DPB3N
AK5
AM3
HDMI_CLK+ 24
HDMI_CLK- 24
DPB_VSSR#5
DPB_VSSR#2
DPB_VSSR#1
DPB_VSSR#4
DPB_VSSR#3
NC_DPB_VDD18#1
NC_DPB_VDD18#2
AF8
AF9
DPB_VDD10#1
DPB_VDD10#2
DPAB_CALR
AG19
AF20
NC_DPF_PVSS
AG17
AF16
DPF_VDD18#2
DPF_VDD18#1
AG22
AF22
RSVD#6
RSVD#4
AK24
AJ23
T2X5P_DPF0P
T2X5M_DPF0N
AL23
AK22
LCD_B2+ 24
LCD_B2- 24
T2X4P_DPF1P
T2X4M_DPF1N
AH22
AJ21
LCD_B1+ 24
LCD_B1- 24
T2X3P_DPF2P
T2X3M_DPF2N
AL21
AK20
LCD_B0+ 24
LCD_B0- 24
T2XCFP_DPF3P
T2XCFM_DPF3N
AH20
AJ19
LCD_BCLK+ 24
LCD_BCLK- 24
DPF_VSSR#4
DPF_VSSR#5
DPF_VSSR#2
DPF_VSSR#1
DPF_VSSR#3
AM22
AM24
AG23
AF23
AM20
DPF_VDD10#2
DPF_VDD10#1
DPE
+DPF_PVDD
AG18
DPE_PVDD
AF19
DPE_PVSS
AM8
AG9
AF10
AM6
AH8
AE10 DPAB_CALR 150R
DPF
NC_DPF_PVDD
+DPF_VDD18
AG16
AG15
DPE_VDD18#2
DPE_VDD18#1
+DPF_VDD10
AG21
AG20
DPE_VDD10#2
DPE_VDD10#1
CALIBRATION
+DPA_VDD10
Part 7 of 10
RSVD#7
RSVD#5
AL19
AK18
T2X2P_DPE0P
T2X2M_DPE0N
AH18
AJ17
LCD_A2+ 24
LCD_A2- 24
T2X1P_DPE1P
T2X1M_DPE1N
AL17
AK16
LCD_A1+ 24
LCD_A1- 24
T2X0P_DPE2P
T2X0M_DPE2N
AH16
AJ15
LCD_A0+ 24
LCD_A0- 24
T2XCEP_DPE3P
T2XCEM_DPE3N
AL15
AK14
LCD_ACLK+ 24
LCD_ACLK- 24
DPE_VSSR#3
DPE_VSSR#2
DPE_VSSR#1
DPE_VSSR#4
DPE_VSSR#5
AM14
AH14
AG14
AM16
AM18
R721
M92-S2/M92-XT
+1.8V_RUN_GFX
for HDMI interface use

DPB_PVDD=20mA max
+1.8V_RUN_GFX
+DPA_PVDD
C1158
1U
C1159
0.1U
for LVDS interface use
+1.8V_RUN_GFX
NC_DPB_VDD18#[1..2]=400mA max
C1161
1U
1U
C1168
0.1U
NC_DPB_VDD18#[1..2]=400mA max
+DPF_VDD18
L108
BLM15BD121SN1D
(1.1V)
DPB_VDD10#[1..2]=200mA max
C1172
4.7uF_6.3V
C1174
1U
C1169
0.1U
+PCIE_VDDC
+DPA_VDD10
L105
BLM18PG300SN1D
DPE_VDD10#[1..2]=170mA max
C1163
4.7uF_6.3V
C1164
1U
+DPF_VDD10
L107
BLM18PG300SN1D
C1165
0.1U
Title
C1170
4.7uF_6.3V
C1167
+1.8V_RUN_GFX
C1162
0.1U
+PCIE_VDDC
A
R726
+DPF_PVDD
+DPA_VDD18
L104
BLM15BD121SN1D
C1160
4.7uF_6.3V
AF17 DPEF_CALR 150R
DPB_PVDD=20mA max
L106
BLM15BD121SN1D
C1173
4.7uF_6.3V
(1.1V)
DPEF_CALR
M92-S2/M92-XT
L103
BLM15BD121SN1D
C1157
4.7uF_6.3V
CALIBRATION
C1166
1U
C1171
0.1U
QUANTA
COMPUTER
VGA-M92-XT (PCIe)
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
22
of
64
Title
QUANTA
COMPUTER
VGA-M82-S (PCIe)
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
23
of
64
J1
1
2
1
17
3
2
Q47
2N7002W-7-F
Q50
2N7002W-7-F
Support the new imbeded

diagnostics.
2
R386
47K
25
25
+3.3V_SUS
C495
0.01U
C499
0.01U
R388
*100K_NC
C498
22U
1206
10
R383
47
805
LCDVCC_ON
1
3
D1
1
ENVDD
EN_LCDVCC
Q3
DDTC124EUA-7-F
29 LCDVCC_TST_EN
2
BAT54C T/R
LCD_B0LCD_B0+
LCD_B1LCD_B1+
22
22
LCD_B0LCD_B0+
22
22
LCD_A2LCD_A2+
22
22
LCD_A1LCD_A1+
22
22
LCD_A0LCD_A0+
22
22
+3.3V_RUN
C7
0.1U
10
LCD_B1LCD_B1+
22
22
C6
0.047U
R384
330K
4
2
6
5
2
1
LCD_B2LCD_B2+
Q49
FDC655BN
+LCDVCC
LCD_B2LCD_B2+
+LCDVCC
LCD_BCLKLCD_BCLK+
+3.3V_RUN
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+15V_ALW
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
10
C5
0.1U
10
LCD_ACLKLCD_ACLK+
LCD_A2LCD_A2+
LCD_A1LCD_A1+
LCD_A0LCD_A0+
LCD_DDCCLK
LCD_DDCDAT
LCD_DDCCLK
LCD_DDCDAT
21
21
+3.3V_RUN
+LCDVCC
Adress : A9H --Contrast

AAH --Backlight
LCD_TST 29
+GFX_PWR_SRC
LCD_CONTRAST
29
INVERTER_CBL_DET#
LCD_BAK# 29
ATI_PWM
LCD_CBL_DET#
29
C
29
FI-TD44SB-LE
+3.3V_RUN
LCD_B0LCD_B1LCD_B2LCD_A0LCD_A1LCD_A2-
R380
*10K_NC
PWM_VADJ
R400
1
*0_NC
2
R379
1
BIA_PWM
17
C16
C10
C15
C13
C12
C3
1
1
1
1
1
1
2
2
2
2
2
2
*3.3P_NC
*3.3P_NC
*3.3P_NC
*3.3P_NC
*3.3P_NC
*3.3P_NC
50
50
50
50
50
50
LCD_B0+
LCD_B1+
LCD_B2+
LCD_A0+
LCD_A1+
LCD_A2+
EXC24CG240U
HDMI_TX2+_R
HDMI_TX2-_R
4
1
LCD_ACLK- 22
LCD_ACLK+ 22
LCD_BCLK-
22
22
HDMI_TX1HDMI_TX0+
22
22
HDMI_TX0HDMI_CLK+
22
HDMI_CLK-
C26
C23
0.1U/10V/X7R
0.1U/10V/X7R
HDMI_TX2-_R
HDMI_TX1+_R
C22
C27
0.1U/10V/X7R
0.1U/10V/X7R
HDMI_TX1-_R
HDMI_TX0+_R
C30
C21
0.1U/10V/X7R
0.1U/10V/X7R
HDMI_TX0-_R
HDMI_CLK+_R
C20
0.1U/10V/X7R
HDMI_CLK-_R
1
4
HDMI_CLK+_C
HDMI_CLK-_C
2
3
L4
R29
1
*0_NC
2
R25
1
*0_NC
2
R27
1
*0_NC
2
R24
1
*0_NC
2
R387
2.2K
HDMI_TX0-_C
HDMI_CLK+_C
HDMI_CLK-_C
+3.3V_DELAY
21 HDMI_SDA
HDMI_DAT
17
HDMI_DET
FDV301N
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SHELL1
D2+ GND
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DETGND
SHELL2
20
22
+5V_RUN
1 499/F
1 499/F
HDMI_TX2+_R
HDMI_TX2-_R
2
2
1 499/F
1 499/F
HDMI_TX1+_R
HDMI_TX1-_R
R396
R397
2
2
1 499/F
1 499/F
HDMI_TX0+_R
HDMI_TX0-_R
R391
R390
2
2
1 499/F
1 499/F
HDMI_CLK+_R
HDMI_CLK-_R
2
Q5
2N7002W-7-F
LTS_ABA-HDM-018-K06
Title
QUANTA
COMPUTER
LCD CONN & CK-SSCD
C500
*0.1U_NC
2
2
R393
R392
23
21
+5V_RUN
R394
R395
HDMI_CLK
HDMI_TX1-_C
HDMI_TX0+_C
R389
2.2K
FDV301N
1
Q4
R13
4.7K
Q2
HDMI_CLK+_R
HDMI_CLK-_R
HDMI_TX2+_R
HDMI_TX2-_C
HDMI_TX1+_C
0.1U/10V/X7R
HDMI_TX2+_C
603
1
C25
HDMI_TX2HDMI_TX1+
EXC24CG240U
HDMI_TX1+_C
HDMI_TX1-_C
2
3
CN1
R191
+5V_RUN
2
22
22
*0_NC
2
HDMI
+3.3V_DELAY
3 1
A
LCD_BCLK+ 22
50
21 HDMI_SCL
HDMI_TX2+
R34
1
L5
LCD_BCLK+
R21
4.7K
22
*0_NC
2
1
4
C1
*3.3P_NC
Q48
2N7002W-7-F
*0_NC
2
R32
1
R1
*0_NC
RUN_ON
R33
1
LCD_BCLK- 22
R5
100K
44,47,48,49,52
L7
*0_NC
2
C11
0.1U
603
50
HDMI_TX0+_C
HDMI_TX0-_C
1
4
R31
1
EXC24CG240U
HDMI_TX1+_R
HDMI_TX1-_R
50
C4
0.1U
603
50
2
3
LCD_ACLK+
C14
0.1U
603
50
Q1
FDC658AP
C2
*3.3P_NC
R7
100K
40mil
6
5
2
1
R4
*0_NC
+GFX_PWR_SRC
40mil
HDMI_TX0+_R
HDMI_TX0-_R
L6
LCD_ACLK-
+PWR_SRC
EXC24CG240U
HDMI_TX2+_C
HDMI_TX2-_C
3
2
ATI_PWM
29
Shunt capacitors on LVDS for improving WWAN.
Populate R379 for DPST

implementation only.
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
24
of
64
+5V_RUN
D2
SDM10K45-7-F
+3.3V_RUN
D5
*DA204U_NC
D6
*DA204U_NC
D4
*DA204U_NC
Layout Note:
Setting R,G,B treac
impedance to 50 ohm.
+5V_CRT_REF
17
VGA_RED
L21
603
17
VGA_GRN
L13
603
BLM18BB750SN1D
BLM18BB750SN1D
RED
PAD
50
50
C67
10P
C77
10P
C93
22P
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
BLUE
BLM18BB750SN1D
50
JVGA1
50
C76
22P
C62
22P
R69
150/F
R53
150/F
2
R44
150/F
M_SEN#_R
GREEN
L11
603
VGA_BLU
17
3
T15
50
C108
10P
50
PAD
T9
M_ID2#
+5V_CRT_REF
+3.3V_DELAY
RP2
2.2KX2
4
2
G_DAT_DDC2_C
G_CLK_DDC2_C
1
Q52
BSS138-7-F
0.1U
2
1
21 G_CLK_DDC2
C49
*10P_NC
HSYNC
2
4
74AHCT1G125GW
C46
25
+3.3V_RUN
VGAHSYNC
RP1
2.2KX2
1K
U2
50
C59
*10P_NC
50
BLM11A05S
JVGA_HS
L10
10
603
U1
L8
VGAVSYNC
VSYNC
JVGA_VS
50
50
1
C45
10P
C36
10P
74AHCT1G125GW
603
17
BLM11A05S
C43
10P
17
C35
0.01U
4
2
21 G_DAT_DDC2
R38
2
Q53
BSS138-7-F
+5V_RUN
SUY_ 070549FR015S512ZR
3
1
2
3
1
+5V_CRT_REF
50
C38
10P
50
Place near JVGA1

connector < 200 mil
Title
QUANTA
COMPUTER
CRT&TV CONN
Size
Document Number
FM9
Date:
Rev
1A
Sheet
E
25
of
64
MFIO Pin Assignment Table
MFIO SD8 MS8

00
WP BS
01
D1
02
D0 D1
03
D7
04
D6 D5
05
CLK D0
06
07
D5 D4
08
CMD D2
09
D4 D6
10
D3 D3
11
D2
12
13
- D7
- CLK
14
1394_XI
1394_XO
2
1
C1517 10P 50
44
43
XI
XO
MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14
4
5
U3036
MFCD0N
MFCD1N
25
26
27
28
29
30
31
32
33
34
35
38
39
40
41
SD_WP#/MS_BS/XD_DATA7 28
SD_DATA1/XD_DATA6 28
SD_DATA0/MS_DATA1/XD_DATA5 28
SD_DATA7/XD_DATA4 28
SDATA_6/MS_DATA5/XD_DATA3 28
SD_CLK/MS_DAT0/XD_DATA2 28
XD_DATA1 28
SD_DATA5/MS_DATA4/XD_DATA0
SD_CMD/MS_DATA2/XD_WP# 28
SD_DATA4/MS_DATA6/XD_WE# 28
SD_DATA3/MS_DATA3/XD_ALE 28
SD_DATA2/XD_CLE 28
XD_CE# 28
MS_DATA7/XD_RE# 28
MS_CLK/XD_R/B# 28
SD_CD#/XD_CD0# 28
MS_INS#/XD_CD1# 28
+3.3V_R5U230
VCC_3V1
VCC_3V0
11
37
Y9
24.576MHZ
30PPM
16p
C1518 C1519
0.1U
PCIE_VOUT1
PCIE_VOUT0
12
42
PCIE_VIN1
PCIE_VIN0
18
23
0.1U
2
1
C1520 10P 50
C1524
C1525
TXP
TXN
0.1U
0.1U
19
20
15
17
9 PCIE_TX5+
9 PCIE_TX53,9,16,28,29,31,32,41
PLTRST#
RXC
TXP
TXN
C1530
0.022U
C1531
1500P
0.1U
0.1U
C1523
10U
603
6.3
+3.3V_RUN
+3.3V_R5U230
R1152 0
1
2
805
C1526 C1527
RXP
RXN
0.1U
PERSTN
RXC
CPO
RREF
AVCC_3V
0.1U
+MF_VCC
R1153
5.1K/F
C1528
C1529
0.1U
1U
36
MF_VOUT
+3.3V_R5U230
RREF
9
16
22
24
C1521 C1522
REFCLKP
REFCLKN
13
14
9 CLK_PCIE_CARD_READER
9 CLK_PCIE_CARD_READER#
9 PCIE_RX5+
9 PCIE_RX5-
XD
D7
D6
D5
D4
D3
D2
D1
D0
WP#
WE#
ALE
CLE
CE#
RE#
R/B#
GND0
AGND0
R1154
56.2/F
R1155
56.2/F
R1156
56.2/F
R1157
56.2/F
R5U230
49
21
TEST
TPBN0
TPBP0
TPAN0
TPAP0
TPBIAS0
10
45
46
47
48
1
UDIO0
UDIO1
UDIO2
UDIO3
TPB0N
TPB0P
TPA0N
TPA0P
TPB0N
TPB0P
TPA0N
TPA0P
3
6
7
8
28
28
28
28
9 CLK_PCIE_REQ5#
R1158
5.11K/F
C1532
270P
25
C1533
0.33U
+3.3V_R5U230
R1159
2
1 47K
Title
QUANTA
COMPUTER
5 IN 1 CONTROLLER
Size
Document Number
FM9
Date:
Rev
1A
Sheet
E
26
of
64
Title
QUANTA
COMPUTER
IEEE 1394
Size
Document Number
FM9
Date:
Rev
1A
Sheet
E
27
of
64
Express Card/CARD READER

J6
26 SD_DATA7/XD_DATA4
SD_DATA5/MSDATA_4/XD_DATA0
26 SD_WP#/MS_BS/XD_DATA7
26
XD_DATA1
SD_DATA7/XD_DATA4
25
24
SD_WP#/MS_BS/XD_DATA7
23
XD_DATA1
22
26
SD_DATA1/XD_DATA6
27
SDATA_6/MS_DATA5/XD_DATA3
28
29
SD_CLK/MS_DAT0/XD_DATA2
30
SD_DATA3/MS_DATA3/XD_ALE
21
26
XD_CE#
XD_CE#
20
31,32,35 WLAN_SMBCLK
WLAN_SMBDATA
32
SD_CMD/MS_DATA2/XD_WP#
33
SD_DATA4/MS_DATA6/XD_WE#
34
SD_DATA2/XD_CLE
35
MS_DATA7/XD_RE#
18
WLAN_SMBCLK
17
16
26 MS_INS#/XD_CD1#
26 SD_CD#/XD_CD0#
MS_INS#/XD_CD1#
15
SD_CD#/XD_CD0#
14
37
PCIE_WAKE#
38
CARD_CLK_REQ#
39
EXPRCRD_PWREN#
12
26 MS_CLK/XD_R/B#
26
SD_CLK/MS_DAT0/XD_DATA2
26
26
SD_DATA3/MS_DATA3/XD_ALE
26
SD_CMD/MS_DATA2/XD_WP#
26
SD_DATA4/MS_DATA6/XD_WE#
SD_DATA2/XD_CLE
26
26
MS_DATA7/XD_RE# 26
36
13
26
SDATA_6/MS_DATA5/XD_DATA3
31
19
31,32,35 WLAN_SMBDATA
SD_DATA1/XD_DATA6
MS_CLK/XD_R/B#
PCIE_WAKE# 7,31,32,41
CARD_CLK_REQ#
PAD T160
11
40
10
+MF_VCC
PLTRST#
41
9
PLTRST# 3,9,16,26,29,31,32,41
42
8
43
7
+1.5V_RUN
44
+1.5V_RUN
6
45
5
1394 CONNECTOR
46
4
+3.3V_RUN
47
+3.3V_RUN
AS CLOSE AS POSSIBLE TO 1394 CONNECTOR.
48
2
49
*DLW21HN121SQ2L_NC
+3.3V_SUS
50
+3.3V_SUS
4
1
88242-5001
4
1
3
2
3
2
L123
TPB0N
26
TPB0P
26
TPA0N
26
TPA0P
R1147
TPB0-
R1148
TPB0+
R1149
TPA0-
R1150
TPA0+
5
6
5
6
26
CN9
FOX_UV31413-WRJOL-7H
4
1
J7
4
1
3
2
3
2
L124
9
9
ICH_USBP9ICH_USBP9+
9
9
PCIE_TX4PCIE_TX4+
9
9
PCIE_RX4PCIE_RX4+
9 CLK_PCIE_EXPCARD#
9 CLK_PCIE_EXPCARD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ICH_USBP9ICH_USBP9+
PCIE_TX4PCIE_TX4+
PCIE_RX4PCIE_RX4+
CLK_PCIE_EXPCARD#
CLK_PCIE_EXPCARD
*DLW21HN121SQ2L_NC
*TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible.

*TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically.
ACS_88513-144N
D
QUANTA
COMPUTER
Title
ExpressCard/SmartCard
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
28
of
8
64
38,45,53 SMBCLK0
38,45,53 SMBDAT0
CLK, LCD and Thermal
9
9
G_Thermal
and Media button
SMBCLK1
SMBDAT1
19
19
SMBCLK2
SMBDAT2
T181 PAD
37 USB_CHG_DET#_R
53
19
20
L80HLAT/GPE0
L80LLAT/W UI7/GPE7
110
111
SMCLK0/GPB3
SMDAT0/GPB4
SMBCLK1
SMBDAT1
115
116
SMCLK1/GPC1
SMDAT1/GPC2
SMBCLK2
SMBDAT2
117
118
SMCLK2/GPF6
SMDAT2/GPF7
85
86
USB_CHG_DET#_R
36 CLK_TP_SIO
36 DAT_TP_SIO
PS2CLK1/GPF2
PS2DAT1/GPF3
89
90
PS2CLK2/GPF4
PS2DAT2/GPF5
128
ITE8512_XTAL2
ITE8512IX_JX
WRST#
C702
1U
603
10
+3.3V_ALW
L74
603
L76
32KHz Clock.
ITE8512_XTAL2
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
74
75
AVCC
AVSS
C692
0.1U
LCD_CONTRAST1
FLFRAME/GPG2/LF
FLRST/GPG0/TM
FLAD3/GPG6
100
106
104
SUS_ON
FLAD2/SO
FLAD1/SI
FLAD0/SCE
FLCLK
103
102
101
105
CLK_PCI_8512
R1003
R1004
10K
10K
+3.3V_RUN
ICH_AZ_CODEC_RST0#
C
R239
100K
R278
Q77
2N7002W-7-F
2 2
Q78
1
390K
PAD T157
C687
*0.1U_NC
10
MMST3904-7-F
RUN_ON_1 42
HDDC_EN 35
IMVP_VR_ON 51
IMVP_VR_ON
LPC/FWH
FLASH
EGAD/GPE1
EGCS/GPE2
EGCLK/GPE3
EGPC
PS/2
GPH3/ID3
GPH4/ID4
GPH5/ID5
GPH6/ID6
GPG1/ID7
SUS_ON
KB_DET#
EC_FLASH_SPI_DO 30
EC_FLASH_SPI_DIN 30
EC_FLASH_SPI_CS# 30
EC_FLASH_SPI_CLK 30
82
83
84
PCH_PWRGD
96
97
98
99
107
USBP0_SIDE_EN#
USB_BACK_EN#
BID1
CHIPSET_ID1
+3.3V_ALW
Discrete
47,52
36
R236
10K
R248
*10K_NC
R245
*10K_NC
R244
*10K_NC
PCH_PWRGD 7
ALW_ON 37,46
GFX_ON 17,19,50
USB_BACK_EN#
BID1
CHIPSET_ID1
USBP0_SIDE_EN#
USBP0_SIDE_EN# 33
USB_BACK_EN# 34
R235
*10K_NC
MODC_EN 35
18
21
35
SATA_ACT# 8
ACAV_IN 37,45
PCB_BEEP_EN 39
RING/PW RFAIL/LPCRST/GPB7
112
AC_PRESENT 7
PW RSW /GPE4
125
SYS_PWR_SW#
RI1/W UI0/GPD0
RI2/W UI1/GPD1
W UI5/GPE5
33
GINT/GPD5
R247
10K
R246
10K
R243
10K
10
ITE8512IX_JX
UMA
VGA_IDENTIFY
37
LCDVCC_TST_EN
ITE8502E
lqfp128-16x16-4-nb1
24
BID0
CHIPSET_ID1
0
0
0
0
1
1
BID1
0
0
1
1
0
0
USB_BACK_EN#
0
1
0
1
0
1
FM9B(UMA)
SSI (X00)
PT (X01)
ST (X02)
QT (A00)
(A01)
FM9 (Dis)
SSI (X00)
PT (X01)
ST (X02)
QT (A00)
(A01)
+3.3V_RUN
R490
10
C384
18P
50
C385 32.768KHZ
18P
50
1 ITE8512_XTAL1
108
109
119
123
94
95
603
BLM11A05S
W2
RXD/GPB0
TXD/GPB1
GPC0
CTX0/GPB2
CRX1/GPH1/ID1
CTX1/GPH2/ID2
SUS_PWR_ACK
AC_PRESENT
10K
10K
10K/F
*10K_NC
CK32KE
LID_SW# 36
SIO_SLP_S3# 7
CK32K
1
12
27
49
91
113
122
BLM11A05S
SDMK0340L-7-F
120
124
IR/UART
PS2CLK0/GPF0
PS2DAT0/GPF1
87
88
ITE8512_XTAL1
TMRI0/W UI2/GPC4
TMRI1/W UI3/GPC6
GPIO
R488
100K
1 1
38,46 THERM_STP#
FAN1_TACH 38
PANEL_BKEN 17
1
1
2
1
2
2
1
2
+3.3V_SUS
SMBUS
+3.3V_ALW
D31
1
47
48
R214
R220
R494
R487
Board ID Straps
SMBCLK0
SMBDAT0
PS_ID
T51 PAD
KBRST/GPB6
W RST
PW UREQ/GPC7
TACH0/GPD6
TACH1/GPD7
LPC
LCD_CBL_DET#
INVERTER_CBL_DET#
IRQ_SERIRQ
LCD_BAK#
Charge and BAT
ICH_AZ_CODEC_RST0# R593
4
14
16
BREATH_LED# 37
BAT2_LED# 37
FAN1_PWM 38
PWM_VADJ 24
BAT1_LED# 37
KB_BACKLITE_EN 36
USBP0_BUS_SW_CB 33
BEEP
39
2 1K
1 100K
100K
*100K_NC
+3.3V_RUN
CRIT_TEMP_REP# 10
SIO_EXT_WAKE# 10
USBP1_SIDE_EN# 33
LAN_PCIE_PWR_CTRL 10,41
ICH_RSMRST# 7
SIO_PWRBTN# 7
24
25
28
29
30
31
32
34
R534 1
R500 2
R210
R234
LCD_BAK#
NB_MUTE#
SDMK0340L-7-F
1
2
SDMK0340L-7-F
PCH_PWRGD
SUS_ON
HWPG
IMVP_VR_ON
24
39
D13
2
WRST#
LCD_BAK#
CLKRUN/GPH0/ID0
SERIRQ
ECSMI/GPD4
ECSCI/GPD3
GA20/GPB5
LPCPD/W UI6/GPE6
1
D12
1 10K
SIO_RCIN#
SDMK0340L-7-F
1
SDMK0340L-7-F
1
SDMK0340L-7-F
1
93
5
15
23
126
17
USBP1_SIDE_EN#
R486 1
2 0
R1114 2
10
IRQ_SERIRQ
D11
2
D10
2
D14
2
SIO_SLP_S5#
USBP1_SIDE_EN#
CLKRUN#
IRQ_SERIRQ
SIO_EXT_SMI#
SIO_EXT_SCI#
SIO_A20GATE
LCD_TST
LCD_CBL_DET#
INVERTER_CBL_DET#
HWPG
42
IMVP6_PROCHOT# 51
SUS_PWR_ACK 7
LCD_CBL_DET# 24
INVERTER_CBL_DET# 24
PBAT_PRES# 53
IINP
45
SIO_SLP_S5# 7
PW M0/GPA0
PW M1/GPA1
PW M2/GPA2
PW M3/GPA3
PW M4/GPA4
PW M5/GPA5
PW M6/GPA6
PW M7/GPA7
PWM
3 RP24
1 2.2KX2
7
8
10
10
10
24
LPCRST/W UI4/GPD2
LPCCLK
LFRAME
LAD0
LAD1
LAD2
LAD3
4
2
SERIRQ
SC(V1.0)P38:
8.2-k pull-up to +V3.3S
CRB uses a 10-k pull-up to +V3.3S.
22
13
6
10
9
8
7
DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3
DAC4/GPJ4
DAC5/GPJ5
HWPG
C380
0.1U
R567
*10K_NC
10
LCD_CONTRAST1
C704
2.2P
R572
1
*0_NC
2
Title
2 0
KSI7
KSI6
KSI5
KSI4
KSI3/SLIN
KSI2/INT
KSI1/AFD
KSI0/STB
SMBDAT2
SMBCLK2
R485 1
3,9,16,26,28,31,32,41 PLTRST#
9 CLK_PCI_8512
8,32 LPC_LFRAME#
8,32 LPC_LAD0
8,32 LPC_LAD1
8,32 LPC_LAD2
8,32 LPC_LAD3
65
64
63
62
61
60
59
58
76
77
78
79
80
81
3 RP25
1 10KX2
KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
ADC/DAC
4
2
Place these caps close to ITE8502.
KEYBOARD
SMBDAT1
SMBCLK1
10
10
66
67
68
69
70
71
72
73
C383
0.1U
3 RP26
1 2.2KX2
10
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4
ADC5/GPI5
ADC6/GPI6
ADC7/GPI7
+3.3V_ALW
4
2
2
1
C349
0.1U
26
50
92
114
121
127
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
SMBDAT0
SMBCLK0
10
C706
0.1U
KSO17/GPC5
KSO16/GPC3
KSO15
KSO14
KSO13
KSO12/SLCT
KSO11/ERR
KSO10/PE
KSO9/BUSY
KSO8/ACK
KSO7/PD7
KSO6/PD6
KSO5/PD5
KSO4/PD4
KSO3/PD3
KSO2/PD2
KSO1/PD1
KSO0/PD0
+3.3V_ALW
10
C707
0.1U
C708
0.1U
2
C679
10U
603
6.3
+3.3V_ALW
57
56
55
54
53
52
51
46
45
44
43
42
41
40
39
38
37
36
+3.3V_RUN
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0
R238
1
3
11
VBAT1
VCC
51 IMVP_PWRGD
ITE8502E
LQFP-128L
KSI[0..7]
+RTC_CELL
KSO[0..16]
36
36
U20
LCD_CONTRAST
Ultra I/O Controller ECE5028
24
Size
Document Number
FM9
Date:
50
QUANTA
COMPUTER
Rev
1A
Sheet
1
29
of
64
RTC BATTERY
+3.3V_ALW
+3.3V_ALW
1
W P#
VSS
4
1
SST25VF016B-50-4C-S2AF
OUT
5/3#
IN
GND
SHDN
3
4
C468
2.2U
603
6.3
*MAX1615EUK-T+_NC
HOLD#
50
C450
*1U_NC
805
25
C390
0.1U
BT1
1
2 +RTC_1 1
D18
R218
SDMK0340L-7-F
2
1K
+RTC
2
1
AAA-BAT-019-K01
RTC-BATTERY
C802
1U
603
10
10
For PCH
+PWR_SRC
U26
1
2
D32
SDMK0340L-7-F
C393
22P
VDD
CE#
SCK
SI
SO
2 15
2 15
2 15
1
EC_FLASH_SPI_CLK_R 6
EC_FLASH_SPI_DIN_R 5
EC_FLASH_SPI_DO_R 2
R264 1
R242 1
R502 1
R254
10K
U41
2
D
EC_FLASH_SPI_CS#
EC_FLASH_SPI_CLK
EC_FLASH_SPI_DIN
EC_FLASH_SPI_DO
+3.3V_ALW
+RTC_CELL
R504
10K
29
29
29
29
16Mbit (2M Byte), SPI/

32Mbit (4M Byte), SPI
For EC
16Mbit (2M Byte), SPI/

32Mbit (4M Byte), SPI
+3.3V_RUN
+3.3V_RUN
R1005
*10K_NC
R1006
*10K_NC
U62
8
8
8
8
SPI_CS0#
SPI_CLK
SPI_SI
SPI_SO
SPI_CS0#
SPI_CLK
SPI_SI
SPI_SO
R1007
R1008
R1009
R1011
*15_NC
*15_NC
*15_NC
*15_NC
SPI_CS0#_R
SPI_CLK_R
SPI_SI_R
SPI_SO_R
C1412
*22P_NC
1
6
5
2
CE#
SCK
SI
SO
VDD
HOLD#
W P#
VSS
+3.3V_RUN
R1010
*SST25VF016B-50-4C-S2AF_NC
C1413
*0.1U_NC
50
10
iTPM ENABLE/DISABLE
*1K_NC
SPI_SI
TPM Function
R712
Enable
Mount
Disable
NC
(Default)
Title
QUANTA
COMPUTER
Ultra I/O Controller ECE5028
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
30
of
64
MiniCard WWAN connector

+3.3V_RUN
+3.3V_RUN
+1.5V_RUN
J12
7,28,32,41 PCIE_WAKE#
T75 PAD
T156 PAD
9 CLK_PCIE_REQ1#
CLK_PCIE_REQ1#
9 CLK_PCIE_MINI2#
9 CLK_PCIE_MINI2
1
3
5
7
9
11
13
15
W AKE#
RESERVED_1
RESERVED_2
CLKREQ#
GND1
REFCLKREFCLK+
GND2
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
UIM_C8
UIM_C4
GND4
PERn0
PERp0
GND6
GND7
PETn0
PETp0
GND9
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10
3.3V_1
GND0
1.5V_1
UIM_PW R
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
2
4
6
8
10
12
14
16
GND3
W _DISABLE#
PERST#
3.3VAUX1
GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_DUSB_D+
GND10
LED_W W AN#
LED_W LAN#
LED_W PAN#
1.5V_3
GND11
3.3V_2
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
L54
PCI-Express TX and RX
direct to connector
9
9
PCIE_RX1PCIE_RX1+
9
9
PCIE_TX1PCIE_TX1+
1
4
WWAN_RADIO_DIS# 10
PLTRST# 3,9,16,26,28,29,32,41
+3.3V_RUN
USBP5 DUSBP5 D+
USB_MCARD2_DET#
T76
ICH_USBP5+ 9
ICH_USBP5- 9
*PLW3216S900SQ2T1_NC
WLAN_SMBCLK 28,32,35
WLAN_SMBDATA 28,32,35
PAD
2
3
1
R359
2
0
1
R358
Layout Note:
R359 and R358
close to choke
as possible to
minimize stubs.
10
+1.5V_RUN
Place caps close to connector.
+3.3V_RUN
C804
0.047U
10
+ C473
100U
6.3
50
C805
33P
10
C467
0.047U
50
50
C476
33P
C472
*330U_NC
7343
6.3
DATA
50
C515
33P
6
5
4
6
5
4
IP4220CZ6
50
C507
33P
50
C510
33P
1
2
3
C513
33P
UIM_DATA
1
2
3
UIM_CLK
UIM_VPP
VPP
UIM_PWR
CLK
RST
GND
UIM_VPP
UIM_PWR
UIM_DATA
UIM_CLK
VCC
UIM_RESET
UIM_RESET
UIM_PWR
10
C477
33P
ESD3
JSIM1
D
C483
0.047U
LTS_AAA-PCI-092-K01
10 PCIE_MCARD2_DET#
USBP5 D+
USBP5 D-
50
C511
1U
603
10
QUANTA
COMPUTER
TYC_1747314-1
Title
MINI-PCI
Place as close as possible to JSIM1 connector
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
31
of
8
64
MiniCard WLAN connector

+1.5V_RUN
+3.3V_RUN
It is for debug only

it is can remove at QT.
J10
MINI1CLK_REQ#
COEX2_WLAN_ACTIVE
COEX1_BT_ACTIVE_MINI
MINI1CLK_REQ#
9 MINI1CLK_REQ#
9 CLK_PCIE_MINI1#
9 CLK_PCIE_MINI1
C796
220P
It is for debug only

it is can remove at QT.
50
R541 1
R570 1
3,9,16,26,28,29,31,41 PLTRST#
9 CLK_LPC_DEBUG
PCI-Express TX and RX
direct to connector
9
9
PCIE_RX2PCIE_RX2+
9
9
PCIE_TX2PCIE_TX2+
2 0
2 0 CLK_LPC_DEBUG_R
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
10 PCIE_MCARD1_DET#
Non-iAMT
T132 PAD
T124 PAD
T131 PAD
W AKE#
RESERVED_1
RESERVED_2
CLKREQ#
GND1
REFCLKREFCLK+
GND2
UIM_C8
UIM_C4
GND4
PERn0
PERp0
GND6
GND7
PETn0
PETp0
GND9
RESERVED_3
RESERVED_4
RESERVED_5
RESERVED_6
RESERVED_7
RESERVED_8
RESERVED_9
RESERVED_10
3.3V_1
GND0
1.5V_1
UIM_PW R
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
GND3
W _DISABLE#
PERST#
3.3VAUX1
GND5
1.5V_2
SMB_CLK
SMB_DATA
GND8
USB_DUSB_D+
GND10
LED_W W AN#
LED_W LAN#
LED_W PAN#
1.5V_3
GND11
3.3V_2
2
4
6
8
10
12
14
16
R575
R576
R577
R578
R579
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
1
1
1
1
0
0
0
0
0
2
2
2
2
2
L49
USBP4 DUSBP4 D+
1
4
2
3
LPC_LFRAME# 8,29
LPC_LAD3 8,29
LPC_LAD2 8,29
LPC_LAD1 8,29
LPC_LAD0 8,29
1
R315
1
R316
PLTRST# 3,9,16,26,28,29,31,41
+3.3V_RUN
WLAN_SMBCLK_C
WLAN_SMBDATA_C
1R1120
1
R1121
02
2
0
WLAN_SMBCLK
WLAN_SMBDATA
+3.3V_RUN
USBP4 DUSBP4 D+
USB_MCARD1_DET#
9
RP38
2.2KX2
WLAN_SMBCLK
28,31,35 WLAN_SMBCLK
LTS_AAA-PCI-092-K01
Q39
2N7002W-7-F
1
R303
Suport for WoW

+1.5V_RUN
WLAN_RADIO_DIS#
10
10
10
10
10
2
10
+
C792
4.7U
805
10
C787
0.047U
1
C756
0.1U
C750
0.047U
C758
0.1U
1
10
C759
0.047U
Prevent backdrive when

WoW is enabled.
C755
0.047U
2
*0_NC
C419
*330U/6.3V_NC
7343
6.3
WLAN_SMBDATA
28,31,35 WLAN_SMBDATA
Q36
2N7002W-7-F
ICH_SMBDATA
9,41,60
2
*0_NC
+3.3V_RUN
C1478
2
0.1U/10V
1
2
*0_NC
1
R304
9,41,60
+3.3V_RUN
D16
SDMK0340L-7-F
1
R327
ICH_SMBCLK
+3.3V_RUN
WLAN_RADIO_OFF#
WLAN_RADIO_OFF#
ICH_USBP4- 9
ICH_USBP4+ 9
1206
1
3
5
7
9
11
13
15
3
1
7,28,31,41 PCIE_WAKE#
4
2
+3.3V_RUN
Support Dell BT365 (Little Stone) module

Bluetooth BTB Conn
L53
USBP8 DUSBP8 D+
J16
COEX1_BT_ACTIVE
BT_DET#
3.3V
COEX2_W LAN_ACTIVE
USB+
NC
USBP8 D-
USB-
HW _RADIO_DIS#
10
GND
BT_ACTIVE
12
GND
NC
11
14
GND
NC
13
USBP8 D+
1
4
T242
2
3
ICH_USBP8- 9
ICH_USBP8+ 9
1206
COEX2_WLAN_ACTIVE
BT_RADIO_DIS#
10
1
R349
1
R350
C1481
33P/50V
C1480
100P/50V
H25
H-TC232BC138D122P2
H-TC232BC138D122P2
1
R1124
10K
1-2041112-4
C1479
0.1U/10V
PAD
COEX1_BT_ACTIVE_MINI
QUANTA
COMPUTER
Title
MDC CONN.
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
32
of
8
64
For USP1 USB PWR CHARGE,JUSB1 need add USB_CHG_DET#
Side External USBX2
External USB PORT hookup reference. Your design may

need more or less external ports and may be mapped
differently
+USB_SIDE_PWR_CHARGE
2
3
L70
C602
150P
25
NPO
1206
2
*0_NC
C300
150P
25
NPO
DLW21HN900SQ2L
ICH_USBP1+
ICH_USBP1-
ICH_USBP1+
ICH_USBP1-
1
4
USBP1 D+
USBP1 D-
2
3
L72
2
*0_NC
1
R462
2
*0_NC
0.01U/16V
0.01U/16V
ESATA_RX4-_R
ESATA_RX4+_R
16
17
18
19
USB BUS SW
ESATA_TX4+_L
ESATA_TX4-_L
R212
1
1
R219
*0_NC
ESATA_TX4+_R
2
ESATA_TX4-_R
2
*0_NC
ESATA_RX4+_L
ESATA_RX4-_L
R225
1
1
R227
*0_NC
ESATA_RX4+_R
2
ESATA_RX4-_R
2
*0_NC
U72
VCC
1
7
NC1
NC2
2
6
NO1
NO2
Function
Disconnect
COM_=NC_
COM_=NO_
B
COM1
COM2
3
5
ICH_USBP0+_R
ICH_USBP0-_R
ICH_USBP0+
ICH_USBP0-
EN
USB_CHG_DET#_C
GND
1
R229
9
9
10
29 USBP0_BUS_SW_CB
CB
USB_CHG_DET#
2
0
R232
*0_NC
R1131
49.9K_F
6
5
4
USBP1 D+
+USB_SIDE_PWR
USBP1 D-
RES_DIV_D+
RES_DIV_D-
EN#
1
R1130
49.9K_F
ESD2
CB
+5V_ALW
C1482 .1U/10V/0402
1
2
R1129
43.2K_F
Place ESD diodes as close as USB connector.
USBP0 D+
ESATA_RX4-_C C697
ESATA_RX4+_C C690
JUSB1
APPLING
C299
0.1U
6
5
4
ESATA_TX4+_R
ESATA_TX4-_R
Please put those on the same side of MB PCB
R1128
75K_F
1
2
3
0.01U/16V
0.01U/16V
USBx2 & ESATA COMBO & PWR CHARGE
1
R459
1
2
3
ESATA_TX4+_C C701
ESATA_TX4-_C C691
10
1206
Platforms should put in PADS for the USB chokes if they

have the room. Chokes should be NOPOP.
USBP0 D-
9
10
11
12
13
14
15
9
9
5
6
7
8
1
R457
USBP1 DUSBP1 D+
VBUS GND
DA+
D+
AGND GND
BB+
VBUS GND
DD+
Shield
GND Shield
Shiled
Shield
+USB_SIDE_PWR
2
*0_NC
1
2
3
4
C601
0.1U
10
1
R456
USBP0 DUSBP0 D+
USBP0 D+
USBP0 D-
1
4
USB_CHG_DET#
37 USB_CHG_DET#
DLW21HN900SQ2L
ICH_USBP0+_R
ICH_USBP0-_R
MAX4983EEVB+
*SRV05-4.TCT_NC
(5V)-43.2K-(D-)-49.9K-GND (about 2.68V)

(5V)-75.0K-(D+)-49.9K-GND (about 2.00V)
Place one 150uF cap by each
USB connector.
OUT2
OC2#
6
5
+USB_SIDE_PWR
C1257
1U
C684
0.1U/ 10V
C1046
0.01U
25
+3.3V_RUN
+3.3V_RUN
+ C1477
150U
6.3
25
26
GND
24
16
10
Standby
Standard SATA
Standard SATA
Boost
Standard SATA
Standard SATA
Boost
Boost
Boost
RX_0N
TX_0N
ESATA_TX4-_R
TX_1N
RX_1N
12
ESATA_RX4-_R
TX_1P
RX_1P
11
ESATA_RX4+_R
EN
GND
ESATA_BUS_SW_EN 7
Standby
ESATA_TX4+_R
23
GND
ESATA_RX4+_L
GND
0.01U/16V
VCC
C694
VCC
OC0#
TPS2062AD
R931
*4.7K_NC
D1
R932
*4.7K_NC
SN75LVCP412
R170
0
R1125
100K
Need to add control pin to control PUSB charge
R171
0
ESATA_BUS_SW_EN
USB_CHG_DET# 2
QUANTA
COMPUTER
Q104
2N7002W-7-F
Support USBP1 charge function.

JUSB1 need to add USB_CHG_DET# pin wire to EC GPIO to detect USB device.
Title
SERIAL PORT & USB
+3.3V_RUN
D0
10
ESATA_RX4-_L
14
GND
C1476
0.1U
0.01U/16V
D1
15
22
C700
CH : 1
D0
TX_0P
RX_0P
GND
6
5
SATA_RX4+
21
OUT2
OC2#
ESATA_TX4-_L
GND
OUT1
OC1#
SATA_RX4-
ESATA_TX4+_L
C1286 0.01U/16V
13
EN2#
7
8
C1285 0.01U/16V
GND
EN1#
SATA_TX4-
GND
1
C1475
*10U_NC
805
10
29 USBP0_SIDE_EN#
IN
SATA_TX4+
U38
CH : 0
EN
18
U71
GND
+5V_ALW
VCC
6.3
VCC
20
+ C620
150U
TPS2062AD
GND
10
EN2#
GND
C596
0.1U
OC0#
7
8
Note: Boost:5dB, Standard SATA:0dB
OUT1
OC1#
+USB_SIDE_PWR
OC0#
19
C600
*10U_NC
805
10
Please put those on the same side of MB PCB

+3.3V_RUN
EN1#
GND
17
29 USBP1_SIDE_EN#
IN
E-SATA Re-driver
Each channel is 1A
U7
+5V_SUS
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
33
of
8
64
9
9
ICH_USBP2ICH_USBP2+
ICH_USBP2ICH_USBP2+
4
1
LN1 1206
3
2
USBP2 DUSBP2 D+
DLW21HN900SQ2L
R169 *0_NC
2
R172 *0_NC
2
Place one 150uF cap by each

USB connector.
+5V_SUS
Each channel is 1A
U16
1
C556
*10U_NC
805
10
29 USB_BACK_EN#
IN
3
4
GND
EN1#
OUT1
OC1#
7
8
+USB_BACK_PWR
EN2#
OUT2
OC2#
6
5
+USB_BACK_PWR
C561
0.1U
OC1#
+ C586
150U
6.3
TPS2062AD
10
J5
+USB_BACK_PWR
ESD1
USBP2 DUSBP2 D+
1
2
3
1
2
3
6
5
4
6
5
4
C271
150P
25
NPO
+USB_BACK_PWR
Place ESD diodes as close as USB connector.
C267
0.1U
10
USBP2 D+
USBP2 D-
1
2
3
4
1
2
3
4
1775295-4
*SRV05-4.TCT_NC
Title
QUANTA
COMPUTER
Right USB
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
34
of
64
CON4
SATA Connector.
DG: Place TX cap close to connector
GND1
RXP
RXN
GND2
TXN
TXP
GND3
1
2
3
4
5
6
7
3.3V_0
3.3V_1
3.3V_2
GND4
GND5
GND6
5V_0
5V_1
5V_2
GND7
RSVD
GND8
12V_0
12V_1
12V_2
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SATA_TXP0_C
SATA_TXN0_C
C1414
C1415
SATA_RXN0_C
SATA_RXP0_C
0.01U/16V
0.01U/16V
C741
C746
ODD Connector
SATA_TX0+ 8
SATA_TX0- 8
0.01U/16V
0.01U/16V
DG: Place TX cap close to connector
CN2
S1
SATA_RX0- 8
SATA_RX0+ 8
14
14
+3.3V_RUN
S7
P1
15
GND1
TXP
TXN
GND2
RXN
RXP
GND3
1
2
3
4
5
6
7
DP
+5V
+5V
MD
GND
GND
8
9
10
11
12
13
15
+5V_HDD
P6
48325-1106
SATA_TXP1_C
SATA_TXN1_C
C1416
C1417
0.01U/16V
0.01U/16V
SATA_RXN1_C
SATA_RXP1_C
C705
C703
0.01U/16V
0.01U/16V
SATA_TX1+ 8
SATA_TX1- 8
SATA_RX1- 8
SATA_RX1+ 8
A
+5V_MOD
67492-1441
+3.3V_RUN

+5V_MOD
C760
*10U/10V/0805_NC
C766
*1U_10V_0603_NC
C776
*0.1U/16V_NC
C771
*0.1U/16V_NC
C768
*1000P/50V_NC
C640
C646
C651
C664
C654
*10U/10V/0805_NC
1U/10V/0603
0.1U/16V
0.1U/16V
1000P/50V

+5V_HDD
C785
C794
C784
C797
1U/10V/0603
0.1U/16V
0.1U/16V
0.1U/16V
1000P/50V
+5V_RUN
Q42
*FDC655BN_NC
R267
*100K_NC
R330
*100K_NC
+15V_ALW
R259
R342
HDD_EN_5V
1
5
R255
*100K_NC
C445
*0.1U_NC
603
25
C375
*0.1U_NC
603
25
R335
*100K_NC
Q33A
*2N7002DW-7-F_NC
MODC_EN
1
Q43A
*2N7002DW-7-F_NC
R226
*100K_NC
Q33B
*2N7002DW-7-F_NC
2
3
29
Q43B
*2N7002DW-7-F_NC
HDDC_EN
1
*100K_NC
2
29
C364
*10U_NC
805
10
MOD_EN_5V
1
*100K_NC
R343
*100K_NC
R213 0
1
805
C427
*4.7U_NC
603
6.3
1
2
3
+15V_ALW
8
7
6
5
+3.3V_ALW
2
805
+3.3V_ALW
R329 0
1
Q61
*SI4800BDY-T1-E3_NC
3
2
1
6
5
2
1
+5V_RUN
+5V_MOD
+5V_RUN
+5V_HDD
+5V_RUN
C798
10U/10V/0805
C806
3-axis Fall Sensor (HDD data protector)
C1484
10U
603
6.3
U73
C1483
0.1U/10V
+3.3V_RUN
DE351DL is ST vender for DELL Part Number

Vender PN: LIS302DLTR
Quanta PN: AL000302A00
VDD_IO
SCL
14
WLAN_SMBCLK 28,31,32
GND1
SDA
13
WLAN_SMBDATA 28,31,32
Reserved1
SDO
12
GND2
Reserved2
11
GND3
GND4
10
VDD
INT2
CS
INT1
QUANTA
COMPUTER
Title
SATA (HDD&CD_ROM)
R964
PCH_IRQH_GPIO5
Size
Document Number
FM9
Date:
Rev
1A
DE351DLTR
1
Sheet
35
of
8
64
KEYBOARD CONNECTOR
+5V_RUN
29
CLK_TP_SIO
L37 1
29
DAT_TP_SIO
L38 1
2 BLM18AG601SN1D
1
2
3
4
5
6
TP_CLK
603
2 BLM18AG601SN1D
TP_DATA
603
50
50
10
10
10
29
KSO[0..16]
29
KSI[0..7]
88513-064N
1
C372
0.047U
1
C382
0.047U
1
C381
0.1U
1
C366
10P
50
C378
10P
C377
10P
1
2
+5V_RUN
1
2
3
4
5
6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
KSI7
KSI6
KSI4
KSI2
KSI5
KSI1
KSI3
KSI0
KSO5
KSO4
KSO7
KSO6
KSO8
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
KSO10
2
4
JP1
LID_SW#
KB_DET#
C379
0.1U
10
GND1
1
3
4.7KX2
50
2 10K
JKB1
29
C376
10P
R91
R233
100K
RP23
29
+3.3V_ALW
+3.3V_ALW
GND2
+3.3V_ALW
Touch Pad
FH28-60(30)SB-1SH(86)
C125
*100P_NC
50
CP2
8
6
4
2
KSI7
*100PX4_NC
7 KSO12
5 KSO16
3 KSO15
1 KSO13
1206
CP4
8
6
4
2
50
1206
CP3
8
6
4
2
50
50
*100PX4_NC
7 KSO3
5 KSO1
3 KSO2
1 KSO0
1206
*100PX4_NC
7 KSI6
5 KSI4
3 KSI2
1 KSI5
1206
*100PX4_NC
7 KSO14
5 KSO9
3 KSO11
1 KSO10
1206
*100PX4_NC
7 KSO4
5 KSO7
3 KSO6
1 KSO8
CP6
8
6
4
2
CP1
8
6
4
2
CP5
8
6
4
2
50
50
*100PX4_NC
7 KSI1
5 KSI3
3 KSI0
1 KSO5
1206
50
100P CAPS CLOSE TO JKB1
Key board illumination

+KB_LED power trace width >10 mil
+KB_LED
J4
1
FS1
KB_LED_DET
100K
2
1206L050YR
2
1206
R115
1
1
2
3
4
LED_PWM
R105
200K
+KB_LED
1
2
3
4
+KB_LED
88513-044N
+5V_RUN
C170
0.1U
10
Q8
SI2304BDS-T1-E3
LED_PWM
QUANTA
COMPUTER
Title
29 KB_BACKLITE_EN
TOUCH PAD, BULE TOOTH & FIR
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
36
of
8
64
Touch Screen Module

J8
1
2
3
4
5
USBP12 DUSBP12 D+
Note:
1. VBUS IND:VBUS indication should be supplied
to single the DuoSense to connect
According to the USB 2.0 specification.
A GND voltage from the host should indicate
a connection.
2. Maximum cable resistance on VCC, GND should be
150m ohm.
3. FPC cable should support 12MHz USB singles.
A tri-state should indicate no connection.
+3.3V_RUN
Power button Cable

J3
1
2
3
4
BREATH_PWRLED
POWER_ SW_IN0#
1
2
3
4
87212-05G0
1775295-4
Need check the connector footprint and symble.
3VALW ON POWER LOGIC
L9
9
9
1
4
ICH_USBP12+
ICH_USBP12-
USBP12 D+
USBP12 D-
2
3
+3.3V_ALW
+3.3V_ALW
2
R206
100K
2
0
R20
D41
R19
1206
33 USB_CHG_DET#
USB_CHG_DET#_R
+5V_ALW2
R200
100K
29
2
R204
100K
D38
+5V_ALW
+3.3V_ALW
BAS316
02/12
POWER_ SW_IN0#
R41
100K
R205
100K
29
+3.3V_ALW
SYS_PWR_SW#
BAS316
Battery status.
C597
0.1U
10
3.3V_ALW_ON 46
47K
BAT1_LED#
Q12
2
10K
Q10
2N7002W-7-F
D39
DDTA114YUA-7-F
29
Q101
2N7002W-7-F
BAS316
D40
1 220
RBAT1_LED 53
BAT1_LED
R52 2
C598
*0.1U_NC
10
BAS316
3
1
Q103
2N7002W-7-F
29,45 ACAV_IN
Q102
2N7002W-7-F
29,46 ALW_ON
+3.3V_ALW
47K
29
Q16
BAT2_LED#
10K
DDTA114YUA-7-F
BAT2_LED
R68 2
1 68
RBAT2_LED 53
+5V_SUS
*DA204U_NC
D3
+5V_SUS
BREATH_LED#
C80
*100P_NC 50
POWER_ SW_IN0#
C63
*100P_NC 50
+3.3V_SUS
+3.3V_ALW
29 BREATH_LED#
3
Q17
2N7002W-7-F
POWER_ SW_IN0#
R50
100K
BR_LED
R48
1
100
BREATH_PWRLED
U4
TC7SZ04FU(T5L,F,T)
Title
QUANTA
COMPUTER
SWITCH, KEYBOARD & LED&Touch Screen Module
Size
Document Number
FM9
Date:
Rev
1A
Sheet
E
37
of
64
+3.3V_RUN
D25
*SSM34PT_NC
1
2
+5V_RUN
R1122 R1123
10K
4.7K
FAN1_TACH
29
SMBCLK0 29,45,53
+3.3V_RUN
10K
EC_SMBCLK0
13,14,15 EC_SMBCLK0
FAN1_PWM
R401
2N7002W-7-F
MLX_53398-0471
10
+5V_RUN
Q98
1
*DA204U_NC
D26
C524
0.1U
4
3
2
1
FAN1_PWM
FAN1_PWM
1
C523
2.2U
805
10
29
4
3
2
1
J9
+5V_RUN
Q99
1
2N7002W-7-F
EC_SMBDAT0
13,14,15 EC_SMBDAT0
SMBDAT0 29,45,53
Place under CPU
10/20mils
+3.3V_RUN
U10
C160
2200P
C518
*2200P_NC
Q51
MMST3904-7-F
REM_DIODE1_P
50
REM_DIODE1_N
50
VDD
SCL
EC_SMBCLK0
DP
SDA
EC_SMBDAT0
DN
ALERT#
THERM_ALERT#
GND
SYS_SHDN#
EMC1422-1-ACZL-TR
1.Place C160 close to EMC1422

2.Place C518 to be close to Q51
Total capacitance between D+/D- is 2200pF(max)
if use 2200pF for C160, then C518 should be dummy
C161
0.1U
SYS_SHDN#
10
THERM_STP# 29,46
+3.3V_RUN
R125
1M
2
Q25
2N7002W-7-F
OTP 85 degree C
Q23
2N7002W-7-F
+3.3V_RUN
C202
0.1U
R102 1
2 10K/F
THERM_ALERT#
R122 1
2 6.8K/F
SYS_SHDN#
10
QUANTA
COMPUTER
Title
FAN & THERMAL
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
38
of
8
64
6dB
10dB
15.6dB
21.6dB
H (Disable SPK) H (Test Woofer)
L (Test SPK)
C363
*1P_NC
Q60
2N7002W-7-F
2N7002W-7-F
DMIC_CLK
40
DMIC_CLK
DVDD
2
3
DMIC0/VOL_UP/GPIO1
DMIC1/VOL_DN/GPIO2
EAPD#
EAPD#
DMIC_DATA
DMIC_DATA
47
48
4
7
DMIC_CLK/GPIO0/SPDIF_IN
SPDIF_OUT_0
DVSS1
DVSS2
PORT_D_L
PORT_D_R
VREFOUT_D
PORT_G_L
PORT_G_R
2
1
2
5
3
Layout Note:
Place close U18.
10
+3.3V_RUN
10
NB_MUTE#
HP2_JD
4 AMP_HP2_EN_L
C333
0.1U
10
1
2
U14
TC7SZ08FU(T5L,F,T)
3
SENSEA
SENSEB
R223
2
21
22
28
+VDDA
*2.2K_NC
1
+5V_SPK_AMP
+5V_RUN
C
BLM21PG600SN1D
C680
0.068UF
R482
*0_NC
16
L36
C371
1U
603
10
AUD_HP1_L 40
AUD_HP1_R 40
39
41
37
AMP_HP2_EN
4
EAPD#
C693
0.1U
10
U17
TC7SZ08FU(T5L,F,T)
+3.3V_RUN
C331
0.1U
13
34
C656
1U
10
603
C339
0.1U
C813
1U
603
10
C635
10U
805
10
C336
1U
603
10
2
25
38
C373
10U
805
10
FB_60ohm+-25%_100MHz
_3A_0.05ohm DC
Layout Note:
Place close to
pin 8.
23
24
29
35
36
32
AUD_FRONT_L_1
AUD_FRONT_R_1
AUD_FRONT_L_1
AUD_FRONT_R_1
Close to U19
40
40
+VDDA
C673
0.1U
16
1
2
14
15
31
AUD_MIC_L 40
AUD_MIC_R 40
AUD_MIC1_VREFO
AUD_HP2_L0
AUD_HP2_R0
16
17
30
40
C657
AUD_PC_BEEP 1
603
1U
R469
2BEEP2 2
10
10K
1 BEEP1
BEEP
29
SPKR
R471
2.2K
43
44
603
U36
74LVC1G86GW
PC_BEEP
CAP2
VREFFILT
45
46
12
33
27
AVSS1
AVSS2
26
42
92HD73C
C492
1U
603
10
SET
PORT_A_L
PORT_A_R
NC/VREFOUT_A
PORT_H_L
PORT_H_R
R202
*10K_NC
40
5
3
AVDD
AVDD
PORT_E_L
PORT_E_R
GPIO4/VREFOUT_E
1
3
1
Q64
2N7002W-7-F
TEST_WOOFER_EN 10
+5V_SPK_AMP
Layout Note:
Place close to
pin 18.
PORT_C_L
PORT_C_R
VREFOUT_C
NC/CD_L
NC/CD_GND
NC/CD_R
AMP_HP1_SHUD# 40
U13
TC7SZ08FU(T5L,F,T)
AUD_PC_BEEP
HDA_BITCLK
HDA_SDI
HDA_SDO
HDA_SYNC
HDA_RST#
+3.3V_RUN
EAPD#
GND_28
PGND_5
PGND_21
PORT_F_L
PORT_F_R
GPIO3/VREFOUT_F
Q58
1
2
2
1
*22_NC
4
2
+VDDA
2 0
2 0
+5V_SPK_AMP
VDD
28
5
21
PORT_B_L
PORT_B_R
VREFOUT_B
Depop R477,R478,R484,R473
Pop R476,R480,R483,R475
for using 92HD73C
R476,R483 close to U19, Let DVDD width be 10-mils
R470
100K
NB_MUTE#
30
8
18
SENSE_A
SENSE_B
R217
DVDD_CORE
DVDD_CORE
DVDD
WOOFER_EN 40
29
R466
100K
AUD_SPK_ENABLE#
Q29
2N7002W-7-F
29 PCB_BEEP_EN
2
R199
100K
H
AUD_SPK_ENABLE#
8 ICH_AZ_CODEC_BITCLK
8 ICH_AZ_CODEC_SDIN0
8 ICH_AZ_CODEC_SDOUT
8 ICH_AZ_CODEC_SYNC
18
19
20
C699
*1000P_NC 50
ICH_AZ_CODEC_BITCLK
6
R211 1
2 33 AZ_CODEC_SDIN0
8
5
10
11
40
Q31
2N7002W-7-F
1
9
40
29
TPA6040A4
+5V_SPK_AMP
L (Disable Woofer)
VDD
PVDD_8
PVDD_18
REGEN R589 1
SET
R590 1
4
1
U19
10
10
AMP_HP1_SHUD_L#
AZALIA (HD) CODEC

C359
0.1U
2
R479
*100K_NC
Depop R479,C699
for using 92HD73C
HP1_JD
50
C343
0.1U
C99
100P
50
C100
100P
C367
1U
10
603
50
ICH_AZ_CODEC_BITCLK
WOOFER_EN
C352
1U
10
603
HP1_JD
C346
1000P
Layout Note:
Close to U19 Pin 13
PVSS
CPVSS
NB_MUTE#
+VDDA
DVDD
3 2
1
TEST_WOOFER_EN
50
AUD_HP2_L1 40
AUD_HP2_R1 40
+VDDA
FB_60ohm+-25%_100MHz
_3A_0.05ohm DC
+3.3V_RUN
C652
1U
805
16
SPKR_INLSPKR_INR-
16
15
1
2
Q63
2N7002W-7-F
C1P
C1N
CPGND
10
U15
TC7SZ08FU(T5L,F,T)
EAPD#
R201
5.1K/F
SENSEA
R198
39.2K/F
EAPD# NB_MUTE#
14
13
HPL
HPR
VOUT
HPVDD
CPVDD
AUD_SPK_R1
AUD_SPK_R2
AUD_FRONT_R
14K/F
AUD_SPK
_ENABLE#
C101
100P
50
+3.3V_RUN
C328
0.1U
10
12
11
20
19
40
2 1U
16
BIAS
SPKR_EN#
HP_EN
MUTE#
GAIN1
GAIN2
OUTR+
OUTR-
AUD_SPK_L1
AUD_SPK_L2
R498
U52B
MAX4492AUD+
7
MIC1_JD
C337 C671 1
1U
805
603
10
TPA6040A4
QFN 32PIN
6
7
VSS
50
C362
10U
805
10
HP_INL
HP_INR
OUTL+
OUTL-
VDD
24
23
22
25
31
32
17
9
C374
1000P
Q62
2N7002W-7-F
11
0.1U/16V
BUFFER_VIAS
C650 0.015U
AUD_FRONT_R_1
HP2_JD
40
R231
39.2K/F
3 2
4.99K/F
1
+5V_SPK_AMP
C644
1
R495
2
R230
20K/F
3 2
2 *0_NC
R443 1
27
26
SPKR_INL+
SPKR_INR+
C668
10U
805
10
R228
5.1K/F
SENSEB
3
2
AUD_HP2_L0
AUD_HP2_R0
Layout Note:
Close to U18 Pin 34
AUD_FRONT_L
C665 1
2 0.068U 1206 50 LINAUD_FRONT_R
C663 1
2 0.068U 1206 50 RIN1206 50
1 AUD_HP2_L0_R
1 R208
2 2.2K HP2_OUT_L
1 AUD_HP2_R0_R
1 R203
2 2.2K HP2_OUT_R
1206 50
C335 1
10
2 1U 603
AUD_SPK_ENABLE#
AMP_HP2_EN
+VDDA
AUD_AMP_MUTE#
AUD_AMP_GAIN1
+3.3V_RUN
AUD_AMP_GAIN2
2
2.2U
C647 2
C637 2
2.2U
14K/F
C102
100P
1
2
3
4
1775295-4
Layout Note:
Place close
U18 pin 23.
10
AUD_FRONT_L
Check it is ok at ST,
if it is ok then remove it.
U18
C638
0.1U
1
2
1
2
C633
1U
603
10
VSS
R308
U52A
MAX4492AUD+
1
C634
1U
603
10
11
BUFFER_VIAS
VDD
1
2
3
4
C655
0.068UF
16
INTERNAL SPEAKER AMP
+5V_SPK_AMP
3
0.1U/16V
40 BUFFER_VIAS
C642 0.015U
603
603
603
603
+3.3V_RUN
VDD
+5V_SPK_AMP
C887 0.1U/10V
1
2
C641
*0_NC
AUD_AMP_MUTE#
R209
100K
R468
REGEN
4.99K/F
1
AUD_FRONT_L_1
0
0
0
0
GAIN
2 *0_NC
R496
2
1
1
1
1
GAIN2
GAIN1
1
R442 1
2
2
2
2
50
R408
R406
R405
R407
50
J2
AUD_SPK_R1
AUD_SPK_R2
AUD_SPK_L1
AUD_SPK_L2
+5V_SPK_AMP
C350
220P
50
C358
220P
50
C369
*47P_NC
HP2_OUT_R
R474
*100K_NC
C370
*47P_NC
HP2_OUT_L
R467
100K
AUD_AMP_GAIN1
AUD_AMP_GAIN2
R215
*100K_NC
R472
100K
RIN-
LIN-
+5V_SPK_AMP
Title
C683
1U
603
10
QUANTA
COMPUTER
Azelia CODEC
Size
Document Number
FM9
Date:
Rev
1A
Sheet
39
8
of
64
39
JACK 2 (MIC)
L59
603
BLM11A05S
+5V_RUN
L56
603
*BLM11A05S_NC
2
100K
2 BLM18BD601SN1D
AUD_HP2_L2
2 BLM18BD601SN1D
AUD_HP2_R2
CON3
2 1770882-4
4
3
1
6
5
+3.3V_RUN
AUD_HP1_L3
2 BLM18BD601SN1D
AUD_HP1_R3
2 220P
50
AUD_HP1_L0
AUD_HP1_R0
14
18
39 AMP_HP1_SHUD#
+CAM_VCC
13
15
C451 1
1206
2 2.2U
16
INL
INR
SHDNR
SHDNL
1
3
C1P
C1N
5
7
PVSS
SVSS
OUTL
OUTR
NC1
NC2
NC3
NC4
NC5
NC6
SVDD
PVDD
PGND
SGND
9
11
4
6
8
12
16
20
10
19
2
17
AUD_HP1_L2
AUD_HP1_R2
A
+3.3V_RUN
C443
1U
805
16
C469
2.2U
1206
16
MAX4411ETP+
39
+3.6V_CAMERA
OUT
EN
R382
*100K/F_NC
C494
*20P_NC
50
C496
*4.7U_NC
603
6.3
R381
*49.9K/F_NC
JACK 3 (HP1)
C426
220P
50
IN
C493
2 GND NC/FB 4
*1U_NC
603
*TPS73601DBVR_NC
10
2
100K
CON5
2 1770882-4
4
3
1
6
5
AUD_HP1_R0
C449 1
R18
U30
2 BLM18BD601SN1D
1206
+5V_RUN
50
C425
220P
603
2.2K
USBP11 DUSBP11 D+
2
3
R17
C416
220P
C411
220P
603
R324
R323
*20K_NC *20K_NC
L3
1
4
JACK 1
(HP2)
603
2
1
L52 1
1 R345
C497
10U
10
X5R
805
C19
*33P_NC
50
39
HP1_JD
L51 1
1 2.2U AUD_HP1_R_R
50
1
R336
AUD_HP1_R2
C808 2
1206
50
50
AUD_HP1_L2
39 AUD_HP1_R
50
2 220P
AUD_HP1_L0
U25
L57
603
*BLM11A05S_NC
+3.6V_CAMERA
DMIC_CLK
+3.3V_RUN
1
R322
603
R284
R283
*20K_NC *20K_NC
2.2K
C397
220P
2
L46 1
AUD_MIC_R2
C18
*33P_NC
50
+3.3V_RUN
9 ICH_USBP119 ICH_USBP11+
L45 1
1 R348
GND
GND
GND
GND
GND
2 BLM18BD601SN1D
HP2_JD
39 AUD_HP2_L1
1 2.2U AUD_HP1_L_R
50
DMIC_DATA
CON2
2 1770882-4
4
3
1
6
5
603
39 AUD_HP2_R1
C809 2
1206
21
22
23
24
25
AUD_MIC_L2
C391
220P
C456 1
39 AUD_HP1_L
L43 1
0 603 DMIC_DATA_L
2 BLM18BD601SN1D
603
AUD_MIC_R1
L1
JCAMERA1
1
1
2 2
3 3
4 4
5 5
6 6
7
7
L40 1
DMIC_DATA
L2
USBP11 D+
USBP11 D+CAM_VCC
0 603 DMIC_CLK_L
2
100K
MIC1_JD 39
1
AUD_MIC_L1
50
87212-0700l-7p-l
AUD_MIC_R
2 2.2U
50
2 2.2U
50
39
C386 1
1206
C387 1
1206
39
DMIC_CLK
2
AUD_MIC_L
1
R282
L22.L24,L29,L30,L31,L32
FB_600ohm+-25%_100MHz
_200mA_0.6ohm DC
R250
4.7K
R241
4.7K
39
+3.3V_RUN
C388 1U
2
1
603
10
39 AUD_MIC1_VREFO
Array Microphone & Camera
Headphone Jack
Stereo MIC Jack
50
+5V_SPK_AMP
1
R357
2
100K
SUB_MUTE#
Q79
2N7002W-7-F
GND
MUTE#
PVDD
39 WOOFER_EN
SHDN#
SYNC
7
13
AUD_SUB_GAIN1
AUD_SUB_GAIN2
16
15
17
4
9
6
PVDD
12
PGND
14
SYNC
SYNC_OUT
PGND
G1
G2
Exposed Paddle
C853
0.1U/10V
1
2
C530
3300P
C412
3300P
+5V_SPK_AMP
C854
0.1U/10V
Fixed-frequency mode with fS = external clock frequency.
R411
*100K_NC
VDD
5
Clocked
R402 100K
1
2
+5V_SPK_AMP
Fixed-frequency mode with fS = 1500kHz.
1
2
MLX_53261-0271
Fixed-frequency mode with fS = 1100kHz.
FLOAT
C532 1U/10V
CC0603
OUT+
OUT-
GND
C528
100P
50
NPO
CN7
MAX9759
TQFN 16PIN
Spread-spectrum mode with fS = 1200kHz 70kHz.
IN+
IN-
SUB_OUT+
SUB_OUT-
11
10
Condition
VDD
SYNC
Gur_0808: 0 ohm removal,

delete R304, R309
U34
2
3
R417
100K
SYNC
+5V_SPK_AMP
1U/10V
BLM18PG121SN1D
C529 CC0603
AUD_SUB_IN+
1
2 SUB_IN+
1
2 SUB_IN120ohm, 2A
L58
AUD_MONO_OUT
C885
10U/10V
CC0805
C855
0.1U/10V
INTERNAL SUBWOOFER AMP
MAX9759ETE+
+5V_SPK_AMP
+5V_SPK_AMP
+5V_SPK_AMP
10
VDD
VSS
R610
C876
10K/F
0.068U/16V
VSS
0.068U/16V
R412
*100K_NC
R720
20K/F
13
C531
2
10K/F
C864 0.015U
0.068U/16V
C865
R713
R307 10K/F
R306
1
100K/F
2
R719
1
14K/F
2
AUD_SUB_GAIN1
AUD_SUB_GAIN2
GAIN2
GAIN
24dB
18dB
12dB
6dB
U52D
MAX4492AUD+
AUD_MONO_OUT
14
R416
100K
R409
*100K_NC
C527 0.47U/6.3V
VDD
39 AUD_FRONT_R_1
12
11
39 AUD_FRONT_L_1
U52C
MAX4492AUD+
2.2U/10V
CC0805
C526 0.47U/6.3V
R410 10K/F
1
2
1
2
BUFFER_VIAS
BUFFER_VIAS
C862
R602
100K
GAIN1
R403
100K
39
BUFFER_VIAS
BUFFER_VIAS
11
+5V_SPK_AMP
R609
100K
Title
R623
2
4.99K/F
1
QUANTA
COMPUTER
AUDIO CONN
Size
Document Number
FM9
Date:
Rev
1A
Sheet
40
8
of
64
0-ohm resister
reserved for EMI
+1.2V_LAN
Place Close to Pin10,13,30,36,39

+3.3V_LAN
+3.3V_LAN
+3.3V_SUS
+1.2V_LAN
R1076
R1077
0
R1078
C1426
0.1U
10
X7R
C1427
0.1U
10
X7R
C1428
0.1U
10
X7R
C1429
0.1U
10
X7R
C1430
0.1U
10
X7R
603
C1425
1U
10
X7R
603
C1431
0.1U
10
X7R
1
2
Place Close
to Pin19
603
C1424
1U
10
X7R
603
C1432
10U
603
6.3
C1433
0.1U
10
X7R
C1434
*0.1U_NC
10
X7R
C1435
*0.1U_NC
10
X7R
Place Close
to Pin44,45 <200mil
Width >40mil
Place Close
to Pin4
C1436
0.1U
10
X7R
C1437
0.1U
10
X7R
C1438
0.1U
10
X7R
C1439
0.1U
10
X7R
0
603
Place Close
to Pin1,29,37,40
+1.2V_LAN
+3.3V_LAN
R1079
LAN_XTALO
LAN_XTALI
+1.2V_LAN
L118
4.7uH_680mA
C1441
0.1U
10
X7R
+1.2V_LAN
U68
+1.2V_LAN
TRD1+
TRD1TRD2+
TRD2-
R1116
TRD3+
TRD3-
LAN_XTALO
AVDD33
MDIP0
MDIN0
NC/FB12
MDIP1
MDIN1
RTL8111DL
GND
NC/MDIP2
NC/MDIN2
DVDD12/AVDD12
NC/MDIP3
NC/MDIN3
Y8
LAN_XTALI
36
35
34
33
32
31
30
29
28
27
26
25
EEDI
ISOLATE#
R1081
1
C1443
27P
50
NPO
3.6K
2
CON6
+1.2V_LAN
+3.3V_LAN
R1082
R1084
1K/F
1R1132
1
R1133
02
2
0
ICH_SMBDATA 9,32,60
ICH_SMBCLK 9,32,60
R1085
LAN_PCIE_PWR_CTRL
2
C1444
C1445
9 PCIE_RX6+/GLAN_RX+
9 PCIE_RX6-/GLAN_RX-
0.1U
0.1U
LAN_PCIETXDP
LAN_PCIETXDN
R1090
15K/F
D35
2006123-4
8
7
6
5
4
3
2
1
100/F
ISOLATE#
9 CLK_PCIE_LOM
9 CLK_PCIE_LOM#
8
7
6
5
4
3
2
1
ISOLATEB
Datasheet(V1.4)P5:
Used to isolate the RTL8111DL
from the PCI-E bus.RTL8111DL will not drive
its PCI-E outputs(excluding LANWAKEB)
and will not sample its PCI-E input
as long as the isolate pin is asserted.
Realtek feed back:
S3,S4,S5
low S3,S4,S5high for WOL support
+3.3V_RUN
+1.2V_LAN
9 PCIE_TX6+/GLAN_TX+
9 PCIE_TX6-/GLAN_TX-
RJ45-TX3RJ45-TX3+
RJ45-TX1RJ45-TX2RJ45-TX2+
RJ45-TX1+
RJ45-TX0RJ45-TX0+
PLTRST# 3,9,16,26,28,29,31,32
PCIE_WAKE# 7,28,31,32
LOM_CLK_REQ# 9
13
14
15
16
17
18
19
20
21
22
23
24
25MHz
C1442
27P
50
NPO
RJ-45 Connector
+3.3V_LAN
DVDD12
LED1/EESK
LED2/EEDI
LED3/EEDO
EECS
GND
DVDD12
VDD33
ISOLATEB
PERSTB
LANWAKEB
CLKREQB
DVDD12
GND
HSIP
HSIN
REFCLK_P
REFCLK_N
EVDD12
HSOP
HSON
EGND
NC/SMCLK
NC/SMDATA
TRD0+
TRD0-
1
2
3
4
5
6
7
8
9
10
11
12
CHSGND1
CHSGND2
+3.3V_LAN
48
47
46
45
44
43
42
41
40
39
38
37
Place Close
to Pin48 <200mil
Width >60mil
VCTRL12A/SROUT12
GND
RSET
VCTR12DVDDSR
NC/VDDSR
NC/ENSWREG
CKTAL2
CKTAL1
NC/AVDD33
NC/LV_PLL
LED0
VDD33
C1440
22U
805
6.3
+3.3V_LAN
2.49K
9
10
Realtek feedback:
L118:
4.7uH power choke,
tolerance <20%,
>600mA, efficiency >75%
10,29
1
*RB501V-40_NC
L119
R1086
R1087
R1088
R1089
75/F
75/F
75/F
75/F
TXCT0
TXCT1
TXCT2
TXCT3
C1446
1000P
3KV
1808
TDCT
TDCT
TDCT
TDCT
C1447
0.01U
C1448
0.01U
C1449
0.01U
C1450
0.01U
25
25
25
25
LAYOUT NOTE:
CAP CLOSE TO TRANSFORMER
one cap for each pin
TDCT
TRD0+
TRD0-
TDCT
TRD1+
TRD1-
TDCT
TRD2+
TRD2-
TDCT
10
TRD3+
11
TRD3-
12
MCT0
TCT0
TX0+
TD0+
TX0TD0MCT1
TCT1
TX1+
TD1+
TX1TD1MCT2
TCT2
TX2+
TD2+
TX2TD2MCT3
TCT3
TX3+
TD3+
TX3-
24
TXCT0
23
RJ45-TX0+
22
RJ45-TX0-
21
TXCT1
20
RJ45-TX1+
19
RJ45-TX1-
18
TXCT2
17
RJ45-TX2+
16
RJ45-TX2-
15
TXCT3
14
RJ45-TX3+
13
RJ45-TX3-
TRD3+ C1509
TRD3- C1510
TRD2+ C1511
TRD2- C1512
TRD1+ C1513
TRD1- C1514
TRD0+ C1515
TRD0- C1516
6.8P
6.8P
6.8P
6.8P
6.8P
6.8P
6.8P
6.8P
50
50
50
50
50
50
50
50
TD3LFE9249-R
Reserved for EMI.

A
QUANTA
COMPUTER
Title
LAN
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
41
of
64
+3.3V_SUS
C1419
0.1U
51 VR_PWRGD_CLKEN#
R1018
CK_PWRGD_R
15
U65
TC7SZ04FU(T5L,F,T)
+3.3V_SUS
49 1.1V_VTT_PWRGD
R1019
R1020
R1021
R1022
R1023
R1127
+3.3V_ALW
48 1.05V_PWRGD
50 GFX_PCIE_PWRGD
50 GFX_CORE_PWRGD
R1098
100K
HWPG
HWPG
29
47 1.5V_DDR_PWRGD
29 RUN_ON_1
R1067
2K/F
44 1.8V_RUN_GFX_PWRGD
RUN_ON
24,44,47,48,49,52
+3.3V_RUN
44 1.8V_RUN_PWRGD
U66
74AHCT1G08GW
R1024
*0_NC
D37
H_VTTPWRGD
H_VTTPWRGD 3
RB500V-40
VTTPWRGOOD
R1066 SC(V1.0)P18:
1K/F VTT_1.1 VR power good signal
to processor. Signal voltage level
is 1.1 V.
R1025
*10K_NC RUN_ON
R1026
*10K_NC RUN_ON_1
QUANTA
COMPUTER
Title
System Reset Circuit
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
42
of
8
64
Title
QUANTA
COMPUTER
Battery Selector
Size
Document Number
FM9
Date:
Rev
1A
Sheet
5
43
of
64
PQ38
FDS6298
+3.3V_ALW
POWER_JP
9
8
7
6
5
PC163
10U/6.3V/0805
PC214
0.1U/10V/0402
3
2
1
+1.8V_RUN_GFX
TDC : 1.05A
D
PJP8
PJP9
POWER_JP
+1.8V_RUN_GFX
PR148
*100K/0402_NC
+3.3V_SUS
24,42,47,48,49,52
RUN_ON
EN
VCC
FB
PC215
100P/50V/0402
R1
PR146
49.9K/F
R2
PR147
39K/F
PC213
22U/6.3V/0805
+5V_ALW
PR209
0
PU11 RT9024PE
PGD DRV 5
GND
42 1.8V_RUN_GFX_PWRGD
PC63
0.1U/10V
PC216
1U/10V/0603
Vout =0.8(1+R1/R2)
=1.8V
+1.8V_RUN_GFX for VGA 1.8V

+1.8V_RUN for CPU and PCH 1.8V
+3.3V_SUS
PR164
*100K_NC
+1.8V_RUN
TDC : 0.74A
2
PC218
1U
805
10
PC219
0.1U
25
603
+5V_ALW
PC220
0.1U
25
603
PC200
0.1U
25
603
PJP10 POWER_JP
8
7
6
5
+1.8V_RUN
PR160 0 603
PR165
*100K_NC
POWER_JP
PU9
RT9018B
1 POK
GND
2 VEN
ADJ
3 VIN
VO
4 VPP
NC
PR150
49.9K/F
PR149
39K/F
R1
R2
+3.3V_ALW
PR163
PJP11
RUN_ON
42 1.8V_RUN_PWRGD
24,42,47,48,49,52
PC217
10U
805
4
B
Vout =0.8(1+R1/R2)
=1.8V
Title
+1.8V_RUN_GFX (RT9024PE) & +1.8V_RUN(RT9018B)
Size
Date:
5
Document Number
FM9
Rev
1A
Sheet
1
44
of
64
Continuous current : 13A

Rds(on) : 18mohm
Continuous current : 13A

Rds(on) : 18mohm
PQ3
PQ4
SI4835DDY-T1-E3
SI4835DDY-T1-E3
+PWR_SRC
PR540
10K
8
7
6
5
2512
1
2
3
+DC_IN_SS
0.01/F
1
3
+DC_IN_SS
PR539
2
1
2
3
8
7
6
5
PR541
100K
+DC_IN_SS
PR542
470K
PQ5
2N7002W-7-F
PD1
SDM10K45-7-F
PR544
CSSN
PR548
15.8K/F
PC23
603
10
9
14
IINP
IINP
PR553
4.7K
5
4
PC33
0.01U
0.1U
PC35
PC34
0.01U
25
25
3
24
DHI
LX
23
LX
DLO
20
PGND
19
3
PC36
0.01U
25
CCV
CSIP
CSIN
CCI
FBSA
CCS
REF
8731REF
PC37
1U
603
10
10
FBSB
5
6
7
8
PC20
0.1U
603
50
PQ6
SI4800BDY-T1-E3
603
PC64
3300P
1
2
10
PR56
603
PL2
5.8UH+-30%5.5A SIL104R-5R8B
CHG_CS
2
10*10.1
PR549
0.01/F 2512
1
DLO
PR551
2.2
805
FL4
1
50
18
PQ7
PC31
1000P
+VCHGR
53
HI1206T161R-10(160,6A)
PC24
3300P
PC25
2200P
PC26
1000P
PC27
0.1U
603
50
50
1
2
3
8731_IINP
PR555
8.45K/F
26
DHI
Adress :
12H
29
SMBUS Address 12
SCL
SDA
BATSEL
HI1206T161R-10(160,6A)
PC21 1U
VCC
VDD
0.1U
50
29,38,53 SMBCLK0
29,38,53 SMBDAT0
PR552
ACOK
21
11
+3.3V_ALW
FL2
HI1206T161R-10(160,6A)
PC17
10U
1206
25
10
PR547
33/F
603
LDO
25 BST
1
2
3
13
ACAV_IN
BST
GND
PR559
ACIN
12
29,37
PC19 0.01U
25
DAC
PR546
10K/F
50
PC16
*10U_NC
1206
25
PC18 1U
603
8731_ACIN
2
603
PC15
0.1U
603
50
LDO
5
6
7
8
DCIN
27
28
1
22
GND
PR545
49.9K/F
LDO
FL3
PC14
2200P
PC13
1U
805
25
CSSP
PR543
365K/F
LDO
2
CSSP
CSSN
+DC_IN_SS
50
PC28
10U
1206
25
PC29
10U
1206
25
PC30
*10U_NC
1206
25
SI4800BDY-T1-E3
17
50
15
PR554
CSIP
+VCHGR
Max Charging current

setting 4.7A
CSIN
100
PC32
220P
16
MAX8731A
50
PU2
PC38
0.1U
PR556
10
Charger circuit
Control IC: MAX8731AETI+
H/S MOSFET: SI4800(Vishay), Qg=13nC, Rds(on)=30mohm, PD:1.3W
L/S MOSFET: SI4800(Vishay), Qg=13nC, Rds(on)=30mohm, PD:1.3W
Inductor: 5.8UH +-30% 5.5A SIL104R-5R8B(Delta), DCR=24mohm
Output Cap: 2*10U 25V(+-10%,X6S,1206)
Short Jump
GNDA_CHG
Title
QUANTA
COMPUTER
Charger (MAX8731)
Size
Document Number
FM9
Date:
Rev
1A
Sheet
E
45
of
64
PJP4
PR557
ISL6237_ONLOD
+DC1_PWR_SRC
PR192
PD13
POWER_JP
390K
1
PJP5
*UDZSTE-175.6B_NC
2
+5V_ALW2
PC39
*10U_NC
1206
25
+5V_ALW
Fs=400K
TDC : 5.83A
OCP : 8.33A
PC40
10U
1206
25
PC41
0.1U
50
603
PC42
2200P
50
PR561
+5V_VCC1
*10/0603_NC
PC44
0.1U
50
603
PC43
4.7U
10
1206
PC50
PC49
0.1U
50
603
+5V_ALW
1U/25V
50
603
PC51
1U
603
10
PR566
FDS8878
PJP6
POWER_JP
*0_NC
1
2
3
POK1
+5V_EN1
8
7
6
5
237K/F
+5V_DL
PC56
0.1U
50
603
PC222
*2200P_NC
50
PQ11
SI4812BDY-T1-E3
PAD
LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF
PAD
PAD
PAD
35
34
33
PC55
0.1U
603
50
PR573
0
3
2
1
+ PC54
220U
7343
10
PR106
2.2/F
*0603_NC
TPS51427A
+3.3V_ALWP
200K/F
PR569
POK2
0
+3.3V_EN2
+3.3V_DH
PC57
0.1U
50
603
PR105
2.2/F
*0603_NC
PC221
*2200P_NC
50
FDS6680AS
+ PC53
220U
10
7343
PC52
0.1U
603
50
PQ10
PR574 603
1
+3.3V_DL
PR575
1 603
PR567
5
6
7
8
PR568
PR571
*0_NC
PU3
32
31
30
29
28
27
26
25
1
2
3
+5V_LX
REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
ON2
DH2
LX2
BST1
DL1
VDD
NC
AGND
PGND
DL2
BST2
3
2
1
PL4
3.3uH/SIL1045R-3R3A/8A/21mOhm
+5V_ALWP
PL3
FDVE1040-H-3R3M=P3
+3.3V_LX
17
18
19
20
21
22
23
24
+5V_ALWP
PAD
PAD
PAD
PAD
BYP
OUT1
FB1
ILIM1
PGOOD1
ON1
DH1
LX1
PAD
PAD
+3.3V_ALW
Fs=300K
TDC : 8.23A
OCP : 11.77A
+3.3V_ALW
8
7
6
5
41
40
39
38
9
10
11
12
13
14
15
16
37
36
+5V_DH
PC47
*10U_NC
1206
25
PQ8
42
8
7
6
5
4
3
2
1
PQ9
SI4800BDY-T1-E3
PC46
10U
1206
25
PC48
0.1U/10V
PR564
*0_NC
PJP7
POWER_JP
PC45
2200P
50
POWER_JP
+3.3V_ALW
Control IC: TPS51427A
H/S MOSFET: FDS8878(Fairchild), Qg=14nC, Rds(on)=17mohm, PD:2.5W
L/S MOSFET: FDS6680AS(Fairchild), Qg=16nC, Rds(on)=10.5mohm, PD:2.5W
Inductor: 3.3UH +-20% 12.3A FDVE1040-H-3R3M=P3(TOKO), DCR=10.1mohm
Output Cap: 1*220U 10V(+-20%,ESR25,7343)H2.8,ripple current 2449mA
5
6
7
8
+PWR_SRC
ISL6237_ONLOD
PR558
150K/F
603
PR576
+5V_ALW2
+3.3V_ALWP +3.3V_ALWP
PC58
1U
603
10
+5V_ALW
Control IC: TPS51427A
H/S MOSFET: SI4800BDY-T1-E3(Vishay), Qg=13nC, Rds(on)=30mohm, PD:1.3W
L/S MOSFET: SI4812BDY-T1-E3(Vishay), Qg=13nC, Rds(on)=21mohm, PD:1.4W
Inductor: 3.3UH +-30% 9A SIL1045R-3R3(Delta), DCR=21mohm
Output Cap: 1*220U 10V(+-20%,ESR25,7343)H2.8,ripple current 2449mA
Short Jump
PR585
100K
BAT54S-7-F
+5V_ALWP
0.1U
50
603
PQ12
DDTA114YUA-7-F
0.1U
50
603
1
PD3
3V_ALW_PWRGD
POK1
2
+15V_ALW
POK2
PC59
PD2
PC60
5V_ALW_PWRGD
PC61
0.1U
50
603
Ton
+15V_ALWP
47K
VREF2 or Float
5V
10K
BAT54S-7-F
Channel1 Fs
+3.3V_RUN
PR577
*39K/F_NC
PQ13
2N7002W-7-F
3
PR171
+3.3V_EN2 PR578
200K
PD4
PC62
0.1U
50
603
400 kHz
400 kHz
200 kHz
500 kHz
300 kHz
300 kHz
Channel2 Fs
PQ49
2N7002W-7-F
1
MB_THERM# 19
PR579
PM_THRMTRIP# 3
PR581
THERM_STP# 29,38
PR583
3.3V_ALW_ON 37
BAS316
+5V_EN1
29,37 ALW_ON
GND
+5V_ALW2
PR580
PR586
100K
Title
QUANTA
COMPUTER
3.3V_ALW / 5V_ALW(TPS51427A)
PR582
*0_NC
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
46
of
64
+1.5V_SUS
+PWR_SRC
23
PR97
GND
VBST
MODE
DRVH
22
DDR_VBST
0
603
21
+1.5V_DH
20
+1.5V_LX
2
50
PC205
1 0.1U
603
PC206
2200P
50
2
PC207
0.1U
50
603
PC211
10U
1206
25
PC198
*10U_NC
1206
25
PJP37 POWER_JP
PJP33 POWER_JP
PL11
50
DDR_V5IN
RUN_ON
PR89
COMP
DRVL
NC
PGND
+1.5V_SUS_P
*0.1U_NC
603
*0_NC
PR92
S3_1.5V
10
PR93
S5_1.5V
11
VDDQSNS CS_GND
VDDQSET
S3
CS
19
+1.5V_DL
V5IN
18
SUS_ON
S5
V5FILT
PQ35
17
FDMS7672
16
DDR_CS
15
DDR_V5IN
14
DDR_V5FILT
PR25 12.4K/F
1
2
12
NC
+1.5V_SUS
PU10 PGOOD 13
TPS51116REGR
PC199
*2200P_NC
50
+ PC160
PC210
0.1U
25
603
+ PC161
220UF/ 2.5V/ ESR15
C
PR33
+5V_ALW
5.1
PR22
PC212
*0.1U_NC
25
603
PR104
2.2/F
*0603_NC
PR26
29,52
0.88uH_MPC1040LR88
24,42,44,48,49,52
LL
5
6
7
8
9
PC209
PC204
0.033U
603
25
DDR_V5IN
VTTREF
220UF/ 2.5V/ ESR15
1
2
3
PR94
+DDR_VTTREF
1
2
3
PQ14
FDS6298
VLDOIN
24
VTTSNS
VTT
VTTGND
PC203
10U
805
10
5
6
7
8
PC180
10U
805
10
25
PC202
10U
805
10
GND
PJP35 POWER_JP
VTT
2
1
+0.75V_DDR_VTT
PJP34 POWER_JP
+DC2_PWR_SRC
+0.75V_DDR_VTT
TDC : 0.7A
+1.5V_SUS
Fs=400K
TDC : 14.25A
OCP : 20.37A
1
100K
+3.3V_ALW
1.5V_DDR_PWRGD
42
603
PC183
1U/10V/0603
0
PC208
1U/10V/0603
50
PC201
+1.5V_SUS
Control IC: TPS51116REGR
H/S MOSFET: FDS6298(Fairchild), Qg=14nC, Rds(on)=12mohm, PD:3W
L/S MOSFET: FDMS7672(Fairchild), Qg=19nC, Rds(on)=6.9mohm, PD:2.5W
Inductor: 0.88UH +-20% 24A MPC1040LR88C(Tokin), DCR=2.3mohm
Output Cap: 2*220U 2.5V(20%,ESR15,7343,H1.9),ripple current 2700mA
PR91
49.9K/F
*18P_NC
PR90
49.9K/F
B
VDDQ and VTT discharge control

MODE pin
Discharge mode
VDDQ output voltage selection

VDDQSET
Outputs Management by S3, S5 control
VDDQ(V)
VTTREF and VTT
NOTE
State
S3
S5
VDDQ
VTTREF
VTT
V5IN
No discharge
GND
2.5V
VDDQSNS/2
DDR
S0
HI
HI
On
On
On
VDDQ
Tracking discharge
V5IN
1.8V
VDDQSNS/2
DDR2
S3
LO
HI
On
On
Off (Hi-Z)
S4/GND
Non-tracking discharge
VDDQSNS/2
1.5V < VVDDQ < 3V
S4/S5
LO
LO
On (discharge)
Off (discharge)
Off (discharge)
FB Resistors
Adjusting
Title
DDR3 +1.5V_SUS(TPS51116)
Size
Date:
5
Document Number
FM9
Rev
1A
Sheet
1
47
of
64
+PWR_SRC
PJP12
+1.05V_PWR_SRC
2
POWER_JP
PC81
*10U_NC
1206
25
PC82
10U
1206
25
PC83
0.1U
50
603
PC84
2200P
50
+1.05V_PCH
Fs=300K
TDC : 4.91A
OCP : 7.02A
+1.05V_PCH
5
6
7
8
+5V_ALW
PJP13
POWER_JP
RUN_ON
0
PR599
+1.05V_VFB
10
TRIP
DRVH
EN
SW
VFB
PGOOD
RF
DRVL
GND
11
PC87
*0.1U_NC
0.1U/50V/0603
PC86
603
+1.05V_DH
PL5
1.5UH30%10A(SIL104R-1R5B)
1
2
+1.05V_LX
VBST
PR597
V5IN
+1.05V_P
1.05V_PWRGD 42
5
6
7
8
PJP14
POWER_JP
1
2
3
PU5
PR598
100K/F
42,44,47,49,52
SI4800BDY-T1-E3
PC85
1U/10V/0603
PQ36
+1.05V_DL
PR602
*2.2/F/0603_NC
TPS51218DSCR
PC88
+
PC90
*1500P_NC
50
1
2
3
PR604
*100K_NC
PQ15
SI4812BDY-T1-E3
PR603
*422K/F_NC
PC92
*2200p/50V_NC
+1.05V_VFB
PC91
0.1U
50
603
220U/2.5V/ESR15
PR601
470K/F
PR600
11K/F
PR605
22.1K/F
+3.3V_SUS
B
Frequency setting
pin5 resister
Frequency
470k
300kHz
200k
350kHz
100k
390kHz
47k
+1.05V_PCH
Control IC: TPS51218DSCR
H/S MOSFET: SI4800BDY-T1-E3(Vishay), Qg=13nC, Rds(on)=30mohm, PD:1.3W
L/S MOSFET: SI4812BDY-T1-E3(Vishay), Qg=13nC, Rds(on)=21mohm, PD:1.4W
Inductor: 1.5UH +-30% 10A SIL104R-1R5B(Delta), DCR=8.1mohm
450kHz
Title
+1.05V_PCH(TPS51218)
Size
Date:
5
Document Number
FM9
Rev
1A
Sheet
1
48
of
64
+PWR_SRC
PJP15
+1.1V_VTT_PWR_SRC
2
POWER_JP
PC93
10U
1206
25
PC94
*10U_NC
1206
25
PC95
0.1U
50
603
PC96
2200P
50
+1.1V_VTT
Fs=300K
TDC : 12.64A
OCP : 18.06A
+5V_ALW
FDS6298
PC97
1U/10V/0603
4
PJP16
POWER_JP
EN
SW
PGOOD
DRVL
GND
11
VFB
CCM
PC99
*0.1U_NC
603
+1.1V_VTT_DH
10
DRVH
PJP17
POWER_JP
VBST
TRIP
PC98
PL12
+1.1V_VTT_LX
+1.1V_VTT_P
0.88uH_MPC1040LR88
1.1V_VTT_PWRGD 42
+1.1V_VTT_DL
PR610
*2.2/F/0603_NC
TPS51218DSCR
+ PC101
PR611
10K/F
PC100
*1500P_NC
50
PR609
470K/F
FDMS7672
PR612
*100K_NC
1
2
3
PQ37
PR613
*422K/F_NC
PC104
*2200p/50V_NC
+1.1V_VTT_VFB
+ PC102
PR614
20K/F
VFB=0.7V
PC103
0.1U
50
603
330U/2V/E9/7343
+1.1V_VTT_VFB
0
PR608
V5IN
0.1U/50V/0603
330U/2V/E9/7343
RUN_ON
5
6
7
8
9
PR607
90.9K/F
PR606
1
2
3
PU6
44,47,48,52
+1.1V_VTT
5
6
7
8
PQ16
+3.3V_SUS
PR685
0
PR675
B
137K/F
PR684
*0_NC
3
+3.3V_SUS
Frequency setting
PR95
PQ19
BSS138-7-F
100k
47k
PR103
*10K_NC
Frequency
300kHz
350kHz
390kHz
450kHz
100K
VTT_SENSE 5
200k
470k
PR96
10K
5
PQ20
BSS138-7-F
H_VTTVID1
PR98
100K
H_VTTVID1:
High level 1.05V for Auburndale
Low level 1.1V for Clarksfield
PC76
0.01U
16
pin5 resister
+1.1V_VTT
Control IC: TPS51218DSCR
Inductor: 0.88UH +-20% 24A MPC1040LR88C(Tokin), DCR=2.3mohm
Output Cap: 2*330U 2V(+10/-35%,7343,ESR=9),ripple current 3000mA
Title
+1.1V_VTT(TPS51218)
Size
Date:
5
Document Number
FM9
Rev
1A
Sheet
1
49
of
64
+PWR_SRC
+5V_ALW
8792TON
DH
8792DH
BST
8792BST
17,19,29
8792PGD
PR176
GFX_ON
14
8792EN
PR161
LX
8792LX
8792DL
ILIM
PQ27
FDMS7672
15
1
1
PC164
+VCC_GFX_CORE
Fs=300K
TDC : 8.13A
OCP : 11.62A
Short Jump
Place near GND pin15
50
PC116
+
PC167
0.1U
10
PC170
*1500P_NC
50
PR584
PR155
5.23K/F
1
PJP28
POWER_JP
PC166
1000P
+3.3V_SUS
2
2
8792ILIM
EP
REF
220U/2.5V/ESR15
FB
+VCC_GFX_CORE_P
220U/2.5V/ESR15
PR186
60.4K/F
PR167
*2.2_NC
805
5
6
7
8
9
REFIN
11
0.75U +-20% 14.5A(FDVE0630-R75M=P3)

2
1
REF-2V
8792REF
+VCC_GFX_CORE
PJP22
POWER_JP
PL9
SKIP#
DL
0.1U
PC268 0.22U
1
2
805
50
PR172 1 603
1
2
PU8
EN
PC270
8792REFIN 10
PQ34
PGOOD
MAX8792ETD+T
8792SKIP# 12
PJP26
POWER_JP
PC273
*10U_NC
1206
25
FDS6298
VCC
*0_NC
50
2
200K/F
42 GFX_CORE_PWRGD
1
PR157
PC275
10U
1206
25
2
TON
13
VDD
PC274
0.1U
603
50
8792VCC
PC269
2200P
1U/10V/0603
5
6
7
8
PC266
2
PR642
*100K_NC
1
2
3
1U/10V/0603
1
2
3
PC165
PR178
0
603
+3.3V_SUS
+GPU_PWR_SRC
PR170
100K/F
2
PR187
49.9K/F
+VCC_GFX_CORE
Control IC: MAX8792ETD+T
Inductor: 0.75UH +-20% 14.5A FDVE0630-R75M=P3(TOKO), DCR=6.2mohm
16
GFX_CORE_CNTRL0
8792REFIN_1
PR173
20K
PQ30
BSS138-7-F
2
PC267
0.01U
PR169
100K
3
17 GFX_CORE_CNTRL0
CNTRL0
PQ28
BSS138-7-F
PR180
267K/F
PR151
10K
PR168
10K
2
GFX_CORE_CNTRL2
+VCC_GFX_CORE
LOW
LOW
LOW
0.9
HIGH
LOW
LOW
1.0V
HIGH
HIGH
LOW
1.1V
HIGH
HIGH
HIGH
1.2V
+3.3V_SUS
GFX_CORE_CNTRL1
PR162
10K
CNTRL1
PC272
0.01U
16
PR184
*100K_NC
3
1
PR175
10K
2
PC279
0.1U
25
603
PC278
0.1U
25
603
PC280
0.1U
25
603
+1.1V_GFX_PCIE
1
PR154
49.9K/F
PR183
133K/F
R1
PC277
10U
805
4
Vout =0.8(1+R1/R2)
=1.5V
R2
PR179
5.11K/F
PC276
0.01U
PR189
21K/F
1
BSS138-7-F
PR177
100K
16
A
PR191
20K
PR181 0 603
+5V_ALW
PJP27 POWER_JP
8
7
6
5
PQ33
CNTRL1
PQ32
BSS138-7-F
PR182
*100K_NC
PC271
1U
805
10
PR153
10K
POWER_JP
+1.5V_SUS
+3.3V_SUS
PR185
PJP23
GFX_ON
42 GFX_PCIE_PWRGD
17,19,29
PU13
RT9018B
1 POK
GND
2 VEN
ADJ
3 VIN
VO
4 VPP
NC
9
8792REFIN_2
PR190
20K
17 GFX_CORE_CNTRL2
+1.1V_GFX_PCIE
TDC : 1.41A
17 GFX_CORE_CNTRL1
PQ29
BSS138-7-F
+3.3V_SUS
BSS138-7-F
PR166
100K
PR188
20K/F
PR174
20.5K/F
PQ31
PR152
10K
Title
VGA power (MAX8792 & RT9018B)
Size
Date:
5
Document Number
FM9
Rev
1A
Sheet
1
50
of
64
+PWR_SRC
+CPU_PWR_SRC
PJP18
PC306
PJP19
PQ69
NTMFS4943N
PC65
2.2U/6.3V/0603
ILIM
BST1
1
2
3
UG1
28
PL15
2
PH1
PQ71
PC75
0.22U/25V/0603
PR309
200K/F
16
+CPU_PWR_SRC
LX1
NTMFS4935N
32
33
34
35
36
37
38
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PR306
0
13
29 IMVP_VR_ON
PR329
2.61K/F
4
LG1
27
1
2
3
5
5
5
5
5
5
5
+VCC_CORE
29
TON
DL1
0.36uH_30A_ETQP4LR36WFC
1
30
PC131
*1500P/50V_NC
DH1
PR308
1/0603
5
PC73
10U/25V/1206
+VCC_CORE
TDC:38A
Max current: 51A
TIME
PC107
10U/25V/1206
5
6
7
8
9
VDD
PR303
9.1K/F
VCC
PR305
133K/F
PC71
0.1U/50V/0603
26
PC119
2.2U/6.3V/0603
PC135
2200P/50V
5
6
7
8
9
*100U/25V_NC
*100U/25V_NC
PR312
10/0603
PC304
+
*100U/25V_NC
PC305
+
*100U/25V_NC
PC307
+
+5V_SUS
PR304
*2.2_NC
805
PR465
4.53K/F
+ PC315
330U
2
7343
PC79
0.1U/50V/0603
PR464
10K/NTC/0603
+ PC327
330U
2
7343
PC120
*1000P/50V_NC
D0
D1
D2
D3
D4
D5
D6
CSP1
CSP1
39
PR466
2.2/0603
SHDN
CSN1
PC78
0.22U/25V/0603
CSN1
40
+CPU_PWR_SRC
PR307
499/F
5
14
DPRSLPVR
*1000P/50V_NC
PC123
DPRSLPVR
PQ62
DH2
15
BST2
UG2
10K
PR310
29 IMVP_PWRGD
PC68
10U/25V/1206
PC106
10U/25V/1206
21
PSI
18
PWRGD
LX2
PC72
0.22U25V/0603
22
PL16
2
PH2
+5V_RUN
DL2
3
NTMFS4935N
THRM
PC113
*1000P/50V_NC
+3.3V_RUN
LG2
CSP2
PR469
2.2/0603
PR320
0
25
29 IMVP6_PROCHOT#
VRHOT
CSN2
PR317
1K/F
4
I_MON
PC114
0.1U/10V
PC126
0.22U/25V/0603
11
IMON
PR321
7.5K/F
PR323
1.91K/F
FBAC
PR467
4.53K/F
PC109
0.1U/50V/0603
PR468
10K/NTC/0603
VSSSENSE
VCCSENSE
10
PR318
PR322
10
PC144
*1000P/50V_NC
+3.3V_ALW
CLKEN
FB
PR327
1K
*10_NC
PR325
+5V_ALW
+3.3V_RUN
PWM3
+CPU_PWR_SRC
+VCC_CORE
1000P/50V
PC134
PQ63
20
PR328
1/0603
NTMFS4943N
5
6
7
8
9
17
42 VR_PWRGD_CLKEN#
+ PC317
330U
2
7343
PR316
*10_NC
10
VSSSENSE
PR331
2.61K/F
PR324
*2.2_NC
805
CSN2
PC121
1000P/50V
*1000P/50V_NC
PC77
GNDS
PR319
14.7K/F
+VCC_CORE
PC112
*1500P/50V_NC
CSP2
12
1
2
3
PR274
499/F
PR313
*NTC_100K_NC
1
PQ65
24
5
6
7
8
9
PR314
13K/F
PC69
0.1U/50V/0603
1
2
3
+3.3V_RUN
PC127
2200P/50V
H_PSI#
NTMFS4943N
PR311
1/0603
PR315
0
5
23
5
6
7
8
9
PC132
2200P/50V
PC111
0.1U/50V/0603
PC125
10U/25V/1206
PC110
10U/25V/1206
4
PU7
5
17030_PWM3
17030_SKIP#
PR330
100K
PC162
*1000P/50V_NC
2
6
3
9
VDD
PWM
SKIP
BST
DH
LX
GND
PAD
DL
PC118
0.22U/25V/0603
UG3
PL17
2
PH3
7
LG3
PQ66
MAX8791GTA+
CSP3
NTMFS4935N
2
PR472
2.2/0603
MAX17036GTL+
PC105
0.22U/25V/0603
CSN3
PR333
*2.2_NC
805
PR332
2.61K/F
PR471
4.53K/F
PR470
10K/NTC/0603
PC117
0.1U/50V/0603
+ PC326
330U
2
7343
CSP3
41
EP
+VCC_CORE
PC130
*1500P/50V_NC
1
2
3
PU4
1
3
19
DRVSKP
1
2
3
PGD_IN
PC89
1U/10V/0603
5
6
7
8
9
31
*1000P/50V_NC
PC169
PR750
CSN3
Short Jump
AGND_VCORE
Title
CPU core (MAX17036)
Size
Date:
5
Document Number
FM9
Rev
<RevCode>

1
Sheet
51
of
64
+5V_ALW
+5V_ALW
+15V_ALW
+5V_RUN
PQ39
+5V_RUN
TDC : 2.67A
+5V_ALW
+15V_ALW
+3.3V_ALW
PQ40
SI4800BDY-T1-E3
+3.3V_SUS
+3.3V_SUS
TDC : 0.46A
SI4800BDY-T1-E3
RUN_ON#
SUS_3.3V_ENABLE
SUS_ON_3.3V#
4
PQ41B
2N7002DW-7-F
29,47
PC174
4700P
25
PC175
4700P
25
PC177
0.1U
603
50
RUN_ON#
RUN_ON#
+5V_SUS
TDC : 2.1A
PC176
0.1U
603
50
SUS_ENABLE_5V
SUS_ON_3.3V#
RUN_ENABLE_1.5V
+5V_SUS
3
2
1
PQ44
FDS6298
3
2
1
8
7
6
5
PR680
100K
8
7
6
5
PR681
100K
+1.5V_RUN
TDC : 3.74A
+1.5V_RUN
+5V_ALW
PQ43
SI4800BDY-T1-E3
PQ45
2N7002W-7-F
PC178
4700P
25
+1.5V_SUS
PQ42A
2N7002DW-7-F
PQ42B
2N7002DW-7-F
+15V_ALW
+15V_ALW
PC173
0.1U
603
50
SUS_ON
PQ41A
2N7002DW-7-F
3
2
1
RUN_ON
24,42,44,47,48,49
8
7
6
5
PR677
100K
RUN_ENABLE_5V
PR676
100K
PC172
0.1U
603
50
PR679
100K
PR678
100K
3
2
1
8
7
6
5
2
1
PQ46
2N7002W-7-F
PC179
0.047U
25
+15V_ALW
PQ47
FDS8880_NL
+3.3V_ALW
8
7
6
5
PC181
0.1U
603
50
RUN_ENABLE_3.3V
RUN_ON#
+3.3V_RUN
TDC : 5.93A
3
2
1
PR683
100K
+3.3V_RUN
2
PC182
4700P
25
PQ50
2N7002W-7-F
Reserve discharge path
R1058
*1K_NC
+5V_SUS
R1059
*30/F_NC
+3.3V_SUS
R1060
*1K_NC
R1061
*1K_NC
R1057
*1K_NC
+1.5V_SUS
R1056
*1K_NC
+1.8V_RUN_GFX
+0.75V_DDR_VTT
R1055
*1K_NC
R1054
*10_NC
R1053
47
+1.5V_RUN
+1.8V_RUN
+3.3V_RUN
+5V_RUN
Q96
*2N7002W-7-F_NC
Q97
*2N7002W-7-F_NC
Q95
*2N7002W-7-F_NC
Q94
*2N7002W-7-F_NC
SUS_ON_3.3V#
Q93
*2N7002W-7-F_NC
Q92
*2N7002W-7-F_NC
Q91
*2N7002W-7-F_NC
2
1
2N7002W-7-F
2
Q90
*2N7002W-7-F_NC
RUN_ON# 2
Q89
Title
QUANTA
COMPUTER
RUN / SUS POWER SW
Size
Document Number
FM9
Date:
Rev
1A
Sheet
5
52
of
64
PD8
*DA204U_NC
PD7
*DA204U_NC
50
+VCHGR
45
2 0.1U
603
PD6
*DA204U_NC
PC186
+3.3V_ALW
PD5
*DA204U_NC
2 1000P 50
2 2200P 50
PC185 1
PC184 1
+3.3V_ALW
PR686
10K
JBAT1
Adress : 16H
1
2
3
4
5
6
7
8
9
PR687
1
1
PR688
SMBUS Address 16
100
BATT1+
BATT2+
SMB_CLK
SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
BATT1BATT2-
2
2
100
PR689
1
1
PR690
SMBCLK0 29,38,45
SMBDAT0 29,38,45
100
2
2
100
PBAT_PRES# 29
PBAT_ALARM#
200045MR009H579ZL
+3.3V_ALW
+5V_ALW2
PD9
DA204U
PR691
2.2K
DB_PSID
PR692
DOCK_PSID
PQ51
2N7002W-7-F
PR693
1
100
PS_ID
29
PR694
100K/F
+5V_ALW2
2
PD10
*BAS316_NC
GND
PR695
10K
PD11
*DA204U_NC
2
PC191
100P
50
1
PQ52
MMST3904-7-F
PR696
PS_ID_DISABLE#
*100_NC
PC190
0.1U
50
603
2
PC189
1000P
50
2
1
2
1
PC188
2200P
50
PR697
15K/F
1
1
+DCIN_JACK
+DCIN_JACK
87438-0843
+5V_ALW2
DB_PSID
PC187
100P
50
RBAT2_LED 37
RBAT1_LED 37
BAT2_LED
BAT1_LED
LED_DET
PSID
GND
GND
DC
DC
8
7
6
5
4
3
2
1
J15
603
Change Value per GG updated
EMI requirement on 0812
25
1
PC195
0.1U
603
50
PC196
0.1U
603
50
PR699
10K/F
603
1
PC194
0.01U
PR698
240K
+DC_IN_SS
PC193
0.47U
805
25
8
7
6
5
2
1
+DCIN_JACK
PC192
0.1U
603
50
SI4835DDY-T1-E3
1
2
3
FL1
BLM41PG600SN1L
PQ53
+DC_IN
+DCIN_JACK
PC197
10U
1206
25
PRV1
PR700
47K
*VZ0603M260APT_NC
Title
QUANTA
COMPUTER
DCIN,BATT CONNECTOR
Size
Document Number
FM9
Date:
Rev
1A
Sheet
E
53
of
64
FOR CPU use

H11
*H-C276D177P2_NC
H-C276D157P2
TH2
H-TC118BC197D63P2
H5
*H-C276D177P2_NC
H-C276D177P2
TH3
H-TC118BC197D63P2
H12
*H-C276D177P2_NC
H-C276D157P2
H4
*H-C276D177P2_NC
H-C276D157P2
For MiniCard nut use.

on 31' header
H10
*H-C256D154P2_NC
H-C256D154P2
H14
*H-C256D154P2_NC
H-C256D154P2
H15
*H-TC315BC335D126P2_NC
h-tc315bc295d126p2
H20
H-TC315BC394D126P2
H1
H-TC315BC394D126P2
H3
H-TC315BC394D79P2
For GPU nut use.
H18
*h-fm8b-1_NC
h-fm8b-1
H26
*H-C256D154P2_NC
H-C256D154P2
H27
*H-C256D154P2_NC
H-C256D154P2
H22
H-TC315BC394D126P2
H23
H-TC315BC394D126P2
H2
*o-o177x472d177x472n_NC
o-o177x472d177x472n
For PCH nut use.
PV1
GND
*PAD138X98XH_NC
PV2
*PAD138X98XH_NC
GND
H24
*h-TC256BC315D110P2_NC
h-TC256BC315D110P2
H9
H-TC315BC394D126P2
H16
H-TC315BC394D126P2
H19
H-TC315BC394D126P2
H7
*h-tc256bc315d126p2_NC
h-tc315bc394d126p2
H17
H-TC256BC315D126P2
QUANTA
COMPUTER
H21
*H-C394D394N_NC
H-C394D394N
H13
*H-C197D197N_NC
H-C197D197N
H6
*H-C228D228N_NC
H-C228D228N
H8
*H-C228D228N_NC
H-C228D228N
Title
SCREW PAD
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
54
of
8
64
Reserved for EMI.
QUANTA
COMPUTER
Title
EMI CAP
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
55
of
64
+3.3V_SUS
+3.3V_RUN
2.2K
2.2K
2.2K
2.2K
+3.3V_RUN
H14
ICH_SMBCLK
C8
ICH_SMBDATA
WLAN_SMBCLK
7002
30
WLAN_SMBDATA 32
MINICARD-WLAN
/WWAN
7002
7
+3.3V_RUN
EXPRESS CARD
13
14 Fall Sensor
51
53
+3.3V_SUS
23
PCH
2.2K
XDP
24
LAN
2.2K
G6
SMB_CLK_ME0
G8
SMB_DATA_ME0
+3.3V_SUS
+3.3V_ALW
2.2K
10K
2.2K
10K
+3.3V_SUS
E10
SMB_CLK_ME1
G12
SMB_DATA_ME1
7002
SMBCLK1
115
SMBDAT1
116
EC
7002
+3.3V_SUS
202
+3.3V_ALW
200
SO-DIMM
+3.3V_RUN
32
2.2K
10K
2.2K
10K
31
CLOCK
+3.3V_RUN
C
110
SMBCLK0
111
SMBDAT0
7002
THERMAL(EMC1422)
7
7002
+3.3V_RUN
9
10
100
2.2K
10K
BATTERY
100
+3.3V_SUS
10K
4
3
+3.3V_ALW
SIO
ITE8502
CHARGER
2.2K
+3.3V_SUS
115
SMBCLK1
116
SMBDAT1
SMB_CLK_ME1 115
7002
SMB_DATA_ME1 116
PCH
7002
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ADM1032A
D
2.2K
4.7K
2.2K
4.7K
+3.3V_ADM1032A
117
SMBCLK2
118
SMBDAT2
7002
VGA THERMAL
7002
+3.3V_ADM1032A
Title
QUANTA
COMPUTER
SMBUS BLOCK
Size
Document Number
FM9
Date:
Rev
1A
Sheet
8
56
of
64
(OPT)
D
CPU
VCC
REM_DIODE1_P
(REMOTE - 1)
REM_DIODE1_N
SMBus
EC
Fan PWM
Fan SIG.
H_THERMTRIP#
EMC1422-1-ACZL-TR
THERM_STP#
FAN
connector
THERM_ALERT#
3/5V DC/DC
3/5V EN
D+
D-
GPU
VGA_THERMDP
VGA_THERMDN
SMBus
ADM1032ARMZ-1
ALERT#
For Discrete Only
MB_THERM#
Title
QUANTA
COMPUTER
Thermal Map
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
57
of
64
VER : 1A
Adapter
D
PWR_SRC
Charger
MAX8731AETI+
Battery
MAXIM
MAX17020ETJ+
TI
TPS51116PWPRG4
LDO
MAXIM
MAX8632ETI+ LDO
TI
TPS51117RGYR
Intersil
ISL6262A
IMVP_VR_ON
+5V_ALW2
5V_ALW_ON
SUS_ON
RUN_ON
+1.8V_SUS
+1.8V_SUS
+15V_ALW
+3.3V_ALW
+5V_SUS
+1.8V_SUS
+0.9V_DDR_VTT
+VCC_CORE
RT9018B
RUN_ON
+1.5V_RUN
RUN_ON
Fairchild
FDS8880
RUN_ON
+3.3V_RUN
Fairchild
FDC655BN
Fairchild
SI4800BDY
SUS_ON
+3.3V_SUS
RUN_ON
+5V_RUN
+VCC_GFX_CORE
Fairchild
FDS6298
RUN_ON
RUN_ON
+1.1V_GFX_PCIE
RUN_ON
+1.8V_RUN
+1.05V_VCCP
Title
QUANTA
COMPUTER
Schematic Block Diagram1
Size
Document Number
FM9
Date:
Rev
1A
Sheet
1
58
of
64
(1)
FM9 Power Design Block Diagram 2009/02/25

+5V_VCC1 (from +5V_ALW2)
(1)
(1)
+DC_IN_SS
+PWR_SRC
(1)
Power Jack
+DC_IN
SYSTEM POWER
Adapter input
SI4835
+5V_ALW2
LDO
+3.3V_ALW
+3.3V_ALW_ON(From
3VALW ON POWER LOGIC)
SI4835
(3)
ALW_ON(For +5V_ALW and

(3) +15V_ALW turn on)
Charger
+5V_ALW
TPS51427A
VR
(1)
(4)
(4)
(4)
+5V_ALW
+15V_ALW
Diode & Cap
(4)
Page 46
(3)
3.3V_ALW_ON, ALW_ON
(4)
+3.3V_ALW, +5V_ALW, +15V_ALW
(5)
SUS_ON
(6)
+5V_SUS, +3.3V_SUS, +1.5V_SUS, 1.5V_DDR_PWRGD
(7)
ICH_RSMRST#
(8)
SIO_PWRBTN#
(9)
SIO_SLP_S5#, SIO_SLP_S4#, SIO_SLP_S3#
(10) GFX_ON
Page 46
ISL88731
(2)
AC : DC_IN -> DC_IN_SS -> +PWR_SRC

Bat : +VCHGR -> +PWR_SRC,+5V_ALW2,
SYS_PWR_SW#
(11) +VCC_GFX_CORE, +1.1V_GFX_PCIE and PWRGD

(12) RUN_ON_1(RUN_ON)
Page 45
+5V_ALW
+VCHGR (1)
VRAM DDR3 POWER
(1)
+PWR_SRC
Battery
+1.5V_SUS
(5) SUS_ON
VR
1.5V_DDR_PWRGD
TPS51116
(12) RUN_ON
SI4835
Page 47
+0.75V_DDR_VTT
LDO
3V_ALW_PWRGD
(13) +0.75V_DDR_VTT
5V_ALW_PWRGD
(14) +5V_RUN, +3.3V_RUN, +3.3V_DELAY,

+1.8V_RUN_GFX, +1.5V_RUN, +1.1V_VTT,
+1.05V_PCH ad PWRGD
(6)
(16) IMVP_VR_ON
(6)
(17) +VCC_CORE, IMVP_PWRGD

(18) RESET_OUT#
(19) ICH_PWRGD
(13)
(20) PM_DRAM_PWRGD
(21) CLK_CPU_BCLK(PCH to CPU)
(22) H_PWRGOOD
+5V_ALW
(4)
+5V_ALW
+5V_SUS
SI4800
(23) PLTRST#(PCI_PLTRST#)
(6)
PCH CORE POWER
Page 52
(12) RUN_ON
(5) SUS_ON
+1.05V_PCH
VR
TPS51218
1.05V_PWRGD
(14)
Page 48
C
(4)
+3.3V_ALW
+3.3V_SUS
SI4800
(6)
+5V_SUS
Page 52
+5V_ALW (4)
GFX CORE POWER
(5) SUS_ON
+VCC_GFX_CORE
VR
GFX_CORE_PWRGD
(10) GFX_ON
(4) +5V_ALW
(10) GFX_ON
MAX8792ETD
+5V_RUN
SI4800
GFX PCIE POWER
(4)
+5V_ALW
RT9018B
VR
GFX_PCIE_PWRGD
Page 50
+5V_ALW (4)
(12) RUN_ON
GFX POWER
(4) +3.3V_ALW
FDS8880 +3.3V_RUN
(11)
Page 50
(14)
Page 52
+1.1V_GFX_PCIE
(11)
(12) RUN_ON
(14)
Page 52
RT9024PE
+1.8V_RUN_GFX
1.8V_RUN_GFX_PWRGD (14)
VR
Page 44
(12) RUN_ON
+5V_SUS
(14) +3.3V_RUN
+3.3V_DELAY
SI2303
+3.3V_SUS
CPU CORE POWER
(14)
Page 17
(16) IMVP_VR_ON
ISL6262A
+1.5V_SUS
FDS6298
(12) RUN_ON
(12) RUN_ON
IMVP_PWRGD
TPS51218
+1.1V_VTT
B
VR
1.1V_VTT_PWRGD
Page 49
(17)
Reset Circuit
Page 42
+5V_ALW (4)
(17) VR_PWRGD_CLKEN#
(14)
(12) RUN_ON
CLK GEN
RT9018B
(6) 1.5V_DDR_PWRGD
VR
+1.8V_RUN
(2)
3.3V_ALW_ON
ALW_ON
SUS_ON
(3)
(3)
(19)
(8)
ICH_RSMRST#
(7)
SIO_SLP_S5#
(9)
PCH
Page 7~12
(9)
IMVP_VR_ON
To control DIMM VREF
CLK_CPU_BCLK
(21)
H_PWRGOOD
(22)
(14)
1.05V_PWRGD
HWPG (15)
(11)
GFX_PCIE_PWRGD
(11)
GFX_CORE_PWRGD
(14)
(15)
H_VTTPWRGD
Wire AND
1.8V_RUN_PWRGD
(14) 1.8V_RUN_GFX_PWRGD
CPU
(17)
Page 3~6
(23)
1.1V_VTT_PWRGD
(18)
(19)
IMVP_PWRGD
RESET_OUT#
ICH_PWRGD
AND Gate
(15) H_VTTPWRGD
RUN_ON_1
(17) IMVP_PWRGD
(14)
PM_DRAM_PWRGD (20)
PLTRST#(PCI_PLTRST#)
Page 29
(15) HWPG
SIO_SLP_S4# (9)
ICH_PWRGD
(5)
SIO_PWRBTN#
SIO_SLP_S3#
(14)
1.8V_RUN_PWRGD
RUN_ON (12)
AND Gate
(12) RUN_ON_1
Page 44
Page 15
EC
IT8512
(17)
CK_PWRGD_R
Inverter
CPU VCCPLL
(17)
CK_PWRGD_R
SYS_PWR_SW#
(14)
VR_PWRGD_CLKEN#
Page 51
+1.5V_RUN
Page 52
CPU Memory Control

& I/O Power
+VCC_CORE
VR
TWO PHASE
SOLUTION
(10) GFX_ON
(6)
+5V_ALW (4)
RESET_OUT#
(12)
QUANTA
COMPUTER
(16)
Title
(18)
Size
Document Number
FM9
Date:
Power Block Diagram
Rev
1A
Sheet
1
59
of
64
CN8
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
3 XDP_PREQ#
3 XDP_PRDY#
3 XDP_OBS0
3 XDP_OBS1
3 XDP_OBS2
3 XDP_OBS3
3 XDP_OBS4
3 XDP_OBS5
3 XDP_OBS6
3 XDP_OBS7
+1.1V_VTT
R1028
3,10 H_PWRGOOD
T53
C1420
*0.1U_NC
R1030
3 H_PWRGD_XDP
T52
1K
PAD
PAD
H_CPUPWRGD_XDP
HOOK1
PCIE_CLK_XDP_P
TP_PCIE_CLK_XDP_N
9,32,41 ICH_SMBDATA
9,32,41 ICH_SMBCLK
3
XDP_TCLK
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATA_A0
OBSDATA_A1
GND4
OBSDATA_A2
OBSDATA_A3
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK/HOOK4
ITPCLK#/HOOK5
VCC_OBS_CD
RESET#/HOOK6
DBR#/HOOK7
GND15
TDO
TRSTN
TDI
TMS
GND17
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
+3.3V_RUN
R1027
+1.1V_VTT
BCLK_ITP_R
BCLK_ITP#_R
1K/F
XDP_RST#_R
R1031
1K
H_CPURST# 3
XDP_DBRESET# 3,7
XDP_TDO 3
XDP_TRST# 3
XDP_TDI 3
XDP_TMS 3
C1421
*0.1U_NC
51
R1032
BCLK_ITP_R
BCLK_ITP#_R
R1033
R1034
0
0
Samtec BSH-030-01
BCLK_ITP 3
BCLK_ITP# 3
QUANTA
COMPUTER
Title
SMBUS BLOCK
Size
Document Number
FM9
Date:

7
Rev
1A
Sheet
of
60
8
64

Dell Studio 1555 - Quanta FM9

Caricato da

Informazioni sul documento

Copyright

Formati disponibili

Condividi questo documento

Condividi o incorpora il documento

Opzioni di condivisione

Hai trovato utile questo documento?

Questo contenuto è inappropriato?

Copyright:

Formati disponibili

Dell Studio 1555 - Quanta FM9

Caricato da

Copyright:

Formati disponibili

1

FM9 XXXX Intel Discrete GFX

FAN & THERMAL

Dual Channel DDR3

PCI EXPRESS GFX

EXPRESS/Card Reader CONN.

Bluetooth BTB Conn

Schematic Block Diagram1

Thursday, February 26, 2009

Schematic Block Diagram

LCD CONN / HDMI CONN

SATA (HDD & CD_ROM)

System Reset Circuit

Run Power Switch

DCin & Batt

PAD & SCREW

Power Block Diagram

SLP_S5# CTRLD POWER

SLP_S5# CTRLD POWER

SLP_S3# CTRLD POWER

SLP_S3# CTRLD POWER

CPU/CALISTOGA/ICH8 POWER 1.05V_RUN_ON

CPU CORE POWER

Index & Power Status

Thursday, February 26, 2009

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)

AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

SC(V1.0),P11: Should be shorted at the pins

DG(V1.0),P79: should be tied to GND

Processor Compensation Signals

JTAG & BPM

PCI EXPRESS -- GRAPHICS

STUFF -> R780, R783, R786

STUFF -> R780, R781

STUFF -> R785, R786

DDR3 Compensation Signals

Layout Note: Place

Thursday, February 26, 2009

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY - B

Channel A DQ[15,32,48,54], DM[5]

Thursday, February 26, 2009

VCC_SENSE & VSS_SENSE:

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

PEG & DMI

1.1V RAIL POWER

CPU CORE SUPPLY

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

CPU Core Power

Thursday, February 26, 2009

AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)

Can be left NC is Intel CRM

The Clarkfield processor's PCI Express interface may

PCIE LANE is Lane Numbers Reversed

Disabled; No Physical Display Port

Lane Numbers Reversed

Thursday, February 26, 2009

IBEX PEAK-M (DMI,FDI,GPIO)

PCIE_W AKE# 28,31,32,41

System Power Management

Digital Display Interface

Thursday, February 26, 2009