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5 4 3 2 1

MS-9121 INTEL (R) PLACER CHIPSET


DUAL PRESTONIA PROCESSORS SCHEMATICS
D D

01 INDEX 32 PCIX SLOT 3


02 BLOCK DIAGRAM 33 SCSI RAID SLOT
03 CPU 1_SIGNAL 34 SCSI 1/5 53C1030_1
04 CPU 1_POWER 35 SCSI 2/5 53C1030_2
05 CPU 2_SIGNAL 36 SCSI 3/5 CHANNEL 1
06 CPU 2_POWER 37 SCSI 4/5 CHANNEL 2
07 VID COMPARE 38 SCSI 5/5 MISC.
08 CLOCK 39 SIO(PC87366)
09 MCH_HOST 40 SIO HARDWARE MONITOR
C
10 MCH_AGP&HLA&HLB 41 IDE C

11 MCH_DDR CHA&CHB 42 USB


12 MCH_POWER&GND 43 FWH
13 DDR CHA DIMMS 44 COM PORT
14 DDR CHB DIMMS 45 PRINTER PORT
15 DDR CHA&CHB PARALLEL TERM 46 KB&MS
16 DDR VREFS&DECOUPLING 47 HARDWARE MONITOR
17 AGP 8X CONNECTOR 48 SYSTEM FAN
18 AGP&GTL+&HUBLINK VREFS 49 POWER CONNECTOR
19 ICH4-1 50 FRONT PANNEL
20 ICH4-2 51 AD1885
21 ICH4-3 52 SPEAKER OUT MIC&LINE IN
B
22 ICH4 PULL UP 53 GIGA-LAN-1 B

23 P64H2-1 54 GIGA-LAN-2
24 P64H2-2 55 IBM_1
25 P64H2-3 56 IBM_2
26 P64H2 PULL UP RESISTORS 57 IBM_3
27 CPU VRM 58 Mechanical Part
28 PCI32 SLOT 59 ASR
29 MINI PCI 60 ACPI CIRCUIT
30 PCIX SLOT 1 61 SYSTEM VOLTAGE REGULATOR
31 PCIX SLOT 2 62 +2.5V VOLTAGE REGULATOR
63 Audio Amplifier
A A

Micro Star Restricted Secret


Title Rev
INDEX
Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


Friday, August 23, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 1 of 64
5 4 3 2 1
5 4 3 2 1

PRESTONIA PROCESSOR PRESTONIA PROCESSOR


VRD 9.1 CLOCK GEN
SOCKET 604 CPU1 SOCKET 604 CPU2
p3~4 p5~6 p28 p8

D D

Channel A

DDR DIMM 1

DDR DIMM 3
ZCR SLOT PCIX SLOT 3 LSI/53C1030
p34 p33 SCSI p35~39
CHIP P64H2 CHANNEL A
PLACER MCH
p24~27
CHANNEL B

DDR DIMM 2

DDR DIMM 4
Channel B p9~12

PCIX SLOT 2 PCIX SLOT 1 BROADCOM 5703 p13 p13


C
p32 p31 Gbit LAN C

p54~55

AGP 8X/4X
p18 p14 p14

IDE Primary
p42
ICH4

IDE Secondary
p20~23 p42

FLOPPY
USB 2.0 PORT p40
LPC SIO PCI 32 SLOT
p43 NS/PC87366 p29
p40
B B
PARALLEL PORT
p46
MINI PCI 32 SLOT
p30
FWH(8Mbit)*3
SERIAL PORT p44
COM1 p45

Onboard
SERIAL PORT
COM2 AC'97 Codec
p45 p52

A A

Micro Star Restricted Secret


Title Rev
BLOCK DIAGRAM
Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


Friday, August 23, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 2 of 64
5 4 3 2 1
5 4 3 2 1

5,20 SMB_ALERT_CPU_L VCC_CORE


5,7 SMBUS_CPU_DATA
5,7 SMBUS_CPU_CLK
+3_3V R149 R150 R145 R146 R152 R141 R133
FSB_DEP_L0
5,20 CPU_SM_WP
J1 51 51 51 51 51 51 51 FSB_DEP_L1

CPU0_FSTR0_AA28
CPU0_FSTR0_AB28
TP_CPU0_FSTR0_AB29
TP_CPU0_FSTR0_AA29
FSB_DEP_L2

CPU0_FSTR0_Y29
1
CPU THERMAL SENSOR SMBUS = 30 FSB_DEP_L3
CPU IDROM SMBUS = A8

VCCIOPLL_P0

CPU0_COMP1
CPU0_COMP0
ITP_TDO_P0 4,5 FSB_DEP_L[0..3] 5,9
ITP_TDI_P0 4

VCCA_P0
VSSA_P0
X_YJ102 R154 51-1%

AE17 FSB_DEP_L3
AC15 FSB_DEP_L2
AE19 FSB_DEP_L1
AC18 FSB_DEP_L0
VCC_CORE ITP_TCK_P 4,5

2
FSB_TRDY_L 5,9
ITP_TRST_L 4,5
8,47 SKTOCC_0_L ITP_TMS_P 4,5
D D

AD29

AC29
AC28
AD28

AD16
AE29
AE28

AA28
AB28
AB29
AA29
AD4

AD5
AA5

AB4

AA7

AE5
D26

C24
B27

Y29

E16

E25

E24

E19

A25
F24
W6
W7
W8
A3
B5

Y6
CPU1A
FSB_DBI_L[0..3] 5,9

COMP1
COMP0

TMS
5,9 FSB_HD_L[0..63]

SKTOCC#
ODTEN

SM_TS_A1
SM_TS_A0

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
VSSSENSE
VSSA

SM_EP_A2
SM_EP_A1
SM_EP_A0
SM_DAT
SM_CLK
VCCSENSE

TDO
TDI
VCCA

SM_VCC1
SM_VCC0

SM_ALERT

TCK

TRDY#
TRST#
VCCIOPLL

SM_WP

DP3#
DP2#
DP1#
DP0#
FSB_HD_L0 Y26
FSB_HD_L1 D0# FSB_DBI_L3
AA27 D1# DBI3# AB9
FSB_HD_L2 Y24 AE12 FSB_DBI_L2
FSB_HD_L3 D2# DBI2# FSB_DBI_L1
AA25 D3# DBI1# AD22
FSB_HD_L4 AD27 AC27 FSB_DBI_L0
D4# DBI0# GTL_VREF2_P0 18
FSB_HD_L5 Y23 D5# VID_P0_[0..4] 7,27,47
FSB_HD_L6 AA24
FSB_HD_L7 D6# VID_P0_0 C176 C42
AB26 D7# VID0 F3
FSB_HD_L8 AB25 E3 VID_P0_1
FSB_HD_L9 D8# VID1 VID_P0_2 220p 220p
AB23 D9# VID2 D3
FSB_HD_L10 AA22 C3 VID_P0_3
FSB_HD_L11 D10# VID3 VID_P0_4
AA21 D11# VID4 B3
FSB_HD_L12 AB20
FSB_HD_L13 D12#
AB22 D13# GTLREF3 F9
FSB_HD_L14 AB19 F23
D14# GTLREF2 GTL_VREF1_P0 18
CPU0_COMP1
CPU0_COMP0

FSB_HD_L15 AA19 W9
FSB_HD_L16 D15# GTLREF1
AE26 D16# GTLREF0 W23 FSB_HDSTBP_L[0..3] 5,9
FSB_HD_L17 AC26
FSB_HD_L18 D17# FSB_HDSTBP_L3 C225 C45
AD25 D18# DSTBP3# Y11
FSB_HD_L19 AE25 Y14 FSB_HDSTBP_L2
FSB_HD_L20 D19# DSTBP2# FSB_HDSTBP_L1 220p 220p
AC24 D20# DSTBP1# Y17
FSB_HD_L21 AD24 Y20 FSB_HDSTBP_L0
R91 R38 FSB_HD_L22 D21# DSTBP0# FSB_HDSTBN_L3
AE23 D22# DSTBN3# Y12
FSB_HD_L23 AC23 Y15 FSB_HDSTBN_L2
49.9-1% 49.9-1% FSB_HD_L24 D23# DSTBN2# FSB_HDSTBN_L1
AA18 D24# DSTBN1# Y18
C FSB_HD_L25 AC20 Y21 FSB_HDSTBN_L0 C
FSB_HD_L26 D25# DSTBN0#
AC21 D26#
FSB_HD_L27 AE22 F6
D27# BPM0# CPU_BPM_L_0 4,5 FSB_HDSTBN_L[0..3] 5,9
FSB_HD_L28 AE20 F8
D28# BPM1# CPU_BPM_L_1 4,5
FSB_HD_L29 AD21 E7
D29# BPM2# CPU_BPM_L_2 4,5
FSB_HD_L30 AD19 F5
D30# BPM3# CPU_BPM_L_3 4,5
FSB_HD_L31 AB17 E8
D31# BPM4# CPU_BPM_L_4 4,5
FSB_HD_L32 AB16 E4
D32# BPM5# CPU_BPM_L_5 4,5
FSB_HD_L33 AA16
FSB_HD_L34 D33#

Prestonia 604
AC17 D34# SLP# AE6 CPU_CPUSLP_L 4,5,19
FSB_HD_L35 AE13 D4
D35# STPCLK# CPU_STPCLK_L 4,5,19
+3_3V FSB_HD_L36 AD18 C27
D36# SMI# CPU_SMI_L 4,5,19
FSB_HD_L37 AB15 F26
D37# THERMTRIP# CPU_THERMTRIP_L 4,5,21
FSB_HD_L38 AD13 AB7
D38# PWRGD CPU_PWR_GD 4,5,20
FSB_HD_L39 AD14 B25 S_TP1
FSB_HD_L40 D39# PROCHOT#
AD11 D40# INIT# D6 CPU_INIT_L 4,5,19,43
FSB_HD_L41 AC12 G23 C133
D41# LINIT1 CPU_LINIT1_NMI 4,5,19
R25 FSB_HD_L42 AE10 B24 PLACE CLOSE
D42# LINIT0 CPU_LINIT0_INTR 4,5,19
FSB_HD_L43 AC11 E27 X_82p
1K FSB_HD_L44 AE9
D43# FERR#
C26
CPU_FERR_L 4,5,19 CPU1.AB7
D44# IGNNE# CPU_IGNNE_L 4,5,19
FSB_HD_L45 AD10 F27
D45# A20M# CPU_A20M_L 4,5,19
FSB_HD_L46 AD8
CPU0_FSTR0_AB28 FSB_HD_L47 D46#
AC9 D47# RESET# Y8 FSB_CPURST_L 4,5,9 FSB_REQ_L[0..4] 5,9
CPU0_FSTR0_Y29 FSB_HD_L48 AA13
CPU0_FSTR0_AA28 FSB_HD_L49 D48# FSB_REQ_L0
AA14 D49# REQ0# B19
FSB_HD_L50 AC14 B21 FSB_REQ_L1
FSB_HD_L51 D50# REQ1# FSB_REQ_L2
AB12 D51# REQ2# C21
FSB_HD_L52 AB13 C20 FSB_REQ_L3
FSB_HD_L53 D52# REQ3# FSB_REQ_L4
AA11 D53# REQ4# B22
FSB_HD_L54 AA10
FSB_HD_L55 D54#
AB10 D55# LOCK# A17 FSB_LOCK_L 5,9
R30 R29 FSB_HD_L56 AC8 D7
B D56# MCERR# FSB_MCERR_L 4,5,9 B
FSB_HD_L57 AD7
1K 1K FSB_HD_L58 D57#
AE7 D58# RSP# C6 FSB_RSP_L 5,9
FSB_HD_L59 AC6 F21
D59# RS2# FSB_RS2_L 5,9
FSB_HD_L60 AC5 D22
D60# RS1# FSB_RS1_L 5,9
FSB_HD_L61 AA8 E21
D61# RS0# FSB_RS0_L 5,9
FSB_HD_L62 Y9
FSB_HD_L63 D62#
AB6 D63# IERR# E5 TP_CPU0_IERR_L CPU0_IERR_L 56
DEFER# C23 FSB_DEFER_L 5,9
HITM# A23 FSB_HITM_L 4,5,9
5,9 FSB_AP0_L E10 AP0# HIT# E22 FSB_HIT_L 4,5,9
5,9 FSB_AP1_L D9 AP1# ADS# D19 FSB_ADS_L 5,9
ADSTB0# F17 FSB_ADSTB_L0
8 P0_BCLK0 Y4 BCLK0 ADSTB1# F14 FSB_ADSTB_L1
8 P0_BCLK1 W5 BCLK1
AA3 VCCA_P0
8 CPU0_BSEL0 BSEL0 FSB_ADSTB_L[0..1] 5,9
CPU0_BSEL1 AB3

AE30KEY604
E18 DRDY#
F18 DBSY#

BSEL1
F11 BINIT#
BPRI#
BNR#
BR0#
BR1#
BR2#
BR3#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
A3#
A4#
A5#
A6#
A7#
A8#
A9#

R167 1 L14 4.7uH-1206


SOCKET_604 C261
C18

C17
D17

C15
C14
D16
D15

C12

D13

D12
C11

D20

D10

D23
A22
A20
B18

A19

A13
B16
B14
B13
A12

A10
B10
B11

E14

E13

E11
F15

F12

F20

1 2
C9
C8
A9
B8

B7
A6
A7

22u-10V
VSSA_P0
FSB_HA_L27
FSB_HA_L28

FSB_HA_L32
FSB_HA_L10
FSB_HA_L11
FSB_HA_L12
FSB_HA_L13
FSB_HA_L14
FSB_HA_L15
FSB_HA_L16
FSB_HA_L17
FSB_HA_L18
FSB_HA_L19
FSB_HA_L20
FSB_HA_L21
FSB_HA_L22
FSB_HA_L23
FSB_HA_L24
FSB_HA_L25
FSB_HA_L26

FSB_HA_L29
FSB_HA_L30
FSB_HA_L31

FSB_HA_L33
FSB_HA_L34
FSB_HA_L35
FSB_HA_L3
FSB_HA_L4
FSB_HA_L5
FSB_HA_L6
FSB_HA_L7
FSB_HA_L8
FSB_HA_L9

VCC_CORE
R137 1 L13 4.7uH-1206
1 2
TP_CPU1_AE30
C251
22u-10V
5,9 FSB_HA_L[3..35]
VCCIOPLL_P0
5,9 CPU0_BR0_L
A 5 CPU1_BR0_L FSB_DRDY_L 5,9 A
FSB_DBSY_L 5,9
+3_3V
R144 R143
R39 R24
CPU0_BSEL1
Micro Star Restricted Secret
49.9-1% 49.9-1% 49.9-1% 49.9-1% Title Rev
R151 1K CPU 1_SIGNAL
Document Number 00E
8 CPU0_BSEL0
VCC_CORE
R178 1K MICRO-STAR INT'L CO.,LTD. Last Revision Date:
4,5,9 FSB_BNR_L
Monday, September 09, 2002
5,9 FSB_BPRI_L
No. 69, Li-De St, Jung-He City,
4,5,9 FSB_BINIT_L
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 3 of 64
5 4 3 2 1
5 4 3 2 1

TP_CPU0_A1
VCC_CORE
NOCONA_A4_P0

GN33
GN34
GN35
GN36
GN37
GN38
GN39
GN40
GN41
C1009 R80 220
CPU_A20M_L 3,5,19

GN21
GN22
GN23
GN24
GN25
GN26
GN27
GN28
GN29
GN30
GN31
GN32
CPU1B C270
CPU1C 0.1u

A1
A4
VCC_CORE
A2 A5 C230

EMI_GND1
EMI_GND2
EMI_GND3
EMI_GND4
EMI_GND5
EMI_GND6
EMI_GND7
EMI_GND8
EMI_GND9
VCC VSS 560u-4V C57 R882 X_40.2-1%
A8 A11 J7 A30 FSB_BINIT_L 3,5,9

MTG_GND21
MTG_GND22
MTG_GND23
MTG_GND24
MTG_GND25

MTG_GND27
MTG_GND28
MTG_GND29
MTG_GND30
MTG_GND31
MTG_GND32
MTH_GND26

RSVD0
RSVD1
VCC VSS VSS GAL_VDD1 1u-0805 C523 C1034 X_47p
A14 VCC VSS A21 J9 VSS GAL_VDD2 B4
A18 A27 J23 B31 C219 0.1u R881 X_40.2-1%
VCC VSS VSS GAL_VDD3 FSB_BNR_L 3,5,9
A24 A29 J25 C30 C1020 X_47p
VCC VSS VSS GAL_VDD4 1u-0805 560u-4V C151 R879 X_40.2-1%
A28 VCC VSS B2 J27 VSS GAL_VDD5 D1 FSB_HITM_L 3,5,9
B6 B9 J29 D31 C246 C272 C1004 X_47p
VCC VSS VSS GAL_VDD6 0.1u R880 X_40.2-1%
B12 VCC VSS B15 K2 VSS GAL_VDD7 E30 FSB_HIT_L 3,5,9
B20 B17 K4 F1 1u-0805 C1010 X_47p
D VCC VSS VSS GAL_VDD8 C164 560u-4V C957 R883 X_40.2-1% D
B26 VCC VSS B23 K6 VSS GAL_VDD9 F31 FSB_MCERR_L 3,5,9
B29 B28 K8 G30 C271 C1046 X_47p
VCC VSS VSS GAL_VDD10 22u-1210 0.1u R116 40.2-1%
C2 VCC VSS C7 K24 VSS GAL_VDD11 H1 CPU_BPM_L_0 3,5
C4 C13 K26 H31 C138 R107 40.2-1%
VCC VSS VSS GAL_VDD12 CPU_BPM_L_1 3,5
C10 C19 K28 J30 560u-4V C955 R110 40.2-1%
VCC VSS VSS GAL_VDD13 CPU_BPM_L_2 3,5
C16 C25 L3 K1 22u-1210 C6 R153 40.2-1%
VCC VSS VSS GAL_VDD14 CPU_BPM_L_3 3,5
C22 C29 L5 K31 C232 0.1u R106 40.2-1%
VCC VSS VSS GAL_VDD15 CPU_BPM_L_4 3,5
C28 D2 L7 L30 R136 40.2-1%
VCC VSS VSS GAL_VDD16 CPU_BPM_L_5 3,5
D8 D5 L9 M1 1u-0805 560u-4V C956
VCC VSS VSS GAL_VDD17 C43 C275 R82 220
D14 VCC VSS D11 L23 VSS GAL_VDD18 M31 CPU_IGNNE_L 3,5,19
D18 D21 L25 N1 0.1u
VCC VSS VSS GAL_VDD19 1u-0805 R113 220
D24 VCC VSS D27 L27 VSS GAL_VDD20 N31 CPU_INIT_L 3,5,19,43
D29 D28 L29 P30 C48 560u-4V C966
VCC VSS VSS GAL_VDD21 R86 220
E2 VCC VSS E9 M2 VSS GAL_VDD22 R1 CPU_LINIT1_NMI 3,5,19
E6 E15 M4 R31 1u-0805 C7 0.1u
VCC VSS VSS GAL_VDD23 C177 R99 220
E12 VCC VSS E17 M6 VSS GAL_VDD24 T30 CPU_LINIT0_INTR 3,5,19
E20 E23 M8 U1 C968
VCC VSS VSS GAL_VDD25 1u-0805 560u-4V
E26 VCC VSS E29 M24 VSS GAL_VDD26 U31
E28 F2 M26 V30 C49 C267 0.1u
VCC VSS VSS GAL_VDD27 R105 51
F4 VCC VSS F7 M28 VSS GAL_VDD28 W1 FSB_CPURST_L 3,5,9
F10 F13 N2 W31 1u-0805 C56
VCC VSS VSS GAL_VDD29 C114 560u-4V R104 220
F16 VCC VSS F19 N4 VSS GAL_VDD30 Y30 CPU_CPUSLP_L 3,5,19
F22 F25 N6 AA1 C522 0.1u
VCC VSS VSS GAL_VDD31 R135 220
F29 VCC VSS F28 N8 VSS GAL_VDD32 AA31 CPU_STPCLK_L 3,5,19
G2 G3 N24 AB30 X_0.1u C187
VCC VSS VSS GAL_VDD33 C121 560u-4V R81 220
G4 VCC VSS G5 N26 VSS GAL_VDD34 AC31 CPU_SMI_L 3,5,19
G6 G7 NOCONA_G7_P0 N28 AD30 C12 0.1u
VCC VSS VSS GAL_VDD35 R27 75-1%
G8 VCC VSS G9 P3 VSS ITP_TDO_P0 3,5
G24 G25 P5 A31 X_0.1u C218
VCC VSS VSS GAL_VSS1 C186 560u-4V R96 150-1%
C G26 VCC VSS G27 P7 VSS GAL_VSS2 B30 ITP_TDI_P0 3 C
G28 G29 P9 C1 NOCONA_C1_P0 C241 0.1u
VCC VSS VSS GAL_VSS3
Prestonia_PWR

H3 VCC VSS H2 P23 VSS GAL_VSS4 C31


H5 H4 P25 D30 0.1u 22u-1206 C247
VCC VSS VSS GAL_VSS5 C55 C238 R229 40.2-1%
H7 VCC VSS H6 P27 VSS GAL_VSS6 E1 ITP_TMS_P 3,5
H9 H8 P29 0.1u

Prestonia_PWR
VCC VSS VSS GAL_VSS7 E31
H23 H24 R2 F30 22u-1206
VCC VSS VSS GAL_VSS8 0.1u C235 C165
H25 VCC VSS H26 R4 VSS GAL_VSS9 G1
H27 H28 R6 G31 C239 R230 75-1%
VCC VSS VSS GAL_VSS10 ITP_TDO_P1 5
H29 J3 R8 H30 22u-1206 0.1u
VCC VSS VSS GAL_VSS11 C215 R95 100
J2 VCC VSS J5 R24 VSS GAL_VSS12 J1 CPU_THERMTRIP_L 3,5,21
J4 W29 R26 J31 0.1u C973
VCC VCC VSS GAL_VSS13 C240 22u-1206 R72 100
J6 VCC VCC Y2 R28 VSS GAL_VSS14 K30 CPU_FERR_L 3,5,19
J8 Y10 T3 L1 C167 0.1u
VCC VCC VSS GAL_VSS15 R93 100
J24 VCC VCC Y16 T5 VSS GAL_VSS16 L31 CPU_PROCHOT_L
J26 Y22 T7 M30 0.1u 22u-1206 C962
VCC VCC VSS GAL_VSS17 C231 C242 R87 301-1%
J28 VCC VCC AA4 T9 VSS GAL_VSS18 N30 CPU_PWR_GD 3,5,20
K3 AA6 T23 P1 0.1u
VCC VCC VSS GAL_VSS19 22u-1206
K5 VCC VCC AA12 T25 VSS GAL_VSS20 P31
K7 AA20 T27 R30 0.1u C243 C975
VCC VCC VSS GAL_VSS21 C139 R88 27.4-1%
K9 VCC VCC AA26 T29 VSS GAL_VSS22 T1 ITP_TCK_P 3,5
K23 AB2 U2 T31 22u-1206 0.1u R28 681-1%
VCC VCC VSS GAL_VSS23 ITP_TRST_L 3,5
K25 AB8 U4 U30 C244
VCC VCC VSS GAL_VSS24 0.1u C965
K27 VCC VCC AB14 U6 VSS GAL_VSS25 V1
K29 AB18 U8 V31 C961 22u-1206
VCC VCC VSS GAL_VSS26 C178 0.1u
L2 VCC VCC AB24 U24 VSS GAL_VSS27 W30
L4 VCC VCC AC3 U26 VSS GAL_VSS28 Y1
L6 AC4 U28 Y31 0.1u 22u-1206 C974
VCC VCC VSS GAL_VSS29 C964 C33
L8 VCC VCC AC10 V3 VSS GAL_VSS30 AA30
L24 AC16 V5 AB1 0.1u INTEL recommand:22u*20+1u*8
B VCC VCC VSS GAL_VSS31 22u-1206 INTEL OS-CON *9~10 B
L26 VCC VCC AC22 V7 VSS GAL_VSS32 AB31
L28 AD2 V9 AC30 NOCONA_AC30_P0 0.1u C39 C971
VCC VCC VSS GAL_VSS33 C967 0.1u
M3 VCC VCC AD6 V23 VSS GAL_VSS34 AD31
M5 AD12 V25 22u-1206
VCC VCC VSS TP_CPU0_A15 C38 NOCONA_C5_P0 NOCONA_A4_P0
M7 VCC VCC AD20 V27 VSS RSVD2 A15
M9 AD26 V29 A16 TP_CPU0_A16 0.1u C976
VCC VCC VSS RSVD3 TP_CPU0_A26 C972 22u-1206 0.1u
M23 VCC VCC AE3 W2 VSS RSVD4 A26
M25 AE8 W4 B1 TP_CPU0_B1 C67
VCC VCC VSS RSVD5 NOCONA_C5_P0
M27 VCC VCC AE14 W24 VSS RSVD6 C5
M29 AE18 W26 D25 TP_CPU0_D25 0.1u 22u-1206
VCC VCC VSS RSVD7 TP_CPU0_W3 C969 C160 NOCONA_C1_P0 R914
N3 VCC VCC AE24 W28 VSS RSVD8 W3
N5 R29 Y5 Y3 TP_CPU0_Y3 TESTLOW 49.9-1%
VCC VCC VSS RSVD11 CPU1_DIODE_P 22u-1206
N7 VCC VCC T2 Y7 VSS RSVD12 Y27
N9 T4 Y13 Y28 CPU1_DIODE_N 0.1u C481 R919
VCC VCC VSS RSVD13 VCC_CORE
N23 T6 Y19 C140 X_49.9-1%
VCC VCC VSS 22u-1206
N25 VCC VCC T8 Y25 VSS
N27 VCC VCC T24 AA2 VSS RSVD9 AC1 TP_CPU0_AC1 C150 NOCONA_AC30_P0 R917
N29 VCC VCC T26 AA9 VSS RSVD10 AD1 TP_CPU0_AD1 0.1u SLEW_CTRL 0
P2 VCC VCC T28 AA15 VSS RSVD14 AE4 TP_CPU0_AE4 C162 22u-1206
P4 VCC VCC U3 AA17 VSS RSVD15 AE15 TP_CPU0_AE15 C40
P6 VCC VCC U5 AA23 VSS RSVD16 AE16 TP_CPU0_AE16
P8 U7 AB5 AE27 0.1u 22u-1206
VCC VCC VSS VSS C44 C51
P24 VCC VCC U9 AB11 VSS VSS AE21
P26 VCC VCC U23 AB21 VSS VSS AE11
P28 U25 AB27 AE2 22u-1206
VCC VCC VSS VSS 0.1u C34
R3 VCC VCC U27 AC2 VSS VSS AD23
GN10MTG_GND10
GN11MTG_GND11
GN12MTG_GND12
GN13MTG_GND13
GN14MTG_GND14
GN15MTG_GND15
GN16MTG_GND16
GN17MTG_GND17
GN18MTG_GND18
GN19MTG_GND19
GN20MTG_GND20

R5 U29 AC7 AD17 C970


GN1 MTG_GND1
GN2 MTG_GND2
GN3 MTG_GND3
GN4 MTG_GND4
GN5 MTG_GND5
GN6 MTG_GND6
GN7 MTG_GND7
GN8 MTG_GND8
GN9 MTG_GND9

VCC VCC VSS VSS 22u-1206


R7 VCC VCC V2 AC13 VSS VSS AD15
R9 V4 AC19 AD9 C111
VCC VCC VSS VSS 0.1u
A R23 V6 AC25 AD3 A
GN42EMI_GND10
GN43EMI_GND11
GN44EMI_GND12
GN45EMI_GND13
GN46EMI_GND14
GN47EMI_GND15
GN48EMI_GND16

VCC VCC VSS VSS C152 22u-1206


R25 VCC VCC V8
R27 VCC VCC V24
W27 VCC VCC V26
SOCKET_604 0.1u X X_150u_SP
W25 VCC VCC V28
C161 C1130
Micro Star Restricted Secret
SOCKET_604 Title Rev
CPU 1_POWER
CPU1_DIODE_P 0.1u X X_150u_SP C71-221061E-S03 Document Number 00E
CPU1_DIODE_P 39
C236 C1131
CPU1_DIODE_N MICRO-STAR INT'L CO.,LTD. Last Revision Date:
CPU1_DIODE_N 39
Monday, September 16, 2002
FOR PRESTONIA 604 ONLY 0.1u No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 4 of 64
5 4 3 2 1
5 4 3 2 1

3,20 SMB_ALERT_CPU_L VCC_CORE


3,7 SMBUS_CPU_DATA
3,7 SMBUS_CPU_CLK
+3_3V R327 R328 R312 R310 R311 R260 R259 FSB_DEP_L0
FSB_DEP_L1

TP_CPU1_FSTR1_Y29
3,20 CPU_SM_WP
J6 51 51 51 51 51 51 FSB_DEP_L2

CPU1_FSTR1_AA28
CPU1_FSTR1_AB28
CPU1_FSTR1_AB29
CPU1_FSTR1_AA29
51 FSB_DEP_L3

1
CPU THERMAL SENSOR SMBUS = 32
CPU IDROM SMBUS = AA FSB_DEP_L[0..3] 3,9

CPU1_COMP1
CPU1_COMP0
VCCIOPLL_P1
ITP_TDO_P1 4
ITP_TDO_P0 3,4

VCCA_P1
VSSA_P1
X_YJ102 R329 51-1%

AE17 FSB_DEP_L3
AC15 FSB_DEP_L2
AE19 FSB_DEP_L1
AC18 FSB_DEP_L0
ITP_TCK_P 3,4

2
FSB_TRDY_L 3,9
ITP_TRST_L 3,4
7 SKTOCC_1_L ITP_TMS_P 3,4
D D
CPU2A

AD29

AC29
AC28
AD28

AD16
AE29
AE28

AA28
AB28
AB29
AA29
AD4

AD5
AA5

AB4

AA7

AE5
D26

C24
B27

Y29

E16

E25

E24

E19

A25
F24
W6
W7
W8
A3
B5

Y6
FSB_DBI_L[0..3] 3,9

COMP1
COMP0

TMS
3,9 FSB_HD_L[0..63]

SKTOCC#
ODTEN

SM_TS_A1
SM_TS_A0

SM_CLK
VSSSENSE
VSSA

SM_EP_A2
SM_EP_A1
SM_EP_A0
SM_DAT

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
VCCSENSE

TDO
TDI
VCCA

SM_VCC1
SM_VCC0

SM_ALERT

TCK

TRDY#
TRST#
VCCIOPLL

SM_WP

DP3#
DP2#
DP1#
DP0#
FSB_HD_L0 Y26
FSB_HD_L1 D0# FSB_DBI_L3
AA27 D1# DBI3# AB9
FSB_HD_L2 Y24 AE12 FSB_DBI_L2
FSB_HD_L3 D2# DBI2# FSB_DBI_L1
AA25 D3# DBI1# AD22
FSB_HD_L4 AD27 AC27 FSB_DBI_L0
D4# DBI0# GTL_VREF2_P1 18
FSB_HD_L5 Y23 D5# VID_P1_[0..4] 7
FSB_HD_L6 AA24
FSB_HD_L7 D6# VID_P1_0 C493 C300
AB26 D7# VID0 F3
FSB_HD_L8 AB25 E3 VID_P1_1
FSB_HD_L9 D8# VID1 VID_P1_2 220p 220p
AB23 D9# VID2 D3
FSB_HD_L10 AA22 C3 VID_P1_3
FSB_HD_L11 D10# VID3 VID_P1_4
AA21 D11# VID4 B3
FSB_HD_L12 AB20
FSB_HD_L13 D12#
AB22 D13# GTLREF3 F9
FSB_HD_L14 AB19 F23
D14# GTLREF2 GTL_VREF1_P1 18
CPU1_COMP0

CPU1_COMP1

FSB_HD_L15 AA19 W9
FSB_HD_L16 D15# GTLREF1
AE26 D16# GTLREF0 W23 FSB_HDSTBP_L[0..3] 3,9
FSB_HD_L17 AC26
FSB_HD_L18 D17# FSB_HDSTBP_L3 C320 C495
AD25 D18# DSTBP3# Y11
FSB_HD_L19 AE25 Y14 FSB_HDSTBP_L2
FSB_HD_L20 D19# DSTBP2# FSB_HDSTBP_L1 220p 220p
AC24 D20# DSTBP1# Y17
FSB_HD_L21 AD24 Y20 FSB_HDSTBP_L0
R200 R197 FSB_HD_L22 D21# DSTBP0# FSB_HDSTBN_L3
AE23 D22# DSTBN3# Y12
FSB_HD_L23 AC23 Y15 FSB_HDSTBN_L2
49.9-1% 49.9-1% FSB_HD_L24 D23# DSTBN2# FSB_HDSTBN_L1
AA18 D24# DSTBN1# Y18
C FSB_HD_L25 AC20 Y21 FSB_HDSTBN_L0 C
FSB_HD_L26 D25# DSTBN0#
AC21 D26#
FSB_HD_L27 AE22 F6
D27# BPM0# CPU_BPM_L_0 3,4 FSB_HDSTBN_L[0..3] 3,9
FSB_HD_L28 AE20 F8
D28# BPM1# CPU_BPM_L_1 3,4
FSB_HD_L29 AD21 E7
D29# BPM2# CPU_BPM_L_2 3,4
FSB_HD_L30 AD19 F5
D30# BPM3# CPU_BPM_L_3 3,4
FSB_HD_L31 AB17 E8
D31# BPM4# CPU_BPM_L_4 3,4
FSB_HD_L32 AB16 E4
D32# BPM5# CPU_BPM_L_5 3,4
+3_3V FSB_HD_L33 AA16
FSB_HD_L34 D33#

Prestonia 604
AC17 D34# SLP# AE6 CPU_CPUSLP_L 3,4,19
FSB_HD_L35 AE13 D4
D35# STPCLK# CPU_STPCLK_L 3,4,19
+3_3V FSB_HD_L36 AD18 C27
D36# SMI# CPU_SMI_L 3,4,19
FSB_HD_L37 AB15 F26
D37# THERMTRIP# CPU_THERMTRIP_L 3,4,21
FSB_HD_L38 AD13 AB7
D38# PWRGD CPU_PWR_GD 3,4,20
R195 FSB_HD_L39 AD14 B25 S_TP3
FSB_HD_L40 D39# PROCHOT#
AD11 D40# INIT# D6 CPU_INIT_L 3,4,19,43
1K FSB_HD_L41 AC12 G23 C475
D41# LINIT1 CPU_LINIT1_NMI 3,4,19
R196 FSB_HD_L42 AE10 B24 PLACE CLOSE
D42# LINIT0 CPU_LINIT0_INTR 3,4,19
FSB_HD_L43 AC11 E27 X_82p
1K CPU1_FSTR1_AA29 FSB_HD_L44 AE9
D43# FERR#
C26
CPU_FERR_L 3,4,19 CPU2.AB7
D44# IGNNE# CPU_IGNNE_L 3,4,19
FSB_HD_L45 AD10 F27
D45# A20M# CPU_A20M_L 3,4,19
FSB_HD_L46 AD8
CPU1_FSTR1_AB28 FSB_HD_L47 D46#
AC9 D47# RESET# Y8 FSB_CPURST_L 3,4,9 FSB_REQ_L[0..4] 3,9
FSB_HD_L48 AA13
CPU1_FSTR1_AA28 FSB_HD_L49 D48# FSB_REQ_L0
AA14 D49# REQ0# B19
FSB_HD_L50 AC14 B21 FSB_REQ_L1
FSB_HD_L51 D50# REQ1# FSB_REQ_L2
AB12 D51# REQ2# C21
CPU1_FSTR1_AB29 FSB_HD_L52 AB13 C20 FSB_REQ_L3
FSB_HD_L53 D52# REQ3# FSB_REQ_L4
AA11 D53# REQ4# B22
FSB_HD_L54 AA10
FSB_HD_L55 D54#
AB10 D55# LOCK# A17 FSB_LOCK_L 3,9
R202 FSB_HD_L56 AC8 D7
B D56# MCERR# FSB_MCERR_L 3,4,9 B
FSB_HD_L57 AD7
1K FSB_HD_L58 D57#
AE7 D58# RSP# C6 FSB_RSP_L 3,9
R201 NOPOP FSB_HD_L59 AC6 F21
D59# RS2# FSB_RS2_L 3,9
FSB_HD_L60 AC5 D22
D60# RS1# FSB_RS1_L 3,9
X_1K FSB_HD_L61 AA8 E21
D61# RS0# FSB_RS0_L 3,9
FSB_HD_L62 Y9
FSB_HD_L63 D62#
AB6 D63# IERR# E5 TP_CPU1_IERR_L CPU1_IERR_L 56
DEFER# C23 FSB_DEFER_L 3,9
HITM# A23 FSB_HITM_L 3,4,9
3,9 FSB_AP0_L E10 AP0# HIT# E22 FSB_HIT_L 3,4,9
3,9 FSB_AP1_L D9 AP1# ADS# D19 FSB_ADS_L 3,9
ADSTB0# F17 FSB_ADSTB_L0
8 P1_BCLK0 Y4 BCLK0 ADSTB1# F14 FSB_ADSTB_L1
8 P1_BCLK1 W5 BCLK1
CPU1_BSEL0 AA3 VCCA_P1
BSEL0 FSB_ADSTB_L[0..1] 3,9
CPU1_BSEL1 AB3

AE30KEY604
E18 DRDY#
F18 DBSY#

BSEL1
F11 BINIT#
BPRI#
BNR#
BR0#
BR1#
BR2#
BR3#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
A3#
A4#
A5#
A6#
A7#
A8#
A9#

R319 1 L24 4.7uH-1206


C491
C18

C17
D17

C15
C14
D16
D15

C12

D13

D12
C11

D20

D10

D23
A22
A20
B18

A19

A13
B16
B14
B13
A12

A10
B10
B11

E14

E13

E11
F15

F12

F20

1 2
C9
C8
A9
B8

B7
A6
A7

SOCKET_604 22u-10V
VSSA_P1
FSB_HA_L27
FSB_HA_L28

FSB_HA_L32
FSB_HA_L10
FSB_HA_L11
FSB_HA_L12
FSB_HA_L13
FSB_HA_L14
FSB_HA_L15
FSB_HA_L16
FSB_HA_L17
FSB_HA_L18
FSB_HA_L19
FSB_HA_L20
FSB_HA_L21
FSB_HA_L22
FSB_HA_L23
FSB_HA_L24
FSB_HA_L25
FSB_HA_L26

FSB_HA_L29
FSB_HA_L30
FSB_HA_L31

FSB_HA_L33
FSB_HA_L34
FSB_HA_L35
FSB_HA_L3
FSB_HA_L4
FSB_HA_L5
FSB_HA_L6
FSB_HA_L7
FSB_HA_L8
FSB_HA_L9

VCC_CORE
R318 1 L23 4.7uH-1206
1 2
TP_CPU2_AE30
C490
22u-10V
3,9 FSB_HA_L[3..35]
VCCIOPLL_P1
3 CPU1_BR0_L
A 3,9 CPU0_BR0_L FSB_DRDY_L 3,9 A
FSB_DBSY_L 3,9
+3_3V
R324 R331
R198
CPU1_BSEL0
Micro Star Restricted Secret
49.9-1% 49.9-1% 49.9-1% Title Rev
R313 1K CPU 2_SIGNAL
CPU1_BSEL1 Document Number 00E
VCC_CORE
R314 1K MICRO-STAR INT'L CO.,LTD. Last Revision Date:
3,4,9 FSB_BNR_L
Monday, September 09, 2002
3,9 FSB_BPRI_L
No. 69, Li-De St, Jung-He City,
3,4,9 FSB_BINIT_L
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 5 of 64
5 4 3 2 1
5 4 3 2 1

TP_CPU1_A1
NOCONA_A4_P1 C321
VCC_CORE

GN33
GN34
GN35
GN36
GN37
GN38
GN39
GN40
GN41

GN21
GN22
GN23
GN24
GN25
GN26
GN27
GN28
GN29
GN30
GN31
GN32
CPU2B C269
CPU2C 0.1u

A1
A4
VCC_CORE
A2 A5 C358 C229

EMI_GND1
EMI_GND2
EMI_GND3
EMI_GND4
EMI_GND5
EMI_GND6
EMI_GND7
EMI_GND8
EMI_GND9
VCC VSS 560u-4V
A8 A11 J7 A30

MTG_GND21
MTG_GND22
MTG_GND23
MTG_GND24
MTG_GND25
MTH_GND26
MTG_GND27
MTG_GND28
MTG_GND29
MTG_GND30
MTG_GND31
MTG_GND32

RSVD0
RSVD1
VCC VSS VSS GAL_VDD1 1u-0805
A14 VCC VSS A21 J9 VSS GAL_VDD2 B4
A18 A27 J23 B31 C324 0.1u
VCC VSS VSS GAL_VDD3 C353
A24 VCC VSS A29 J25 VSS GAL_VDD4 C30
A28 B2 J27 D1 1u-0805
VCC VSS VSS GAL_VDD5 C313 C524
B6 VCC VSS B9 J29 VSS GAL_VDD6 D31
B12 B15 K2 E30 0.1u
VCC VSS VSS GAL_VDD7 1u-0805 C494
B20 VCC VSS B17 K4 VSS GAL_VDD8 F1
B26 B23 K6 F31 C314 560u-4V
VCC VSS VSS GAL_VDD9 C521
B29 VCC VSS B28 K8 VSS GAL_VDD10 G30
D
C2 C7 K24 H1 1u-0805 0.1u D
VCC VSS VSS GAL_VDD11 C377 C1030
C4 VCC VSS C13 K26 VSS GAL_VDD12 H31
C10 C19 K28 J30 560u-4V
VCC VSS VSS GAL_VDD13 1u-0805 C520
C16 VCC VSS C25 L3 VSS GAL_VDD14 K1
C22 C29 L5 K31 C486 0.1u
VCC VSS VSS GAL_VDD15 C1011
C28 VCC VSS D2 L7 VSS GAL_VDD16 L30
D8 D5 L9 M1 1u-0805 560u-4V
VCC VSS VSS GAL_VDD17 C403 C9
D14 VCC VSS D11 L23 VSS GAL_VDD18 M31
D18 D21 L25 N1 0.1u
VCC VSS VSS GAL_VDD19 1u-0805 C1041
D24 VCC VSS D27 L27 VSS GAL_VDD20 N31
D29 D28 L29 P30 C372 560u-4V
VCC VSS VSS GAL_VDD21 C274
E2 VCC VSS E9 M2 VSS GAL_VDD22 R1
E6 E15 M4 R31 22u-1210 0.1u
VCC VSS VSS GAL_VDD23 C391 C1040
E12 VCC VSS E17 M6 VSS GAL_VDD24 T30
E20 E23 M8 U1 560u-4V
VCC VSS VSS GAL_VDD25 22u-1210 C8
E26 VCC VSS E29 M24 VSS GAL_VDD26 U31
E28 F2 M26 V30 C496 0.1u
VCC VSS VSS GAL_VDD27 C1033
F4 VCC VSS F7 M28 VSS GAL_VDD28 W1
F10 F13 N2 W31 1u-0805 560u-4V
VCC VSS VSS GAL_VDD29 C1051 C292
F16 VCC VSS F19 N4 VSS GAL_VDD30 Y30
F22 F25 N6 AA1 0.1u
VCC VSS VSS GAL_VDD31 C1061
F29 VCC VSS F28 N8 VSS GAL_VDD32 AA31
G2 G3 N24 AB30 0.1u 560u-4V
VCC VSS VSS GAL_VDD33 C363 C329
G4 VCC VSS G5 N26 VSS GAL_VDD34 AC31
G6 G7 NOCONA_G7_P1 N28 AD30 0.1u
VCC VSS VSS GAL_VDD35 C1027
G8 VCC VSS G9 P3 VSS
G24 G25 P5 A31 0.1u 560u-4V
VCC VSS VSS GAL_VSS1 C381
G26 VCC VSS G27 P7 VSS GAL_VSS2 B30
G28 G29 P9 C1 NOCONA_C1_P1 C11 0.1u
VCC VSS VSS GAL_VSS3 C1056
H3 H2 P23 C31
Prestonia_PWR

VCC VSS VSS GAL_VSS4 0.1u


H5 VCC VSS H4 P25 VSS GAL_VSS5 D30
H7 H6 P27 E1 C401 560u-4V
VCC VSS VSS GAL_VSS6 C10 0.1u
H9 H8 P29 E31

Prestonia_PWR
VCC VSS VSS GAL_VSS7 C1050
H23 VCC VSS H24 R2 VSS GAL_VSS8 F30
C 0.1u C
H25 VCC VSS H26 R4 VSS GAL_VSS9 G1
H27 H28 R6 G31 C362 560u-4V
VCC VSS VSS GAL_VSS10 0.1u
H29 VCC VSS J3 R8 VSS GAL_VSS11 H30
J2 J5 R24 J1 C273 C1036
VCC VSS VSS GAL_VSS12 0.1u
J4 VCC VCC W29 R26 VSS GAL_VSS13 J31
J6 Y2 R28 K30 C404
VCC VCC VSS GAL_VSS14 560u-4V 0.1u
J8 VCC VCC Y10 T3 VSS GAL_VSS15 L1
J24 Y16 T5 L31 C1018
VCC VCC VSS GAL_VSS16 0.1u
J26 VCC VCC Y22 T7 VSS GAL_VSS17 M30
J28 AA4 T9 N30 C409
VCC VCC VSS GAL_VSS18 0.1u
K3 VCC VCC AA6 T23 VSS GAL_VSS19 P1
K5 AA12 T25 P31 C995
VCC VCC VSS GAL_VSS20 0.1u
K7 VCC VCC AA20 T27 VSS GAL_VSS21 R30
K9 AA26 T29 T1 C354 C410
VCC VCC VSS GAL_VSS22 0.1u
K23 VCC VCC AB2 U2 VSS GAL_VSS23 T31
K25 AB8 U4 U30 22u-1206 C993
VCC VCC VSS GAL_VSS24 0.1u C484
K27 VCC VCC AB14 U6 VSS GAL_VSS25 V1
K29 AB18 U8 V31 C400
VCC VCC VSS GAL_VSS26 22u-1206 0.1u
L2 VCC VCC AB24 U24 VSS GAL_VSS27 W30
L4 AC3 U26 Y1 C373 C990
VCC VCC VSS GAL_VSS28 0.1u
L6 VCC VCC AC4 U28 VSS GAL_VSS29 Y31
L8 AC10 V3 AA30 C380 22u-1206
VCC VCC VSS GAL_VSS30 C488 0.1u
L24 VCC VCC AC16 V5 VSS GAL_VSS31 AB1
L26 AC22 V7 AB31 C1003
VCC VCC VSS GAL_VSS32 NOCONA_AC30_P1 0.1u 22u-1206
L28 VCC VCC AD2 V9 VSS GAL_VSS33 AC30
M3 AD6 V23 AD31 C315 C487
VCC VCC VSS GAL_VSS34 0.1u
M5 VCC VCC AD12 V25 VSS
M7 AD20 V27 A15 NOCONA_A15_P1 22u-1206 C989
VCC VCC VSS RSVD2 TP_CPU1_A16 0.1u C376
M9 VCC VCC AD26 V29 VSS RSVD3 A16
M23 AE3 W2 A26 TP_CPU1_A26 C311
VCC VCC VSS RSVD4 TP_CPU1_B1 22u-1206 0.1u
M25 VCC VCC AE8 W4 VSS RSVD5 B1
M27 AE14 W24 C5 NOCONA_C5_P1 C350
VCC VCC VSS RSVD6 TP_CPU1_D25 0.1u
M29 VCC VCC AE18 W26 VSS RSVD7 D25
N3 AE24 W28 W3 TP_CPU1_W3 C316 X_22u-1206
B VCC VCC VSS RSVD8 TP_CPU1_Y3 C415 B
N5 VCC VCC R29 Y5 VSS RSVD11 Y3
N7 T2 Y7 Y27 CPU2_DIODE_P
VCC VCC VSS RSVD12 CPU2_DIODE_N 0.1u 22u-1206
N9 VCC VCC T4 Y13 VSS RSVD13 Y28
N23 T6 Y19 C293 C498
VCC VCC VSS
N25 VCC VCC T8 Y25 VSS
N27 T24 AA2 AC1 TP_CPU1_AC1 22u-1206 10 mils 10 mils
VCC VCC VSS RSVD9
N29 VCC VCC T26 AA9 VSS RSVD10 AD1 TP_CPU1_AD1 0.1u C489
P2 VCC VCC T28 AA15 VSS RSVD14 AE4 TP_CPU1_AE4 C50 NOCONA_C5_P1 NOCONA_A4_P1
P4 VCC VCC U3 AA17 VSS RSVD15 AE15 TP_CPU1_AE15 22u-1206
P6 VCC VCC U5 AA23 VSS RSVD16 AE16 TP_CPU1_AE16 C323
P8 U7 AB5 AE27 0.1u NOCONA_A15_P1 R912
VCC VCC VSS VSS FORCEPR# VCC_CORE
P24 U9 AB11 AE21 C1019 22u-1206 49.9-1%
VCC VCC VSS VSS C303
P26 VCC VCC U23 AB21 VSS VSS AE11
P28 U25 AB27 AE2 NOCONA_C1_P1 R913
VCC VCC VSS VSS 0.1u 22u-1206 TESTLOW 49.9-1%
R3 VCC VCC U27 AC2 VSS VSS AD23
C54 C304
GN10MTG_GND10
GN11MTG_GND11
GN12MTG_GND12
GN13MTG_GND13
GN14MTG_GND14
GN15MTG_GND15
GN16MTG_GND16
GN17MTG_GND17
GN18MTG_GND18
GN19MTG_GND19
GN20MTG_GND20

R5 U29 AC7 AD17


GN1 MTG_GND1
GN2 MTG_GND2
GN3 MTG_GND3
GN4 MTG_GND4
GN5 MTG_GND5
GN6 MTG_GND6
GN7 MTG_GND7
GN8 MTG_GND8
GN9 MTG_GND9

VCC VCC VSS VSS R920


R7 VCC VCC V2 AC13 VSS VSS AD15 VCC_CORE
R9 V4 AC19 AD9 22u-1206 X_49.9-1%
VCC VCC VSS VSS 0.1u C305
R23 V6 AC25 AD3
GN42EMI_GND10
GN43EMI_GND11
GN44EMI_GND12
GN45EMI_GND13
GN46EMI_GND14
GN47EMI_GND15
GN48EMI_GND16

VCC VCC VSS VSS C317 NOCONA_AC30_P1 R918


R25 VCC VCC V8
R27 V24 22u-1206 SLEW_CTRL 0 NOPOP FOR NOCONA
VCC VCC C136
W27 VCC VCC V26
W25 V28 0.1u
VCC VCC SOCKET_604 C388 22u-1206
C351
SOCKET_604
0.1u 22u-1206
C122 C37

22u-1206
0.1u C306

22u-1206
C485
A A
22u-1206
C307

22u-1206
CPU2_DIODE_P
CPU2_DIODE_P 39
CPU2_DIODE_N X_150u_SP
Micro Star Restricted Secret
CPU2_DIODE_N 39 X
C1132 Title Rev
FOR PRESTONIA 604 ONLY CPU 2_POWER
Document Number 00E
X X_150u_SP
C1133 MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Monday, September 16, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 6 of 64
5 4 3 2 1
5 4 3 2 1

VID_P0_[0..4] 3,27,47
VID_P0_0
VID_P0_1
VID_P0_2
VID_P0_3
VID_P0_4 +5V
VID_P1_[0..4] 5

D
VID_P1_0 D
VID_P1_1
VID_P1_2 R866
VID_P1_3
VID_P1_4 1K

14
U51A +5V
+3_3V 1
5 SKTOCC_1_L
3
14 U52A 2
D57

1
VID_P0_0 1
3 A C 74F00-SOIC14 R863
VID_P1_0 2

7
7 8.2K
74LCX86-SO14 1N4148S
U52B D3
14

2
VID_P0_1 D51 LOW ENABLE
4 A C VRM_OUTEN_L 27
6 A C

14
VID_P1_1 5 U51B Q80
7 4 C 1N4148S
74LCX86-SO14 1N4148S 6 1 2 B
14 U52C 5 R862 4.7K E
C VID_P0_2 D50 C
9

2
8 A C 74F00-SOIC14 MMBT3904
VID_P1_2 10 R867

7
7 4.7K
74LCX86-SO14 1N4148S
14 U52D
VID_P0_3 D47
12

1
11 A C
VID_P1_3 13 +12V +3_3V +3_3V
7
74LCX86-SO14 1N4148S

R943 R944 R945


+3_3V
10K 20K 20K

SMBUS_PAR1_CLK 8,25,55,60
R946
10K

2
Q85
R947
B G B
2N7002S X_0

S
SMBUS_CPU_CLK 3,5

D
+12V Q86

1
20 CPU_SMBUS_EN_L G
2N7002S
SMBUS_PAR1_DATA 8,25,55,60
1

2
R858 RN101 8P4R-1K Q87
VID_P0_2 1 2 R948
1K-1206 VCCT VID_P1_2 VCCT
3 4 G X_0
+3_3V VID_P0_3 5 6 2N7002S
VID_P1_3

S
7 8
2

1 2 VID_P0_4 1 2

1
SMBUS_CPU_DATA 3,5
R823 X_0 R828 1K
C

3.3V D58 C940 C941

RLZ3.3B-S-LL34 1000p X_10u/16V/S RN102 8P4R-1K


VID_P0_0 1 2
VID_P1_0 VCCT
A

3 4
VID_P0_1
A
VID_P1_1
5 6 Micro Star Restricted Secret A
7 8
VID_P1_4 1 2 Title Rev
R822 1K VID COMPARE
Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


Monday, September 16, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 7 of 64
5 4 3 2 1
5 4 3 2 1

CP6 CP5

X_COPPER X_COPPER

FB19 FB17
+3_3V
+3_3V VCC3_CLK VCC3_CLKA
D D

X_80-0805 C620 C626 C627 C629 C628 C581 C582 C562 C561 C617 C615 X_80-0805

22u-1206 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 22u-1206 Width/Space=6/24 for all clock on layer 8

ICH4_14MHZ_CLK 20
R386 33
MCH_66MHZ_CLK 10 L=A
CLK_GEN_1 R402 33
L=A-0.184"

14
19
32
37
46
50

26
U21 ICH4_66MHZ_CLK 20

1
8
R391 33
Y2 P64H2_66MHZ_CLK 25 L=A+0.243"

VDD_REF

VDD_48MHZ
VDD_PCI
VDD_PCI
VDD_3V66
VDD_3V66

VDD_CPU
VDD_CPU

VDD_CORE
CLK_GEN_2 2 R454 33
XTAL_IN ICH4_14MHZ_CLK_R
REF0 56 AGP_66MHZ_CLK 17 L=A-4.189"
14M-32pf-HC49S-D R455 33
C612 C585 C539 C573 C542 C653 C654
X_10p X_10p 33 MCH_66MHZ_CLK_R
3V66_0 X_10p X_10p X_10p X_10p X_10p
3 XTAL_OUT
35 ICH4_66MHZ_CLK_R
3V66_1/VCH
VCC3_CLK R369 4.7K MULT0 MULT0 43 21 P64H2_66MHZ_CLK_R
R444 4.7K PWRDWN_L R370 MULT0 66BUF0/3V66_2
R399 4.7K CLK_PCISTOP_L FSB_FREQ_SEL 55 22 AGP_66MHZ_CLK_R FWH_33MHZ_CLK4
S1 66BUF1/3V66_3
X_10K S2 40 23 TP_CK_P_66M_AUD1 C647
S2 66BUF2/3V66_4 C646 C649
S2 30 24 TP_CK_P_66M_AUD X_10p
C 7,25,55,60 SMBUS_PAR1_CLK SCLK 66IN/3V66_5 C
X_10p X_10p W/S=6/24
differential 100 ohm R388 29
7,25,55,60 SMBUS_PAR1_DATA SDATA
10 PCI0_33MHZ_CLK_R
single ended 50 ohm PCI0 R447 33
PCI0_33MHZ_CLK 28 B-2.5"

4.75/7/25 CPU_VRD_PWR_GD_L 28 11 PCI1_33MHZ_CLK_R


PWR_GD# PCI1 PCI1_33MHZ_CLK 29 B-2.5"
4.7K FWH_33MHZ_CLK_R R448 33
FWH_33MHZ_CLK 43 B
12 SIO_33MHZ_CLK_R R450 33
PCI2 SIO_33MHZ_CLK 39 B
R451 33
FWH_33MHZ_CLK4
P0_BCLK0_R 52 13 R449 33 B
3 P0_BCLK0 CPU0 PCI3
R393 33 C650
FWH_33MHZ_CLK2 43
16 R452 X_33
P0_BCLK1_R PCI4 X_10p
3 P0_BCLK1 51 CPU0# FWH_33MHZ_CLK3 43
R394 33 17 R453 X_33
PCI5
ICH4_33MHZ_CLK 19
P1_BCLK0_R 49 18 R446 33
5 P1_BCLK0 CPU1 PCI6
R395 33 C645 C648 B=A-0.157"
5 ICH4_33MHZ_CLK_R C651 C652
P1_BCLK1_R PCI_F0 X_10p X_10p
5 P1_BCLK1 48 CPU1#
R396 33 6 TP_CK_P_33M_AUD1 X_10p X_10p
PCI_F1
MCH_BCLK0_R 45 7 TP_CK_P_33M_AUD
9 MCH_BCLK0 CPU2 PCI_F2
R397 33
MCH_BCLK=P?_BCLK+0.282" 39 ICH4_USB_48MHZ_CLK_R
USB_48MHZ ICH4_48MHZ_CLK 20
MCH_BCLK1_R 44 R389 33
9 MCH_BCLK1 CPU2#
R398 33 38 DOT_48MHZ_CLK_R
DOT_48MHZ SIO_48MHZ_CLK 39
R390 33
R392 10K CPU3_R 54 CPU3
SM bus addr.=D2h
B R368 10K CPU3_L_R 25 PWRDWN_L B
PWR_DWN#
53 CPU3# C540 C541
R367 R366 R365 R364 R363 R362 CLK_PCISTOP_L

GND_48MHZ
34

GND_CORE
PCI_STOP#

GND_3V66
GND_3V66

GND_IREF
X_10p X_10p

GND_CPU
42

GND_REF
GND_PCI
GND_PCI
IREF
49.9-1% 49.9-1% 49.9-1% 49.9-1% 49.9-1% 49.9-1% C655

1u
R387 ICS-CY28329-SSOP56

15
20
31
36
41
47

27
4
9
475-1%
475FOR 50 ohm ICS-932S203AF
+3_3V
impedance

R437 VCC3_CLK

3VDUAL +3_3V +3_3V +3_3V +3_3V +3_3V +3_3V


10K R438
C633 C125 C937 C928 C597 C173
JGL1
CPU0_BSEL0 10K 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
1 CPU0_BSEL0 3

2
FSB_FREQ_SEL CPU_VRD_PWR_GD_L
2 H_SEL133_100_L R476
3
R474 around clock for EMI
R430 0 C Q52 R456 1k
X_YJ103 Q53 R477
27 VRM_GD 2 1 B C
E B 2 1
1

A SKTOCC_0_L 3,47 A
MMBT3904 X_1K E
HOST CLOCK JUMPER 10K
MMBT3904 10K
Micro Star Restricted Secret
1-2 CPU SELECT <DEFAULT> Title Rev
CLOCK
2-3 100MHZ HOST CLOCKS Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


OFF 133MHZ HOST CLOCKS Sunday, September 15, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 8 of 64
5 4 3 2 1
5 4 3 2 1

3,5 FSB_ADSTB_L[0..1]

R194 100
25,60 DEVRST_L1

FSB_ADSTB_L1
FSB_ADSTB_L0
+3_3V

FSB_HD_L10
FSB_HD_L11
FSB_HD_L12
FSB_HD_L13
FSB_HD_L14
FSB_HD_L15
FSB_HD_L16
FSB_HD_L17
FSB_HD_L18
FSB_HD_L19
FSB_HD_L20
FSB_HD_L21
FSB_HD_L22
FSB_HD_L23
FSB_HD_L24
FSB_HD_L0
FSB_HD_L1
FSB_HD_L2
FSB_HD_L3
FSB_HD_L4
FSB_HD_L5
FSB_HD_L6
FSB_HD_L7
FSB_HD_L8
FSB_HD_L9
R228 4.7K
D D
8 MCH_BCLK1
8 MCH_BCLK0

U16A

G25

G26

G23
C29
C30

D29

D28
D26

H24

C27

C26

H22
B31

A29

A31
B30
E28

E25

A28
B28
B27

A26

B25
A25
F27
J17
J16

J18
J24

H9
C6
TESTIN#
RSTIN#

HADSTB1#
HADSTB0#
HCLKINP

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
FSB_HD_L[0..63] 3,5

HCLKINN
D23 FSB_HD_L25
HD25# FSB_HD_L26
3,5 FSB_ADS_L A10 ADS# HD25# F23
F3 C24 FSB_HD_L27
3,5 FSB_AP0_L AP0# HD27#
F2 D22 FSB_HD_L28
3,5 FSB_AP1_L AP1# HD28#
E24 FSB_HD_L29
HD29# FSB_HD_L30
3,4,5 FSB_BINIT_L H4 BINIT# HD30# E22
B10 G20 FSB_HD_L31
3,4,5 FSB_BNR_L BNR# HD31#
F15 A23 FSB_HD_L32
3,5 FSB_BPRI_L BPRI# HD32#
F12 B22 FSB_HD_L33
3,5 CPU0_BR0_L BREQ0# HD33#
C23 FSB_HD_L34
HD34# FSB_HD_L35
3,4,5 FSB_CPURST_L G4 CPURST# HD35# D20
B24 FSB_HD_L36
FSB_DEP_L0 HD36# FSB_HD_L37
C9 DEP0# HD37# C21
FSB_DEP_L1 D10 D19 FSB_HD_L38
FSB_DEP_L2 DEP1# HD38# FSB_HD_L39
C8 DEP2# HD39# A20
FSB_DEP_L3 B6 B18 FSB_HD_L40
DEP3# HD40# FSB_HD_L41
HD41# B19
E19 FSB_HD_L42
3,5 FSB_DEP_L[0..3] HD42#
B7 C18 FSB_HD_L43
3,5 FSB_DBSY_L DBSY# HD43#
H16 H19 FSB_HD_L44
C 3,5 FSB_DEFER_L DEFER# HD44# C
FSB_DBI_L0 H25 E18 FSB_HD_L45
FSB_DBI_L1 DINV0# HD45# FSB_HD_L46
D25 DINV1# HD46# H18
FSB_DBI_L2 A19 G19 FSB_HD_L47
FSB_DBI_L3 DINV2# HD47# FSB_HD_L48
C15 DINV3# HD48# F17
MCH_HOST I/F HD49# F18 FSB_HD_L49
G17 FSB_HD_L50
3,5 FSB_DBI_L[0..3] HD50#
A8 A17 FSB_HD_L51
3,5 FSB_DRDY_L DRDY# HD51#
E15 D17 FSB_HD_L52
3,4,5 FSB_HITM_L HITM# HD52#
D13 D16 FSB_HD_L53
3,4,5 FSB_HIT_L HIT# HD53#
D11 A16 FSB_HD_L54
3,5 FSB_TRDY_L HTRDY# HD54#
B16 FSB_HD_L55
3,5 FSB_REQ_L[0..4] HD55#
C14 FSB_HD_L56
FSB_REQ_L4 HD56# FSB_HD_L57
G14 HREQ4# HD57# D14
FSB_REQ_L3 E10 B13 FSB_HD_L58
FSB_REQ_L2 HREQ3# HD58# FSB_HD_L59
H13 HREQ2# HD59# C12
FSB_REQ_L1 G13 B12 FSB_HD_L60
FSB_REQ_L0 HREQ1# HD60# FSB_HD_L61
G10 HREQ0# HD61# A14
A7 B15 FSB_HD_L62
3,5 FSB_LOCK_L HLOCK# HD62#
D1 A13 FSB_HD_L63
3,4,5 FSB_MCERR_L XERR# HD63#
FSB_HDSTBN_L[0..3] 3,5
3,5 FSB_RS0_L E12 RS0#
F14 E27 FSB_HDSTBN_L0
3,5 FSB_RS1_L RS1# HDSTBN0#
E13 G22 FSB_HDSTBN_L1
3,5 FSB_RS2_L RS2# HDSTBN1#
E1 B21 FSB_HDSTBN_L2
3,5 FSB_RSP_L RSP# HDSTBN2#
C17 FSB_HDSTBN_L3
HDSTBN3# FSB_HDSTBP_L0
C11 HXRCOMP HDSTBP0# F26
HSWNG0 G16 H21 FSB_HDSTBP_L1
HXSWNG HDSTBP1# FSB_HDSTBP_L2
B F20 HYRCOMP HDSTBP2# C20 B
HSWNG1 E21 E16 FSB_HDSTBP_L3

HDVREF3
HDVREF2
HDVREF1
HDVREF0
HAVREF0
HAVREF1
HYSWNG HDSTBP3#

CCVREF
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HA32#
HA33#
HA34#
HA35#
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#

FSB_HDSTBP_L[0..3] 3,5
R247 R226

24.9-1% 24.9-1%
G11
H15

H12

H10

A11
A22
F11

F21
F24
J12
J11

MCH
G8

G7

G5
D8

D7

C5

D5

H6

D4

H7

C2
C3

D2
E9

A4
E7

B4
B3
A5

E6

E3

E4

B9
F9

F6

F5

F8
J9

J8
FSB_HA_L27
FSB_HA_L28

FSB_HA_L32
FSB_HA_L10
FSB_HA_L11
FSB_HA_L12
FSB_HA_L13
FSB_HA_L14
FSB_HA_L15
FSB_HA_L16
FSB_HA_L17
FSB_HA_L18
FSB_HA_L19
FSB_HA_L20
FSB_HA_L21
FSB_HA_L22
FSB_HA_L23
FSB_HA_L24
FSB_HA_L25
FSB_HA_L26

FSB_HA_L29
FSB_HA_L30
FSB_HA_L31

FSB_HA_L33
FSB_HA_L34
FSB_HA_L35
FSB_HA_L3
FSB_HA_L4
FSB_HA_L5
FSB_HA_L6
FSB_HA_L7
FSB_HA_L8
FSB_HA_L9

GTL_VREF_MCH 18

C405
0.01u
FSB_HA_L[3..35] 3,5

VCC_CORE

C344 C309 C331 C370 C326 C378 C417 C408 C477 C476 C1026 C339
VCC_CORE VCC_CORE
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u

R232 R219

A 301-1% 301-1% A

HSWNG0 HSWNG1
Micro Star Restricted Secret
Title Rev
MCH_HOST
R233 R220 Document Number 00E
C346 C336
150-1% 150-1% MICRO-STAR INT'L CO.,LTD. Last Revision Date:
0.01u 0.01u Wednesday, September 18, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 9 of 64
5 4 3 2 1
5 4 3 2 1

+3_3V

U16F U16G
AGP_ST[0..2] 17
12 mil
AGP_AD31 M6 J5 AGP_ST2 HIA_VSWNG_MCH AD2 J21 R269 4.7k
GAD31 ST2 18 HIA_VSWNG_MCH HI_A_PSWNG SMB_SCL
AGP_AD30 M2 H3 AGP_ST1 HIA_VREF_MCH AE1 J20
GAD30 ST1 18 HIA_VREF_MCH HI_A_PREF SMB_SDA
AGP_AD29 M3 H1 AGP_ST0 AC1 R268 4.7k
AGP_AD28 GAD29 ST0 HI_A_PRCOMP
N2 GAD28 AGP_C_BE_L[0..3] 17
AGP_AD27 N1 HIA_RCOMP_MCH HI_A11 AA6 J23
GAD27 HI_A11 PWRGD SYS_PWR_GD_3_3V 20,60
AGP_AD26 M5 R2 AGP_C_BE_L3 HI_A10 AC6
D AGP_AD25 GAD26 GCBE3 AGP_C_BE_L2 HI_A9 HI_A10 D
P1 GAD25 GCBE2 T8 AE2 HI_A9
AGP_AD24 N4 U9 AGP_C_BE_L1 HI_A8 AB7 Y11 R294 0
GAD24 GCBE1 HI_A8 TDIOANODE C469 MCH_TDA 47
AGP_AD23 T1 U1 AGP_C_BE_L0 HI_A7 AA9 W11 MCH_TDC
AGP_AD22 GAD23 GCBE0 HI_A6 HI_A7 TDIOCATHODE R306 0
N7 GAD22 AB8 HI_A6
AGP_AD21 T4 HI_A5 AA8
AGP_AD20 GAD21 HI_A4 HI_A5
P6 GAD20 GREQ J6 AGP_REQ 17 AC7 HI_A4 XORMODE# G1
AGP_AD19 N8 K8 HI_A3 AC4 1000P
GAD19 GGNT AGP_GNT 17 HI_A3
AGP_AD18 P7 Y6 HI_A2 AD3
GAD18 GFRAME AGP_FRAME 17 HI_A2
AGP_AD17 P9 AB2 HI_A1 AC3 R6 TP_MCH_NC_R6 R293
GAD17 GTRDY AGP_TRDY 17 HI_A1 NC
AGP_AD16 R9 AA5 HI_A0 AB4 R5 TP_MCH_NC_R5
GAD16 GPAR AGP_PAR 17 HI_A0 NC
AGP_AD15 R8 AB1
GAD15 GSTOP AGP_STOP 17
AGP_AD14 V8 GAD14 19 HI_A[0..11] 6 mil
AGP_AD13 T7 AD5 8.2K
GAD13 19 HIA_STBF HI_A_PSTRBF
AGP_AD12 U7 U4 AGP_VSWNG AB5 R304 R288
GAD12 PSWNG_AGP1 19 HIA_STBS HI_A_PSTRBS
AGP_AD11 U6 N5 +1_5V +1_5V
AGP_AD10 GAD11 PSWNG_AGP0 +3_3V
V6 GAD10
AGP_AD9 V5 HIB_VSWNG_MCH AJ4
GAD9 18 HIB_VSWNG_MCH HI_B_PSWNG
AGP_AD8 W8 P4 R270 43.2-1% HIB_VREF_MCH AG6 51-1% 51-1%
GAD8 PRCOMP_AGP1 18 HIB_VREF_MCH HI_B_PREF
AGP_AD7 W1 T5 AF7
AGP_AD6 GAD7 PRCOMP_AGP0 R283 43.2-1% HI_B_PRCOMP
W5 GAD6
AGP_AD5 W2 HIB_RCOMP_MCH
AGP_AD4 GAD5 HI_B21
W4 GAD4 PREF_AGP1 T2 AGP_VREF 17,18 25 HI_B21 AL2 HI_B21
AGP_AD3 Y1 U3 HI_B20 AF6
GAD3 PREF_AGP0 25 HI_B20 HI_B20
AGP_AD2 Y3 HI_B18 AG3
AGP_AD1 GAD2 C428 HI_B17 HI_B18
Y4 GAD1 AG5 HI_B17
AGP_AD0 AA3 V3 HI_B16 AF4
GAD0 AD_STB0F AGP_ADSTB0F 17 HI_B16
V2 0.01u HI_B15 AK3
AD_STB0S AGP_ADSTB0S 17 HI_B15
P3 HI_B14 AL1
C 17 AGP_AD[0..31] AD_STB1F AGP_ADSTB1F 17 HI_B14 C
M8 R3 HI_B13 AJ3
17 AGP_DBI_LO GDBI_LO AD_STB1S AGP_ADSTB1S 17 HI_B13
M9 L3 HI_B12 AK2
17 AGP_DBI_HI GDBI_HI/PIPE* SB_STBF AGP_SBSTBF 17 HI_B12
J3 K2 HI_B11 AJ1
17 AGP_RBF RBF SB_STBS AGP_SBSTBS 17 HI_B11
K5 HI_B10 AH1
17 AGP_WBF WBF HI_B10
AA2 HI_B9 AH2
17 AGP_DEVSEL GDEVSEL HI_B9
W7 L6 AGP_SBA_L7 HI_B8 AD9
17 AGP_IRDY GIRDY SBA7# HI_B8
V9 L7 AGP_SBA_L6 HI_B7 AF1
17 AGP_SERR GSERR SBA6# HI_B7
L4 AGP_SBA_L5 HI_B6 AF3
SBA5# AGP_SBA_L4 HI_B5 HI_B6
SBA4# L1 AE5 HI_B5
TP_0401_9 AL10 K1 AGP_SBA_L3 HI_B4 AE7
TP_0401_10 RSV SBA3# AGP_SBA_L2 HI_B3 HI_B4
Y7 RSV SBA2# K4 AD6 HI_B3
TP_0401_11 L9 J2 AGP_SBA_L1 HI_B2 AC9
RSV SBA1# AGP_SBA_L0 HI_B1 HI_B2
SBA0# K7 AG2 HI_B1
HI_B0 AD8
AGP_SBA_L[0..7] 17 HI_B0

GCLKIN Y9 MCH_66MHZ_CLK 8 25 HI_B[0..18]


25 HIB_STBF AE4 HI_B_PSTRBF
25 HIB_STBS AE8 HI_B_PSTRBS
MCH AH4
25 HIB_USTBF HI_B_PUSTRBF
25 HIB_USTBS AH5 HI_B_PUSTRBS

+1_2V MCH

B C454 C465 C1045 C435 B

1u-0805 1u-0805 0.1u 0.1u


+1_5V
HIA_VSWNG_MCH

PLACE THESE +1_2V +1_2V


HIA_VREF_MCH
COMPONENTS WITHIN
C427 C446 C432 C570 C425 C424 C1021 C1044 C1022 C1023 0.5" OF THE MCH C451 C452

0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.01u 0.01u
24.9 ohm for +1.2V R299 R276
43.2 ohm for +1.5V

MCH_AGP_DECPL +1_5V 24.9-1% 24.9-1%


6 mil HIB_VSWNG_MCH
HIA_RCOMP_MCH
PLACE WITHIN 1" OF MCH 6 mil HIB_VREF_MCH
HIB_RCOMP_MCH
R284
C453 C439
1.43K-1%
0.01u 0.01u
796 mV AGP_VSWNG

C429 C430
A R281 A
AGP_VSWNG:
0.1u 0.01u
1.62K-1% 8X:800mV 4X:VREF=750mV
SILICON WILL IGNORE VSWNG IN 4X Micro Star Restricted Secret
AND CONNECT IT TO VREF IN THE Title Rev
SILICON. MCH_AGP&HLA&HLB
Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


Wednesday, September 18, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 10 of 64
5 4 3 2 1
5 4 3 2 1

U16D
U16C
13,15 CHA_DQ[0..63] 14,15 CHB_DQ[0..63]
CHA_DQ0 L25 AH29 CHA_DQS17 CHB_DQ0 E31 AN29 CHB_DQS17
CHA_DQ1 DQ_A0 DM8/DQS_A17 CHA_DQS16 CHB_DQ1 DQ_B0 DM8/DQS_B17 CHB_DQS16
J27 DQ_A1 DM7/DQS_A16 AJ9 F32 DQ_B1 DM7/DQS_B16 AN5
CHA_DQ2 J29 AH14 CHA_DQS15 CHB_DQ2 G32 AK12 CHB_DQS15
CHA_DQ3 DQ_A2 DM6/DQS_A15 CHA_DQS14 CHB_DQ3 DQ_B2 DM6/DQS_B15 CHB_DQS14
L27 DQ_A3 DM5/DQS_A14 AH19 H33 DQ_B3 DM5/DQS_B14 AL19
CHA_DQ4 M25 AG23 CHA_DQS13 CHB_DQ4 E33 AL25 CHB_DQS13
CHA_DQ5 DQ_A4 DM4/DQS_A13 CHA_DQS12 CHB_DQ5 DQ_B4 DM4/DQS_B13 CHB_DQS12
G29 DQ_A5 DM3/DQS_A12 AB28 F30 DQ_B5 DM3/DQS_B12 AD33
CHA_DQ6 K28 V27 CHA_DQS11 CHB_DQ6 H30 V33 CHB_DQS11
CHA_DQ7 DQ_A6 DM2/DQS_A11 CHA_DQS10 CHB_DQ7 DQ_B6 DM2/DQS_B11 CHB_DQS10
D M26 DQ_A7 DM1/DQS_A10 N28 H31 DQ_B7 DM1/DQS_B10 M32 D
CHA_DQ8 P25 H28 CHA_DQS9 CHB_DQ8 L33 F33 CHB_DQS9
CHA_DQ9 DQ_A8 DM0/DQS_A9 CHA_DQS8 CHB_DQ9 DQ_B8 DM0/DQS_B9 CHB_DQS8
R25 DQ_A9 DQS_A8 AH28 L31 DQ_B9 DQS_B8 AK29
CHA_DQ10 R26 AK8 CHA_DQS7 CHB_DQ10 P31 AL5 CHB_DQS7
CHA_DQ11 DQ_A10 DQS_A7 CHA_DQS6 CHB_DQ11 DQ_B10 DQS_B7 CHB_DQS6
R27 DQ_A11 DQS_A6 AJ15 P30 DQ_B11 DQS_B6 AM12
CHA_DQ12 T25 AG18 CHA_DQS5 CHB_DQ12 K32 AK18 CHB_DQS5
CHA_DQ13 DQ_A12 DQS_A5 CHA_DQS4 CHB_DQ13 DQ_B12 DQS_B5 CHB_DQS4
M29 DQ_A13 DQS_A4 AF21 M33 DQ_B13 DQS_B4 AM24
CHA_DQ14 P27 AB29 CHA_DQS3 CHB_DQ14 N32 AC30 CHB_DQS3
CHA_DQ15 DQ_A14 DQS_A3 CHA_DQS2 CHB_DQ15 DQ_B14 DQS_B3 CHB_DQS2
P28 DQ_A15 DQS_A2 V29 N31 DQ_B15 DQS_B2 V32
CHA_DQ16 V26 N29 CHA_DQS1 CHB_DQ16 U33 M30 CHB_DQS1
CHA_DQ17 DQ_A16 DQS_A1 CHA_DQS0 CHB_DQ17 DQ_B16 DQS_B1 CHB_DQS0
U27 DQ_A17 DQS_A0 K26 U30 DQ_B17 DQS_B0 G31
CHA_DQ18 W25 CHB_DQ18 W32
CHA_DQ19 DQ_A18 CHB_DQ19 DQ_B18
W29 DQ_A19 CHA_DQS[0..17] 13,15 Y33 DQ_B19 CHB_DQS[0..17] 14,15
CHA_DQ20 V25 AF24 CHA_CMDCLK0 CHB_DQ20 T32 AN27 CHB_CMDCLK0
DQ_A20 CMDCLK_A0 CHA_CMDCLK0 13 DQ_B20 CMDCLK_B0 CHB_CMDCLK0 14
CHA_DQ21 U28 AG24 CHA_CMDCLK0_L CHB_DQ21 U31 AM27 CHB_CMDCLK0_L
DQ_A21 CMDCLK_A0# CHA_CMDCLK0_L 13 DQ_B21 CMDCLK_B0# CHB_CMDCLK0_L 14
CHA_DQ22 W26 AE22 CHA_CMDCLK1 CHB_DQ22 V30 AJ27 CHB_CMDCLK1
DQ_A22 CMDCLK_A1 CHA_CMDCLK1 13 DQ_B22 CMDCLK_B1 CHB_CMDCLK1 14
CHA_DQ23 W28 AF22 CHA_CMDCLK1_L CHB_DQ23 W31 AJ28 CHB_CMDCLK1_L
DQ_A23 CMDCLK_A1# CHA_CMDCLK1_L 13 DQ_B23 CMDCLK_B1# CHB_CMDCLK1_L 14
CHA_DQ24 AA25 AK21 TP_0401_1 CHB_DQ24 AC33 AF31 TP_0401_5
CHA_DQ25 DQ_A24 CMDCLK_A2 TP_0401_2 CHB_DQ25 DQ_B24 CMDCLK_B2 TP_0401_6
AB25 DQ_A25 CMDCLK_A2# AJ21 AC31 DQ_B25 CMDCLK_B2# AF30
CHA_DQ26 AC28 AF19 TP_0401_3 CHB_DQ26 AD30 AC25 TP_0401_7
CHA_DQ27 DQ_A26 CMDCLK_A3 TP_0401_4 CHB_DQ27 DQ_B26 CMDCLK_B3 TP_0401_8
AD29 DQ_A27 CMDCLK_A3# AE19 AE32 DQ_B27 CMDCLK_B3# AD25
CHA_DQ28 AA26 K25 CHA_CMDCLK4 CHB_DQ28 AB31 H27 CHB_CMDCLK4
DQ_A28 CMDCLK_A4 CHA_CMDCLK4 13 DQ_B28 CMDCLK_B4 CHB_CMDCLK4 14
CHA_DQ29 AB26 J26 CHA_CMDCLK4_L CHB_DQ29 AB32 G28 CHB_CMDCLK4_L
DQ_A29 CMDCLK_A4# CHA_CMDCLK4_L 13 DQ_B29 CMDCLK_B4# CHB_CMDCLK4_L 14
CHA_DQ30 AC27 D31 CHA_CMDCLK5 CHB_DQ30 AD32 C32 CHB_CMDCLK5
DQ_A30 CMDCLK_A5 CHA_CMDCLK5 13 DQ_B30 CMDCLK_B5 CHB_CMDCLK5 14
CHA_DQ31 AE29 D32 CHA_CMDCLK5_L CHB_DQ31 AE31 C33 CHB_CMDCLK5_L
C DQ_A31 CMDCLK_A5# CHA_CMDCLK5_L 13 DQ_B31 CMDCLK_B5# CHB_CMDCLK5_L 14 C
CHA_DQ32 AE21 AG8 CHA_CMDCLK6 CHB_DQ32 AL26 AH7 CHB_CMDCLK6
DQ_A32 CMDCLK_A6/CS_A5# CHA_CMDCLK6 13 DQ_B32 CMDCLK_B6/CS_B5# CHB_CMDCLK6 14
CHA_DQ33 AE20 AG9 CHA_CMDCLK6_L CHB_DQ33 AM25 AH8 CHB_CMDCLK6_L
DQ_A33 CMDCLK_A6#/CS_A4# CHA_CMDCLK6_L 13 DQ_B33 CMDCLK_B6#/CS_B4# CHB_CMDCLK6_L 14
CHA_DQ34 AH23 MCH_DDR CHA AJ6 CHA_CMDCLK7 CHB_DQ34 AN24 MCH_DDR CHB AK5 CHB_CMDCLK7
DQ_A34 CMDCLK_A7 CHA_CMDCLK7 13 DQ_B34 CMDCLK_B7 CHB_CMDCLK7 14
CHA_DQ35 AG21 AJ7 CHA_CMDCLK7_L CHB_DQ35 AL23 AK6 CHB_CMDCLK7_L
DQ_A35 CMDCLK_A7# CHA_CMDCLK7_L 13 DQ_B35 CMDCLK_B7# CHB_CMDCLK7_L 14
CHA_DQ36 AJ25 CHB_DQ36 AN26
CHA_DQ37 DQ_A36 CHB_DQ37 DQ_B36
AJ24 DQ_A37 AK26 DQ_B37
CHA_DQ38 AH22 K31 CHA_CKE3 CHB_DQ38 AK24 J30 CHB_CKE3
DQ_A38 CKE_A3 CHA_CKE3 13,15 DQ_B38 CKE_B3 CHB_CKE3 14,15
CHA_DQ39 AJ22 N26 CHA_CKE2 CHB_DQ39 AK23 N25 CHB_CKE2
DQ_A39 CKE_A2 CHA_CKE2 13,15 DQ_B39 CKE_B2 CHB_CKE2 14,15
CHA_DQ40 AE18 J33 CHA_CKE1 CHB_DQ40 AN21 J32 CHB_CKE1
DQ_A40 CKE_A1 CHA_CKE1 13,15 DQ_B40 CKE_B1 CHB_CKE1 14,15
CHA_DQ41 AJ19 K29 CHA_CKE0 CHB_DQ41 AM19 L28 CHB_CKE0
DQ_A41 CKE_A0 CHA_CKE0 13,15 DQ_B41 CKE_B0 CHB_CKE0 14,15
CHA_DQ42 AJ18 CHB_DQ42 AN18
CHA_DQ43 DQ_A42 CHB_DQ43 DQ_B42
AH17 DQ_A43 AK17 DQ_B43
CHA_DQ44 AF18 AM9 CHA_MA13 CHB_DQ44 AN20 AN8 CHB_MA13
CHA_DQ45 DQ_A44 MA_A13 CHA_MA12 CHB_DQ45 DQ_B44 MA_B13 CHB_MA12
AK20 DQ_A45 MA_A12 P33 AL20 DQ_B45 MA_B12 R29
CHA_DQ46 AG17 R32 CHA_MA11 CHB_DQ46 AM18 R33 CHB_MA11
CHA_DQ47 DQ_A46 MA_A11 CHA_MA10 CHB_DQ47 DQ_B46 MA_B11 CHB_MA10
AE17 DQ_A47 MA_A10 AM22 AL17 DQ_B47 MA_B10 AL22
CHA_DQ48 AE15 R30 CHA_MA9 CHB_DQ48 AL13 T31 CHB_MA9
CHA_DQ49 DQ_A48 MA_A9 CHA_MA8 CHB_DQ49 DQ_B48 MA_B9 CHB_MA8
AF15 DQ_A49 MA_A8 Y27 AM13 DQ_B49 MA_B8 Y28
CHA_DQ50 AG15 T29 CHA_MA7 CHB_DQ50 AL11 T28 CHB_MA7
CHA_DQ51 DQ_A50 MA_A7 CHA_MA6 CHB_DQ51 DQ_B50 MA_B7 CHB_MA6
AE14 DQ_A51 MA_A6 AA32 AM10 DQ_B51 MA_B6 AA33
CHA_DQ52 AK15 Y30 CHA_MA5 CHB_DQ52 AL14 Y31 CHB_MA5
CHA_DQ53 DQ_A52 MA_A5 CHA_MA4 CHB_DQ53 DQ_B52 MA_B5 CHB_MA4
AK14 DQ_A53 MA_A4 AA30 AN12 DQ_B53 MA_B4 AA29
CHA_DQ54 AJ13 AC24 CHA_MA3 CHB_DQ54 AN11 AD27 CHB_MA3
CHA_DQ55 DQ_A54 MA_A3 CHA_MA2 CHB_DQ55 DQ_B54 MA_B3 CHB_MA2
AG14 DQ_A55 MA_A2 AD26 AN9 DQ_B55 MA_B2 AE28
B CHA_DQ56 AG12 AG30 CHA_MA1 CHB_DQ56 AM7 AG29 CHB_MA1 B
CHA_DQ57 DQ_A56 MA_A1 CHA_MA0 CHB_DQ57 DQ_B56 MA_B1 CHB_MA0
AH10 DQ_A57 MA_A0 AH25 AL7 DQ_B57 MA_B0 AN23
CHA_DQ58 AF12 CHB_DQ58 AM4
CHA_DQ59 DQ_A58 CHB_DQ59 DQ_B58
AE11 DQ_A59 CHA_MA[0..13] 13,15 AN3 DQ_B59 CHB_MA[0..13] 14,15
CHA_DQ60 AH11 AH20 CHA_BA1 CHB_DQ60 AL8 AG20 CHB_BA1
CHA_DQ61 DQ_A60 BA_A1 CHA_BA0 CHB_DQ61 DQ_B60 BA_B1 CHB_BA0
AJ10 DQ_A61 BA_A0 AE16 AM6 DQ_B61 BA_B0 AF16
CHA_DQ62 AG11 CHB_DQ62 AL4
CHA_DQ63 DQ_A62 CHB_DQ63 DQ_B62
AE12 DQ_A63 CHA_BA[0..1] 13,15 AM3 DQ_B63 CHB_BA[0..1] 14,15
13,15 CHA_CB[0..7] RAS_A# AL16 CHA_RAS_L 13,15 14,15 CHB_CB[0..7] RAS_B# AM16 CHB_RAS_L 14,15
CAS_A# AN14 CHA_CAS_L 13,15 CAS_B# AE13 CHB_CAS_L 14,15
CHA_CB7 AF25 AM15 CHB_CB7 AK27 AN15
CB_A7 WE_A# CHA_WE_L 13,15 CB_B7 WE_B# CHB_WE_L 14,15
CHA_CB6 AG26 CHB_CB6 AL28
CHA_CB5 CB_A6 CHB_CB5 CB_B6
AE24 CB_A5 AK30 CB_B5
CHA_CB4 AE26 AF9 CHA_CS_L3 CHB_CB4 AJ30 AK9 CHB_CS_L3
CHA_CB3 CB_A4 CS_A3# CHA_CS_L2 CHB_CB3 CB_B4 CS_B3# CHB_CS_L2
AE23 CB_A3 CS_A2# AF10 AM28 CB_B3 CS_B2# AE10
CHA_CB2 AG27 AJ12 CHA_CS_L1 CHB_CB2 AL29 AK11 CHB_CS_L1
CHA_CB1 CB_A2 CS_A1# CHA_CS_L0 CHB_CB1 CB_B2 CS_B1# CHB_CS_L0
AF26 CB_A1 CS_A0# AF13 AN30 CB_B1 CS_B0# AH13
CHA_CB0 AF27 CHB_CB0 AM30
CB_A0 CB_B0
CHA_CS_L[0..3] 13,15 CHB_CS_L[0..3] 14,15
DRCOMPVREF_V AJ31 DRCOMPVREF_V 16 RCVENOUT_B# AH32 CHB_RCVENOUT_L 16
R184 402-1% AG33 AK32 AF33
ODTCOMP DRCOMPVREF_H DRCOMPVREF_H 16 14,16 CHB_VREF DVREF_B
6 mil R183 0

AG32 AJ33 R164 24.9-1% C286 MCH


13,16 CHA_VREF DVREF_A DRCOMP_V
R185 0 AK33
A DRCOMP_H A
6 mil R165 24.9-1% 0.1u
C287 L24 DDR_STRAP Micro Star Restricted Secret
RCVENOUT_A# AH31 CHA_RCVENOUT_L 16
0.1u Title Rev
6 mil MCH PLACE CLOSE MCH_DDR CHA&CHB
Document Number 00E
GND for registered TO MCH < 0.5"
PLACE CLOSE MICRO-STAR INT'L CO.,LTD. Last Revision Date:
DDR Wednesday, September 18, 2002
TO MCH < 0.5" No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 11 of 64
5 4 3 2 1
5 4 3 2 1

VCC_CORE

+1_2V U16E SB2_5V

P14 B32

M11
M23
M31
VCC VCCDDR

N10
N27
N30
N33

R10
R16
R18
R20
R24
R28
R31

U10
U14
U18
U20
U24
U26
U29
U32
K19
K21
K23
K27
K33

Y17

P11
P15
P17
P19
P23
P29

V11
V15
V17
V19
V23
V31
T11
T15
T17
T19
T23
T27
T33
L10
L12
L14
L16
L18
L20
L22

L26
L29
L30
L32

W3
M1
M7

N3
N9

R1
R4
R7

U5
P2
P5
P8

V1
V7
P18 D30

T3
T6
T9
L5
U16B VCC VCCDDR
R15 VCC VCCDDR F28
R17 H26

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VCC VCCDDR
R19 VCC VCCDDR H32
A30 VCCFSB VSS W9 T14 VCC VCCDDR K24
B2 VCCFSB VSS W10 T16 VCC VCCDDR K30
B8 VCCFSB VSS W14 T18 VCC VCCDDR L23
B14 VCCFSB VSS W16 U17 VCC VCCDDR M24
B20 VCCFSB VSS W18 U19 VCC VCCDDR M28
B26 VCCFSB VSS W20 V14 VCC VCCDDR N23
D3 VCCFSB VSS W24 V16 VCC VCCDDR P24
D D9 F29 V18 P26 D
VCCFSB VSS VCC VCCDDR
D15 VCCFSB VSS E30 W15 VCC VCCDDR P32
D21 VCCFSB VSS M27 W17 VCC VCCDDR R23
D27 VCCFSB VSS N24 W19 VCC VCCDDR T24
F4 VCCFSB VSS T26 P20 VCC VCCDDR T30
F10 VCCFSB VSS U25 T20 VCC VCCDDR U23
F16 VCCFSB VSS W27 V20 VCC VCCDDR V24
F22 VCCFSB VSS W30 Y14 VCC VCCDDR V28
H5 VCCFSB VSS W33 Y16 VCC VCCDDR W23
H11 VCCFSB VSS Y2 Y18 VCC VCCDDR Y24
H17 VCCFSB VSS Y5 Y20 VCC VCCDDR Y26
H23 VCCFSB VSS Y8 VCCDDR Y32
K10 VCCFSB VSS Y15 VCCDDR AA23
K12 B23 VCCAFSB P16 AB24
VCCFSB VSS VCCAHL VCCAFSB VCCDDR
K14 VCCFSB VSS B29 U15 VCCAHL VCCDDR AB30
K16 C1 +1_5V AC13
VCCFSB VSS VCCDDR
K18 VCCFSB VSS C4 VCCDDR AC15
K20 VCCFSB VSS C7 L2 VCCAGP VCCDDR AC17
K22 VCCFSB VSS C10 L8 VCCAGP VCCDDR AC19
L11 VCCFSB VSS C13 M4 VCCAGP VCCDDR AC21
L13 VCCFSB VSS C16 M10 VCCAGP VCCDDR AC23
L15 VCCFSB VSS C19 N6 VCCAGP VCCDDR AD12
L17 VCCFSB VSS C22 N11 VCCAGP VCCDDR AD14
L19 VCCFSB VSS C25 P10 VCCAGP VCCDDR AD16
L21 VCCFSB VSS C28 R11 VCCAGP VCCDDR AD18
VSS C31 T10 VCCAGP VCCDDR AD20
VSS D6 U2 VCCAGP VCCDDR AD22
A15 VSS VSS D12 U8 VCCAGP VCCDDR AD24
A18 VSS VSS D18 U11 VCCAGP VCCDDR AD28
A21 VSS VSS D24 V4 VCCAGP VCCDDR AF11
A24 VSS VSS D33 V10 VCCAGP VCCDDR AF17
A27 VSS VSS E2 W6 VCCAGP VCCDDR AF23
B5 E5 +1_2V AF32
VSS VSS VCCDDR
B11 VSS VSS E8 VCCDDR AH9
B17 VSS VSS E11 Y10 VCCHL VCCDDR AH15
AJ14 VSS VSS E14 AA11 VCCHL VCCDDR AH21
C C
AJ17 VSS VSS E17 AB6 VCCHL VCCDDR AH27
AJ20 VSS VSS E20 AB10 VCCHL VCCDDR AH30
AJ23 VSS VSS E23 AC2 VCCHL VCCDDR AK7
AJ26 VSS VSS E26 AC11 VCCHL VCCDDR AK13
AJ29 VSS VSS E29 AD4 VCCHL VCCDDR AK19
AJ32 VSS VSS E32 AD10 VCCHL VCCDDR AK25
AK1 VSS VSS F1 AE6 VCCHL VCCDDR AK31
AK4 VSS VSS F7 AG4 VCCHL VCCDDR AL32
AK10 VSS VSS F13 AJ2 VCCHL VCCDDR AM5
AK16 VSS VSS F19 VCCDDR AM11
AK22 VSS VSS AD17 VCCDDR AM17
AK28 VSS VSS AD19 VCCDDR AM23
AN17 VSS VSS AD21 VCCDDR AM29
AL3 VSS VSS AD23 VCCDDR AM31
AL6 VSS VSS AD31
AL9 AE3 MCH
VSS VSS
AL12 VSS VSS AE9
AL15 VSS VSS AE25
AL18 VSS VSS AE27
AL21 VSS VSS AE30
AL24 VSS VSS AE33
AL27 VSS VSS AF2
AL30 VSS VSS AF5
AL31 VSS VSS AF8
AL33 VSS VSS AF14
AM2 VSS VSS AF20
AM8 VSS VSS AF29
AM14 VSS VSS AG1
AM20 VSS VSS AG7
AM26 VSS VSS AG10
AM32 AG13 +1_2V
VSS VSS
AN4 VSS VSS AG16
AN7 VSS VSS AG19
AN10 VSS VSS AG22
AN13 VSS VSS AG25
AN16 VSS VSS AG28
B C1013 C998 C1006 C1014 C460 C437 C1017 C434 C436 C433 B
AN19 VSS VSS AG31
AN22 VSS VSS AH3
AN25 AH6 1u 1u 1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
VSS VSS
AN28 VSS VSS AH12
AN31 VSS VSS AH18
A12 VSS VSS AH24
A9 VSS VSS AH33
A6 VSS VSS AJ5
A3 VSS VSS AJ8
U16 VSS VSS AJ11
R14 AC12 SB2_5V
VSS VSS
G2 VSS
F25 VSS
F31 VSS
G3 VSS
G6 VSS
G9 VSS
G12 VSS
G15 VSS
G18 VSS
G21 VSS
G24 VSS
G27 VSS
G30 VSS
G33 VSS
H2 VSS
H8 VSS
H14 VSS
H20 VSS
H29 VSS
J1 VSS
J4 VSS
J7 VSS
J10 VSS
J13 VSS
J14 VSS
J15 VSS
J19 VSS
J22 VSS
J25 VSS
J28 VSS
J31 VSS
K3 VSS
K6 VSS
K9 VSS
K11 VSS
K13 VSS
K15 VSS
K17 VSS
AN6 VSS
AM21VSS
AJ16 VSS
AH26VSS
AH16VSS
AF28VSS
AA27VSS
Y25 VSS
Y19 VSS
Y23 VSS
Y29 VSS
AA1 VSS
AA4 VSS
AA7 VSS
AA10VSS
AA24VSS
AA28VSS
AA31VSS
AB3 VSS
AB9 VSS
AB11VSS
AB23VSS
AB27VSS
AB33VSS
AC5 VSS
AC8 VSS
AC10VSS
AC14VSS
AC16VSS
AC18VSS
AC20VSS
AC22VSS
AC26VSS
AC29VSS
AC32VSS
AD1 VSS
AD7 VSS
AD11VSS
AD13VSS
AD15VSS

MCH
C999 C393 C1012 C979 C1002 C997 C335 C1035 C294 C284

0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u

+1_2V

SB2_5V L21 100nH-TAN


VCC_CORE
BACKSIDE CAPS R292 1 VCCAHL

C483 C456
C501
C343 C322 C285 C1005 C978 C980 C357 C289 C288 C996 150u_SP 0.1u
C986 C297 C994 C1039 C478 +1_2V X_22u-1206
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u +2_5V SB2_5V
0.1u 0.1u 0.1u 0.1u 0.1u
A A
R949 X_1
+1_2V +1_5V
L20 100nH-TAN
R291 1 VCCAFSB

C455 C442
C449 C466 C684 C447 C448 C605 C608 C431 C459
Micro Star Restricted Secret
150u_SP 0.1u Title Rev
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u X_22u-1206 MCH_POWER&GND
Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


Wednesday, September 18, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 12 of 64
5 4 3 2 1
5 4 3 2 1

CHA_DQ[0..63] 11,15
SB2_5V SB2_5V

104
112
128
136
143
156
164
172
180

108
120
148
168

168
148
120
108

180
172
164
156
143
136
128
112
104
15
22
30
54
62
77
96

38
46
70
85

85
70
46
38

96
77
62
54
30
22
15
7

7
DIMM1 DIMM3
D D

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
11,15 CHA_MA[0..13] CHA_MA[0..13] 11,15
CHA_MA0 48 2 CHA_DQ0 CHA_DQ0 2 48 CHA_MA0
CHA_MA1 43 A0 D0 CHA_DQ1 CHA_DQ1 D0 A0 CHA_MA1
A1 D1 4 4 D1 A1 43
CHA_MA2 41 6 CHA_DQ2 CHA_DQ2 6 41 CHA_MA2
CHA_MA3 130 A2 D2 CHA_DQ3 CHA_DQ3 D2 A2 CHA_MA3
A3 D3 8 8 D3 A3 130
CHA_MA4 37 94 CHA_DQ4 CHA_DQ4 94 37 CHA_MA4
CHA_MA5 32 A4 D4 CHA_DQ5 CHA_DQ5 D4 A4 CHA_MA5
A5 D5 95 95 D5 A5 32
CHA_MA6 125 98 CHA_DQ6 CHA_DQ6 98 125 CHA_MA6
CHA_MA7 29 A6 D6 CHA_DQ7 CHA_DQ7 D6 A6 CHA_MA7
A7 D7 99 99 D7 A7 29
CHA_MA8 122 12 CHA_DQ8 CHA_DQ8 12 122 CHA_MA8
CHA_MA9 27 A8 D8 CHA_DQ9 CHA_DQ9 D8 A8 CHA_MA9
A9 D9 13 13 D9 A9 27
CHA_MA10 141 19 CHA_DQ10 CHA_DQ10 19 141 CHA_MA10
CHA_MA11 118 A10 D10 CHA_DQ11 CHA_DQ11 D10 A10 CHA_MA11
A11 D11 20 20 D11 A11 118
CHA_MA12 115 105 CHA_DQ12 CHA_DQ12 105 115 CHA_MA12
A12 D12 CHA_DQ13 CHA_DQ13 D12 A12
11,15 CHA_BA[0..1] 103 A13 D13 106 106 D13 A13 103 CHA_BA[0..1] 11,15
109 CHA_DQ14 CHA_DQ14 109
CHA_BA0 D14 CHA_DQ15 CHA_DQ15 D14 CHA_BA0
59 BA0 D15 110 110 D15 BA0 59
CHA_BA1 52 23 CHA_DQ16 CHA_DQ16 23 52 CHA_BA1
BA1 D16 CHA_DQ17 CHA_DQ17 D16 BA1
113 BA2 D17 24 24 D17 BA2 113
28 CHA_DQ18 CHA_DQ18 28
D18 CHA_DQ19 CHA_DQ19 D18
11,15 CHA_CS_L0 157 CS0 D19 31 31 D19 CS0 157 CHA_CS_L2 11,15
158 114 CHA_DQ20 CHA_DQ20 114 158
11,15 CHA_CS_L1 CS1 D20 D20 CS1 CHA_CS_L3 11,15
71 117 CHA_DQ21 CHA_DQ21 117 71
NC/CS2 D21 CHA_DQ22 CHA_DQ22 D21 NC/CS2
163 NC/CS3 D22 121 121 D22 NC/CS3 163
123 CHA_DQ23 CHA_DQ23 123
CHA_DQS9 D23 CHA_DQ24 CHA_DQ24 D23 CHA_DQS9
C
97 DQM0/DQS9 D24 33 33 D24 DQM0/DQS9 97 C
CHA_DQS10 107 35 CHA_DQ25 CHA_DQ25 35 107 CHA_DQS10
CHA_DQS11 DQM1/DQS10 D25 CHA_DQ26 CHA_DQ26 D25 DQM1/DQS10 CHA_DQS11
119 DQM2/DQS11 D26 39 39 D26 DQM2/DQS11 119
CHA_DQS12 129 40 CHA_DQ27 CHA_DQ27 40 129 CHA_DQS12
CHA_DQS13 DQM3/DQS12 D27 CHA_DQ28 CHA_DQ28 D27 DQM3/DQS12 CHA_DQS13
149 DQM4/DQS13 D28 126 126 D28 DQM4/DQS13 149
CHA_DQS14 159 127 CHA_DQ29 CHA_DQ29 127 159 CHA_DQS14
CHA_DQS15 DQM5/DQS14 D29 CHA_DQ30 CHA_DQ30 D29 DQM5/DQS14 CHA_DQS15
169 DQM6/DQS15 D30 131 131 D30 DQM6/DQS15 169
CHA_DQS16 177 133 CHA_DQ31 CHA_DQ31 133 177 CHA_DQS16
CHA_DQS17 DQM7/DQS16 D31 CHA_DQ32 CHA_DQ32 D31 DQM7/DQS16 CHA_DQS17
140 DQM8/DQS17 D32 53 53 D32 DQM8/DQS17 140
55 CHA_DQ33 CHA_DQ33 55
D33 CHA_DQ34 CHA_DQ34 D33
11,15 CHA_WE_L 63 WE D34 57 57 D34 WE 63 CHA_WE_L 11,15
65 60 CHA_DQ35 CHA_DQ35 60 65
11,15 CHA_CAS_L CAS D35 D35 CAS CHA_CAS_L 11,15
154 146 CHA_DQ36 CHA_DQ36 146 154
11,15 CHA_RAS_L RAS D36 D36 RAS CHA_RAS_L 11,15
147 CHA_DQ37 CHA_DQ37 147
D37 CHA_DQ38 CHA_DQ38 D37
11,15 CHA_CKE0 21 CKE0 D38 150 150 D38 CKE0 21 CHA_CKE2 11,15
111 151 CHA_DQ39 CHA_DQ39 151 111
11,15 CHA_CKE1 CKE1 D39 D39 CKE1 CHA_CKE3 11,15
61 CHA_DQ40 CHA_DQ40 61
D40 CHA_DQ41 CHA_DQ41 D40
11 CHA_CMDCLK4 16 CK0/DNU D41 64 64 D41 CK0/DNU 16 CHA_CMDCLK5 11
17 68 CHA_DQ42 CHA_DQ42 68 17
11 CHA_CMDCLK4_L CK0/DNU D42 D42 CK0/DNU CHA_CMDCLK5_L 11
137 69 CHA_DQ43 CHA_DQ43 69 137
11 CHA_CMDCLK0 CK1 D43 D43 CK1 CHA_CMDCLK1 11
138 153 CHA_DQ44 CHA_DQ44 153 138
11 CHA_CMDCLK0_L CK1 D44 D44 CK1 CHA_CMDCLK1_L 11
76 155 CHA_DQ45 CHA_DQ45 155 76
11 CHA_CMDCLK6 CK2/DNU D45 D45 CK2/DNU CHA_CMDCLK7 11
75 161 CHA_DQ46 CHA_DQ46 161 75
11,15 CHA_DQS[0..17] 11 CHA_CMDCLK6_L CK2/DNU D46 D46 CK2/DNU CHA_CMDCLK7_L 11 CHA_DQS[0..17] 11,15
162 CHA_DQ47 CHA_DQ47 162
CHA_DQS0 D47 CHA_DQ48 CHA_DQ48 D47 CHA_DQS0
5 DQS0 D48 72 72 D48 DQS0 5
CHA_DQS1 14 73 CHA_DQ49 CHA_DQ49 73 14 CHA_DQS1
CHA_DQS2 DQS1 D49 CHA_DQ50 CHA_DQ50 D49 DQS1 CHA_DQS2
25 DQS2 D50 79 79 D50 DQS2 25
B CHA_DQS3 36 80 CHA_DQ51 CHA_DQ51 80 36 CHA_DQS3 B
CHA_DQS4 DQS3 D51 CHA_DQ52 CHA_DQ52 D51 DQS3 CHA_DQS4
56 DQS4 D52 165 165 D52 DQS4 56
CHA_DQS5 67 166 CHA_DQ53 CHA_DQ53 166 67 CHA_DQS5
CHA_DQS6 DQS5 D53 CHA_DQ54 CHA_DQ54 D53 DQS5 CHA_DQS6
78 DQS6 D54 170 170 D54 DQS6 78
CHA_DQS7 86 171 CHA_DQ55 CHA_DQ55 171 86 CHA_DQS7
CHA_DQS8 DQS7 D55 CHA_DQ56 CHA_DQ56 D55 DQS7 CHA_DQS8
47 DQS8 D56 83 83 D56 DQS8 47
84 CHA_DQ57 CHA_DQ57 84
D57 CHA_DQ58 CHA_DQ58 D57
14,55 SMBUS_PAR3_DATA 91 SDA D58 87 87 D58 SDA 91 SMBUS_PAR3_DATA 14,55
92 88 CHA_DQ59 CHA_DQ59 88 92
14,55 SMBUS_PAR3_CLK SCL D59 D59 SCL SMBUS_PAR3_CLK 14,55
174 CHA_DQ60 CHA_DQ60 174 +3_3V
D60 CHA_DQ61 CHA_DQ61 D60
181 SA0 D61 175 175 D61 SA0 181
C85 182 178 CHA_DQ62 CHA_DQ62 178 182
SA1 D62 CHA_DQ63 CHA_DQ63 D62 SA1
183 SA2 D63 179 179 D63 SA2 183
0.1u
1 44 CHA_CB0 CHA_CB0 44 1 C90
+3_3V VREF CB0 CHA_CB1 CHA_CB1 CB0 VREF +3_3V
82 VDDID CB1 45 45 CB1 VDDID 82
184 49 CHA_CB2 CHA_CB2 49 184 0.1u
11,16 CHA_VREF VDDSPD CB2 CB2 VDDSPD
51 CHA_CB3 CHA_CB3 51
CB3 CHA_CB4 CHA_CB4 CB3
9 NC CB4 134 134 CB4 NC 9 CHA_VREF 11,16
DIMMRST_L 10 135 CHA_CB5 CHA_CB5 135 10 DIMMRST_L
14,60 DIMMRST_L NC CB5 CB5 NC
101 142 CHA_CB6 CHA_CB6 142 101
NC CB6 CHA_CB7 CHA_CB7 CB6 NC
102 NC CB7 144 144 CB7 NC 102
173 NC NC 173
CHA_MA13 167 90 90 167 CHA_MA13
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC/FETEN WP WP NC/FETEN +2_5V SB2_5V

DIMM-D184-A-S1 DIMM-D184-A-S1
100
116
124
132
139
145
152
160
176

176
160
152
145
139
132
124
116
100
CHA_CB[0..7] 11,15
11
18
26
34
42
50
58
66
74
81
89
93

93
89
81
74
66
58
50
42
34
26
18
11
A A
3

3
SB2_5V

R271 4.7K +3_3V


Micro Star Restricted Secret
Title Rev
DDR CHA DIMMS
4.7K +3_3V Document Number 00E
C977 C981 C982 C983 C1055 C1048 SMBus R267 SMBus
X_1u-0805 X_1u-0805 X_1u-0805 X_1u-0805 X_1u-0805 X_1u-0805 MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Addr=A0 Addr=A4 Monday, September 09, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 13 of 64
5 4 3 2 1
5 4 3 2 1

CHB_DQ[0..63] 11,15
SB2_5V SB2_5V

104
112
128
136
143
156
164
172
180

108
120
148
168

168
148
120
108

180
172
164
156
143
136
128
112
104
15
22
30
54
62
77
96

38
46
70
85

85
70
46
38

96
77
62
54
30
22
15
7

7
DIMM2 DIMM4
D D
11,15 CHB_MA[0..13] CHB_MA[0..13] 11,15

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
CHB_MA0 48 2 CHB_DQ0 CHB_DQ0 2 48 CHB_MA0
CHB_MA1 43 A0 D0 CHB_DQ1 CHB_DQ1 D0 A0 CHB_MA1
A1 D1 4 4 D1 A1 43
CHB_MA2 41 6 CHB_DQ2 CHB_DQ2 6 41 CHB_MA2
CHB_MA3 130 A2 D2 CHB_DQ3 CHB_DQ3 D2 A2 CHB_MA3
A3 D3 8 8 D3 A3 130
CHB_MA4 37 94 CHB_DQ4 CHB_DQ4 94 37 CHB_MA4
CHB_MA5 32 A4 D4 CHB_DQ5 CHB_DQ5 D4 A4 CHB_MA5
A5 D5 95 95 D5 A5 32
CHB_MA6 125 98 CHB_DQ6 CHB_DQ6 98 125 CHB_MA6
CHB_MA7 29 A6 D6 CHB_DQ7 CHB_DQ7 D6 A6 CHB_MA7
A7 D7 99 99 D7 A7 29
CHB_MA8 122 12 CHB_DQ8 CHB_DQ8 12 122 CHB_MA8
CHB_MA9 27 A8 D8 CHB_DQ9 CHB_DQ9 D8 A8 CHB_MA9
A9 D9 13 13 D9 A9 27
CHB_MA10 141 19 CHB_DQ10 CHB_DQ10 19 141 CHB_MA10
CHB_MA11 118 A10 D10 CHB_DQ11 CHB_DQ11 D10 A10 CHB_MA11
A11 D11 20 20 D11 A11 118
CHB_MA12 115 105 CHB_DQ12 CHB_DQ12 105 115 CHB_MA12
A12 D12 CHB_DQ13 CHB_DQ13 D12 A12
11,15 CHB_BA[0..1] 103 A13 D13 106 106 D13 A13 103 CHB_BA[0..1] 11,15
109 CHB_DQ14 CHB_DQ14 109
CHB_BA0 D14 CHB_DQ15 CHB_DQ15 D14 CHB_BA0
59 BA0 D15 110 110 D15 BA0 59
CHB_BA1 52 23 CHB_DQ16 CHB_DQ16 23 52 CHB_BA1
BA1 D16 CHB_DQ17 CHB_DQ17 D16 BA1
113 BA2 D17 24 24 D17 BA2 113
28 CHB_DQ18 CHB_DQ18 28
D18 CHB_DQ19 CHB_DQ19 D18
11,15 CHB_CS_L0 157 CS0 D19 31 31 D19 CS0 157 CHB_CS_L2 11,15
158 114 CHB_DQ20 CHB_DQ20 114 158
11,15 CHB_CS_L1 CS1 D20 D20 CS1 CHB_CS_L3 11,15
71 117 CHB_DQ21 CHB_DQ21 117 71
NC/CS2 D21 CHB_DQ22 CHB_DQ22 D21 NC/CS2
163 NC/CS3 D22 121 121 D22 NC/CS3 163
123 CHB_DQ23 CHB_DQ23 123
CHB_DQS9 D23 CHB_DQ24 CHB_DQ24 D23 CHB_DQS9
C
97 DQM0/DQS9 D24 33 33 D24 DQM0/DQS9 97 C
CHB_DQS10 107 35 CHB_DQ25 CHB_DQ25 35 107 CHB_DQS10
CHB_DQS11 DQM1/DQS10 D25 CHB_DQ26 CHB_DQ26 D25 DQM1/DQS10 CHB_DQS11
119 DQM2/DQS11 D26 39 39 D26 DQM2/DQS11 119
CHB_DQS12 129 40 CHB_DQ27 CHB_DQ27 40 129 CHB_DQS12
CHB_DQS13 DQM3/DQS12 D27 CHB_DQ28 CHB_DQ28 D27 DQM3/DQS12 CHB_DQS13
149 DQM4/DQS13 D28 126 126 D28 DQM4/DQS13 149
CHB_DQS14 159 127 CHB_DQ29 CHB_DQ29 127 159 CHB_DQS14
CHB_DQS15 DQM5/DQS14 D29 CHB_DQ30 CHB_DQ30 D29 DQM5/DQS14 CHB_DQS15
169 DQM6/DQS15 D30 131 131 D30 DQM6/DQS15 169
CHB_DQS16 177 133 CHB_DQ31 CHB_DQ31 133 177 CHB_DQS16
CHB_DQS17 DQM7/DQS16 D31 CHB_DQ32 CHB_DQ32 D31 DQM7/DQS16 CHB_DQS17
140 DQM8/DQS17 D32 53 53 D32 DQM8/DQS17 140
55 CHB_DQ33 CHB_DQ33 55
D33 CHB_DQ34 CHB_DQ34 D33
11,15 CHB_WE_L 63 WE D34 57 57 D34 WE 63 CHB_WE_L 11,15
65 60 CHB_DQ35 CHB_DQ35 60 65
11,15 CHB_CAS_L CAS D35 D35 CAS CHB_CAS_L 11,15
154 146 CHB_DQ36 CHB_DQ36 146 154
11,15 CHB_RAS_L RAS D36 D36 RAS CHB_RAS_L 11,15
147 CHB_DQ37 CHB_DQ37 147
D37 CHB_DQ38 CHB_DQ38 D37
11,15 CHB_CKE0 21 CKE0 D38 150 150 D38 CKE0 21 CHB_CKE2 11,15
111 151 CHB_DQ39 CHB_DQ39 151 111
11,15 CHB_CKE1 CKE1 D39 D39 CKE1 CHB_CKE3 11,15
61 CHB_DQ40 CHB_DQ40 61
D40 CHB_DQ41 CHB_DQ41 D40
11 CHB_CMDCLK4 16 CK0/DNU D41 64 64 D41 CK0/DNU 16 CHB_CMDCLK5 11
17 68 CHB_DQ42 CHB_DQ42 68 17
11 CHB_CMDCLK4_L CK0/DNU D42 D42 CK0/DNU CHB_CMDCLK5_L 11
137 69 CHB_DQ43 CHB_DQ43 69 137
11 CHB_CMDCLK0 CK1 D43 D43 CK1 CHB_CMDCLK1 11
138 153 CHB_DQ44 CHB_DQ44 153 138
11 CHB_CMDCLK0_L CK1 D44 D44 CK1 CHB_CMDCLK1_L 11
76 155 CHB_DQ45 CHB_DQ45 155 76
11 CHB_CMDCLK6 CK2/DNU D45 D45 CK2/DNU CHB_CMDCLK7 11
75 161 CHB_DQ46 CHB_DQ46 161 75
11,15 CHB_DQS[0..17] 11 CHB_CMDCLK6_L CK2/DNU D46 D46 CK2/DNU CHB_CMDCLK7_L 11 CHB_DQS[0..17] 11,15
162 CHB_DQ47 CHB_DQ47 162
CHB_DQS0 D47 CHB_DQ48 CHB_DQ48 D47 CHB_DQS0
5 DQS0 D48 72 72 D48 DQS0 5
CHB_DQS1 14 73 CHB_DQ49 CHB_DQ49 73 14 CHB_DQS1
CHB_DQS2 DQS1 D49 CHB_DQ50 CHB_DQ50 D49 DQS1 CHB_DQS2
25 DQS2 D50 79 79 D50 DQS2 25
B CHB_DQS3 36 80 CHB_DQ51 CHB_DQ51 80 36 CHB_DQS3 B
CHB_DQS4 DQS3 D51 CHB_DQ52 CHB_DQ52 D51 DQS3 CHB_DQS4
56 DQS4 D52 165 165 D52 DQS4 56
CHB_DQS5 67 166 CHB_DQ53 CHB_DQ53 166 67 CHB_DQS5
CHB_DQS6 DQS5 D53 CHB_DQ54 CHB_DQ54 D53 DQS5 CHB_DQS6
78 DQS6 D54 170 170 D54 DQS6 78
CHB_DQS7 86 171 CHB_DQ55 CHB_DQ55 171 86 CHB_DQS7
CHB_DQS8 DQS7 D55 CHB_DQ56 CHB_DQ56 D55 DQS7 CHB_DQS8
47 DQS8 D56 83 83 D56 DQS8 47
84 CHB_DQ57 CHB_DQ57 84
D57 CHB_DQ58 CHB_DQ58 D57
13,55 SMBUS_PAR3_DATA 91 SDA D58 87 87 D58 SDA 91 SMBUS_PAR3_DATA 13,55
92 88 CHB_DQ59 CHB_DQ59 88 92 +3_3V
13,55 SMBUS_PAR3_CLK SCL D59 D59 SCL SMBUS_PAR3_CLK 13,55
174 CHB_DQ60 CHB_DQ60 174
+3_3V D60 CHB_DQ61 CHB_DQ61 D60
181 SA0 D61 175 175 D61 SA0 181
C80 182 178 CHB_DQ62 CHB_DQ62 178 182
SA1 D62 CHB_DQ63 CHB_DQ63 D62 SA1
183 SA2 D63 179 179 D63 SA2 183
0.1u
1 44 CHB_CB0 CHB_CB0 44 1 C99
+3_3V VREF CB0 CHB_CB1 CHB_CB1 CB0 VREF +3_3V
82 VDDID CB1 45 45 CB1 VDDID 82
184 49 CHB_CB2 CHB_CB2 49 184 0.1u
11,16 CHB_VREF VDDSPD CB2 CB2 VDDSPD
51 CHB_CB3 CHB_CB3 51
CB3 CHB_CB4 CHB_CB4 CB3
9 NC CB4 134 134 CB4 NC 9 CHB_VREF 11,16
DIMMRST_L 10 135 CHB_CB5 CHB_CB5 135 10 DIMMRST_L
13,60 DIMMRST_L NC CB5 CB5 NC
101 142 CHB_CB6 CHB_CB6 142 101
NC CB6 CHB_CB7 CHB_CB7 CB6 NC
102 NC CB7 144 144 CB7 NC 102
173 NC NC 173
CHB_MA13 167 90 90 167 CHB_MA13
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC/FETEN WP WP NC/FETEN +2_5V SB2_5V

DIMM-D184-A-S1 DIMM-D184-A-S1
100
116
124
132
139
145
152
160
176

176
160
152
145
139
132
124
116
100
CHB_CB[0..7] 11,15
11
18
26
34
42
50
58
66
74
81
89
93

93
89
81
74
66
58
50
42
34
26
18
11
A A
SB2_5V
3

3
Micro Star Restricted Secret
4.7K +3_3V Title Rev
R272 DDR CHB DIMMS
C1049 C963 C958 C959 C960 C1047 SMBus Document Number 00E
X_1u-0805 X_1u-0805 X_1u-0805 X_1u-0805 X_1u-0805 X_1u-0805 4.7K +3_3V SMBus
Addr=A2 R277 MICRO-STAR INT'L CO.,LTD. Last Revision Date:
Addr=A6 Monday, September 09, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 14 of 64
5 4 3 2 1
5 4 3 2 1

+1_25V +1_25V +1_25V +1_25V +1_25V +1_25V

RN3 C100 RN45 C1028 RN1 C191 RN44 C333 RN11 C159 RN13 C991
11,13 CHA_DQ1 1 2 11,13 CHA_DQ33 1 2 11,14 CHB_DQ0 1 2 11,14 CHB_DQ37 1 2 11,13 CHA_CKE3 1 2 11,14 CHB_CKE0 1 2
3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u
11,13 CHA_DQ5 11,13 CHA_DQ37 11,14 CHB_DQ4 11,14 CHB_DQ33 11,14 CHB_CKE3 11,13 CHA_CKE0
5 6 C86 5 6 C295 5 6 C375 5 6 C256 5 6 C201 5 6 C120
11,13 CHA_DQ0 11,13 CHA_DQS13 11,14 CHB_DQ5 11,14 CHB_DQS13 11,13 CHA_CKE2 11,14 CHB_CKE1
11,13 CHA_DQ4 7 8 11,13 CHA_DQS4 7 8 11,14 CHB_DQ1 7 8 11,14 CHB_DQS4 7 8 11,14 CHB_CKE2 7 8 11,13 CHA_CKE1 7 8
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
39 39 39 39 47 47
RN2 C106 RN46 C352 RN4 C348 RN47 C190 RN53 C327 RN54 C210
D
11,13 CHA_DQS0 1 2 11,13 CHA_DQ34 7 8 11,14 CHB_DQS0 1 2 11,14 CHB_DQ34 1 2 11,14 CHB_CS_L1 1 2 11,14 CHB_CS_L2 1 2 D
3 4 0.1u 5 6 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u
11,13 CHA_DQS9 11,13 CHA_DQ38 11,14 CHB_DQS9 11,14 CHB_DQ38 11,13 CHA_CS_L1 11,13 CHA_CS_L2
5 6 C204 3 4 C283 5 6 C220 5 6 C206 5 6 C227 5 6 C131
11,13 CHA_DQ2 11,13 CHA_DQ39 11,14 CHB_DQ2 11,14 CHB_DQ39 11,13 CHA_CS_L0 11,13 CHA_CS_L3
11,13 CHA_DQ6 7 8 11,13 CHA_DQ35 1 2 11,14 CHB_DQ6 7 8 11,14 CHB_DQ35 7 8 11,14 CHB_CS_L0 7 8 11,14 CHB_CS_L3 7 8
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
39 39 39 39 47 47
RN6 C104 RN48 C281 RN5 C374 RN49 C166 RN16 C1029 RN17 C168
11,13 CHA_DQ9 1 2 11,13 CHA_DQ40 1 2 11,14 CHB_DQ7 1 2 11,14 CHB_DQ40 1 2 11,13 CHA_MA12 7 8 11,14 CHB_MA12 1 2
3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 5 6 0.1u 3 4 0.1u
11,13 CHA_DQ12 11,13 CHA_DQ44 11,14 CHB_DQ3 11,14 CHB_DQ44 11,13 CHA_MA11 11,14 CHB_MA11
5 6 C102 5 6 C137 5 6 C416 5 6 C189 3 4 C302 5 6 C155
11,13 CHA_DQ7 11,13 CHA_DQ45 11,14 CHB_DQ9 11,14 CHB_DQ45 11,13 CHA_MA9 11,14 CHB_MA9
11,13 CHA_DQ3 7 8 11,13 CHA_DQ41 7 8 11,14 CHB_DQ8 7 8 11,14 CHB_DQ41 7 8 11,13 CHA_MA7 1 2 11,14 CHB_MA7 7 8
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
39 39 39 39 47 47
RN9 C252 RN52 C149 RN7 C268 RN56 C356 RN20 C188 RN21 C221
11,13 CHA_DQS10 1 2 11,13 CHA_DQS5 1 2 11,14 CHB_DQ12 1 2 11,14 CHB_DQS5 1 2 11,13 CHA_MA8 1 2 11,14 CHB_MA8 1 2
3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u
11,13 CHA_DQ13 11,13 CHA_DQS14 11,14 CHB_DQ13 11,14 CHB_DQS14 11,13 CHA_MA5 11,14 CHB_MA5
5 6 C263 5 6 C1042 5 6 C340 5 6 C411 5 6 C1001 5 6 C196
11,13 CHA_DQS1 11,13 CHA_DQ42 11,14 CHB_DQS1 11,14 CHB_DQ42 11,13 CHA_MA6 11,14 CHB_MA6
11,13 CHA_DQ8 7 8 11,13 CHA_DQ43 7 8 11,14 CHB_DQS10 7 8 11,14 CHB_DQ46 7 8 7 8 11,14 CHB_MA4 7 8
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
39 39 39 39 47 47
RN8 C198 RN55 C208 RN10 C280 RN58 C205 RN25 C89 RN31 C88
11,13 CHA_DQ14 1 2 11,13 CHA_DQ46 1 2 11,14 CHB_DQ14 1 2 11,14 CHB_DQ43 1 2 11,13 CHA_MA1 1 2 11,14 CHB_MA3 1 2
3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u
11,13 CHA_DQ15 11,13 CHA_DQ47 11,14 CHB_DQ15 11,14 CHB_DQ47 11,13 CHA_MA2 11,14 CHB_MA2
5 6 C200 5 6 C214 5 6 C217 5 6 C112 5 6 C195 5 6 C260
11,13 CHA_DQ10 11,13 CHA_DQ48 11,14 CHB_DQ10 11,14 CHB_DQ52 11,13 CHA_MA3 11,14 CHB_MA1
C 11,13 CHA_DQ11 7 8 11,13 CHA_DQ49 7 8 11,14 CHB_DQ11 7 8 11,14 CHB_DQ48 7 8 11,13 CHA_MA4 7 8 7 8 C
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
39 39 39 39 47 47
RN12 C1015 RN57 C70 RN14 C259 RN60 C93 RN38 C132 RN41 C984
11,13 CHA_DQ20 1 2 11,13 CHA_DQS6 1 2 11,14 CHB_DQ20 1 2 11,14 CHB_DQ53 1 2 11,13 CHA_BA1 1 2 11,14 CHB_MA0 1 2
3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u
11,13 CHA_DQ16 11,13 CHA_DQS15 11,14 CHB_DQ16 11,14 CHB_DQ49 11,13 CHA_MA10 11,14 CHB_MA10
5 6 C1008 5 6 C1016 5 6 C319 5 6 C278 5 6 C226 5 6 C153
11,13 CHA_DQ17 11,13 CHA_DQ53 11,14 CHB_DQ17 11,14 CHB_DQS15 11,13 CHA_MA0 11,14 CHB_BA1
11,13 CHA_DQ21 7 8 11,13 CHA_DQ52 7 8 11,14 CHB_DQ21 7 8 11,14 CHB_DQ54 7 8 7 8 7 8
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
39 39 39 39 47 47
RN15 C1000 RN59 C248 RN18 C330 RN62 C419 RN50 C134 RN51 C310
11,13 CHA_DQS2 1 2 11,13 CHA_DQ54 1 2 11,14 CHB_DQS2 1 2 11,14 CHB_DQS6 1 2 11,13 CHA_BA0 7 8 11,14 CHB_BA0 1 2
3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u 5 6 0.1u 3 4 0.1u
11,13 CHA_DQS11 11,13 CHA_DQ50 11,14 CHB_DQS11 11,14 CHB_DQ50 11,13 CHA_RAS_L 11,14 CHB_RAS_L
5 6 C421 5 6 C1024 5 6 C341 5 6 C1007 3 4 C254 5 6 C992
11,13 CHA_DQ18 11,13 CHA_DQ55 11,14 CHB_DQ18 11,14 CHB_DQ55 11,13 CHA_WE_L 11,14 CHB_WE_L
11,13 CHA_DQ22 7 8 11,13 CHA_DQ51 7 8 11,14 CHB_DQ22 7 8 11,14 CHB_DQ51 7 8 11,13 CHA_CAS_L 1 2 11,14 CHB_CAS_L 7 8
0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
39 39 39 39 47 47
RN19 C170 RN61 C987 RN23 C342 RN64 C345 C299 C1025
7 8 1 2 7 8 1 2 47 R249 47 R250
11,13 CHA_DQ19 11,13 CHA_DQ57 11,14 CHB_DQ23 11,14 CHB_DQ61 11,13 CHA_MA13 11,14 CHB_MA13
5 6 0.1u 3 4 0.1u 5 6 0.1u 3 4 0.1u 0.1u 0.1u
11,13 CHA_DQ23 11,13 CHA_DQ56 11,14 CHB_DQ19 11,14 CHB_DQ56
3 4 C174 5 6 C212 3 4 C257 5 6 C444
11,13 CHA_DQ24 11,13 CHA_DQ61 11,14 CHB_DQ24 11,14 CHB_DQ60
11,13 CHA_DQ28 1 2 11,13 CHA_DQ60 7 8 11,14 CHB_DQ28 1 2 11,14 CHB_DQ57 7 8
0.1u 0.1u 0.1u 0.1u
39 39 39 39
RN24 C107 RN63 C458 RN28 C423 RN65 C224
B
11,13 CHA_DQ25 1 2 11,13 CHA_DQS16 1 2 11,14 CHB_DQ29 1 2 11,14 CHB_DQS7 1 2 B
3 4 0.1u 3 4 0.1u 3 4 0.1u 3 4 0.1u
11,13 CHA_DQ29 11,13 CHA_DQ62 11,14 CHB_DQ25 11,14 CHB_DQS16
5 6 C237 5 6 C406 5 6 C1037 5 6 C282
11,13 CHA_DQS3 11,13 CHA_DQS7 11,14 CHB_DQS12 11,14 CHB_DQ62
11,13 CHA_DQS12 7 8 11,13 CHA_DQ58 7 8 11,14 CHB_DQS3 7 8 11,14 CHB_DQ58 7 8
0.1u 0.1u 0.1u 0.1u
39 39 39 39
RN32 C985 RN36 C402
1 2 39 R262 1 2 39 R289
11,13 CHA_DQ26 11,13 CHA_DQ63 11,14 CHB_DQ27 11,14 CHB_DQ63
3 4 0.1u 3 4 0.1u
11,13 CHA_DQ30 11,14 CHB_DQ31
5 6 C145 C390 5 6 C117 C338
11,13 CHA_DQ27 11,14 CHB_DQ26
7 8 39 R261 7 8 39 R263
11,13 CHA_DQ31 11,13 CHA_DQ59 11,14 CHB_DQ30 11,14 CHB_DQ59
0.1u 0.1u 0.1u 0.1u
39 39
RN33 C1038 RN39 C369
11,13 CHA_CB4 7 8 11,14 CHB_CB4 1 2
5 6 0.1u 3 4 0.1u
11,13 CHA_CB5 11,14 CHB_CB5
3 4 C216 5 6 C209
11,13 CHA_CB0 11,14 CHB_CB1
11,13 CHA_CB1 1 2 11,14 CHB_CB0 7 8
0.1u 0.1u
39 39
RN37 C1043 RN40 C194
11,13 CHA_DQS8 1 2 11,14 CHB_DQS17 1 2
3 4 0.1u 3 4 0.1u
11,13 CHA_DQS17 11,14 CHB_DQS8
5 6 C258 5 6 C312
11,13 CHA_CB2 11,14 CHB_CB2
A 11,13 CHA_CB6 7 8 11,14 CHB_CB6 7 8 A
0.1u 0.1u
39 39
RN42 C279 RN43 C332
Micro Star Restricted Secret
7 8 1 2 Title Rev
11,13 CHA_CB3 11,14 CHB_CB3
5 6 0.1u 3 4 0.1u DDR CHA&CHB PARALLEL TERM
11,13 CHA_CB7 11,14 CHB_CB7
3 4 C988 5 6 C334 Document Number 00E
11,13 CHA_DQ32 11,14 CHB_DQ32
11,13 CHA_DQ36 1 2 11,14 CHB_DQ36 7 8
0.1u 0.1u MICRO-STAR INT'L CO.,LTD. Last Revision Date:
39 39 Monday, September 09, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 15 of 64
5 4 3 2 1
5 4 3 2 1

SB2_5V
SB2_5V
SB2_5V PLACE ALL RCVENOUT SB2_5V
PLACE DDR VREF VOLTAGE DIVIDER TERMINATION CIRCUITS
D
R57
WITHIN 1" OF THE CHA DIMMS PLACE THIS CIRCUIT D
NEAR DDR MCH R166
CLOSE TO MCH
R179 R186

49.9-1%
49.9-1%
CHA_VREF 11,13
78.7-1% 78.7-1%
DRCOMPVREF_H 11
20 mil CHA_RCVENOUT_L 11 CHB_RCVENOUT_L 11
R58 C82 20 mil
6 mil 6 mil R170 C290
1u R168 R169
1000p
49.9-1%
49.9-1%
78.7-1% 78.7-1%

SB2_5V
RCVENOUT TERMINATION
COMPENSATION VREFS
C PLACE DDR VREF VOLTAGE DIVIDER C
R63
WITHIN 1" OF THE CHB DIMMS
SB2_5V
49.9-1%
CHB_VREF 11,14
PLACE THIS CIRCUIT
20 mil R180
CLOSE TO MCH
R65 C84

1u
PLACE 2 DECOUPLING 49.9-1%
49.9-1%
CAPS PER VTT PLANE. DRCOMPVREF_V 11
+1_25V (ONE AT EACH END) 20 mil
R171 C291

1000p
CHANNEL VREFS
49.9-1%
C68 C463 C66 C65 C445 C443
B B
4.7u-1206 4.7u-1206 4.7u-1206 4.7u-1206 4.7u-1206 4.7u-1206

+2_5V SB2_5V

A Micro Star Restricted Secret A

Title Rev
DDR VREFS&DECOUPLING
Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


Monday, September 09, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 16 of 64
5 4 3 2 1
5 4 3 2 1

+1_5V +5V +3_3V +3_3V +12V +1_5V


AGP1
D1 VCC3_3_J VCC3_3_A C1
D2 VCC3_3_K GND_A C2
D3 VCC3_3_L VCC3_3_B C3
D4 VCC3_3_M GND_B C4
D5 VCC3_3_N GND_C C5
D6 C6 AGP_INTBJ
VCC3_3_O GND_D +3_3V PIRQA_L 19
D7 C7 R426 8.2K
VCC3_3_P GND_E
PRN1 PRN2 D8 VCC3_3_Q GND_F C8
D 21 AGP_PRNT_2 D9 PRSNT#2 RESV_A C9 D
GND OPEN 50W 21 AGP_PRNT_1 D10 PRSNT#1 RESV_B C10 +3_3V
AGP_INTAJ
PIRQB_L 19
R427 8.2K
GND GND 110W
KEY

B1 AGP_OVRCNT# VCC_12V_A A1
B2 5V_A TYPEDET# A2
B3 5V_B RESV_C A3 AGP_GC_8XDET_L 18
B4 AGP_USB+ AGP_USB- A4
B5 A5 +12V +1_5V
AGP_INTBJ GND_Q GND_G AGP_INTAJ
B6 INTB# INTA# A6
8 AGP_66MHZ_CLK B7 AGPCLK_CONN RST# A7 AGP_RST_L 60
B8 A8 R383 R361 R344
10 AGP_REQ REQ# GNT# AGP_GNT 10
B9 VCC3_3_R VCC3_3_E A9
AGP_ST0 B10 A10 AGP_ST1 10K 2.2k 10K
AGP_ST2 ST0 ST1
B11 ST2 RESV_D A11
B12 A12 AGP_PERR
10 AGP_RBF RBF# PIPE# AGP_DBI_HI 10
B13 GND_R GND_H A13

D
B14 A14 Q45 C Q42
10 AGP_DBI_LO RESV_L WBF# AGP_WBF 10
AGP_SBA_L0 B15 A15 AGP_SBA_L1 B
AGP_AD31 SBA0 SBA1
B16 VCC3_3_S VCC3_3_F A16 G E
AGP_AD30 AGP_SBA_L2 B17 A17 AGP_SBA_L3
AGP_AD29 SBA2 SBA3 2N7002S MMBT3904

S
10 AGP_SBSTBF B18 SB_STB SB_STB# A18 AGP_SBSTBS 10
AGP_AD28 B19 A19
AGP_AD27 AGP_SBA_L4 GND_S GND_I AGP_SBA_L5 R345
B20 SBA4 SBA5 A20
AGP_AD26 AGP_SBA_L6 B21 A21 AGP_SBA_L7
AGP_AD25 3VDUAL SBA6 SBA7
B22 RESV_M RESV_E A22
C AGP_AD24 B23 A23 C
AGP_AD23 GND_T GND_J 10K R341
B24 3_3AUX_1 RESV_F A24
AGP_AD22 B25 A25
AGP_AD21 AGP_AD31 VCC3_3_T VCC3_3_G AGP_AD30 100
B26 GAD31 GAD30 A26
AGP_AD20 AGP_AD29 B27 A27 AGP_AD28 +1_5V
AGP_AD19 GAD29 GAD28
B28 VCC3_3_U VCC3_3_H A28
AGP_AD18 AGP_AD27 B29 A29 AGP_AD26
AGP_AD17 AGP_AD25 GAD27 GAD26 AGP_AD24
B30 GAD25 GAD24 A30
AGP_AD16 B31 A31
AGP_AD15 GND_U GND_K
10 AGP_ADSTB1F B32 AD_STB1 AD_STB1# A32 AGP_ADSTB1S 10
AGP_AD14 AGP_AD23 B33 A33 AGP_C_BE_L3 C611 C548 C567 C565 C568 C607 C569 C604 C609 C426 C610 C606
AGP_AD13 GAD23 C/BE#3
B34 VDDQ_F VDDQ_A A34
AGP_AD12 AGP_AD21 B35 A35 AGP_AD22 22u-10V 22u-10V 1U-0805 1u-0805 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
AGP_AD11 AGP_AD19 GAD21 GAD22 AGP_AD20
B36 GAD19 GAD20 A36
AGP_AD10 B37 A37
AGP_AD9 AGP_AD17 GND_V GND_L AGP_AD18
B38 GAD17 GAD18 A38
AGP_AD8 AGP_C_BE_L2 B39 A39 AGP_AD16
AGP_AD7 C/BE#2 GAD16
B40 VDDQ_G VDDQ_B A40
AGP_AD6 B41 A41
10 AGP_IRDY IRDY# FRAME# AGP_FRAME 10
AGP_AD5
AGP_AD4 +5V +3_3V 3VDUAL
AGP_AD3
AGP_AD2
AGP_AD1 B46 A46
10 AGP_DEVSEL DEVSEL# TRDY# AGP_TRDY 10
AGP_AD0 B47 A47
VDDQ_H STOP# AGP_STOP 10
AGP_PERR B48 A48
PERR# PME# PME_J 19,30,31,53
B49 A49 C614 C700 C613 C600 C558 C602 C594 C599 C598
10 AGP_AD[0..31] GND_X GND_N
B 10 AGP_SERR B50 SERR# PAR A50 AGP_PAR 10 B
AGP_C_BE_L1 B51 A51 AGP_AD15 22u-1206 0.1u 22u-10V 0.1u 0.1u 0.1u 0.1u 0.1u 0.1u
C/BE#1 GAD15
B52 VDDQ_I VDDQ_C A52
AGP_AD14 B53 A53 AGP_AD13
AGP_AD12 GAD14 GAD13 AGP_AD11
B54 GAD12 GAD11 A54
B55 GND_Y GND_O A55 Added 2/26
AGP_AD10 B56 A56 AGP_AD9 +12V
GAD10 GAD9
AGP_AD8 B57 GAD8 C/BE#0 A57 AGP_C_BE_L0 Near AGP
B58 VDDQ_J VDDQ_D A58
AGP_C_BE_L[0..3] 10 10 AGP_ADSTB0F B59 AD_STB0 AD_STB0# A59 AGP_ADSTB0S 10
AGP_AD7 B60 A60 AGP_AD6
AGP_C_BE_L3 GAD7 GAD6
B61 GND_Z GND_P A61
AGP_C_BE_L2 AGP_AD5 B62 A62 AGP_AD4 C554 C535 C559 C678 C560
AGP_C_BE_L1 AGP_AD3 GAD5 GAD4 AGP_AD2
B63 GAD3 GAD2 A63
AGP_C_BE_L0 B64 A64 22u-16V 0.1u 0.1u 0.1u 0.1u
AGP_AD1 VDDQ_K VDDQ_E AGP_AD0
B65 GAD1 GAD0 A65
B66 A66 +3_3V
AGP_ST[0..2] 10 10,18 AGP_VREF VREFCG VREFGC
AGP_ST2
AGP_ST1 C571 KEY Close to AGP pin E3 to E14
AGP_ST0 C616 C601 C603 +12V
0.1u F1 E1
RESV_O RESV_I 22u-1206 0.1u 0.1u
F2 RESV_P RESV_J E2
F3 GND_AA VCC_12V_B E3
AGP_SBA_L7 F4 E4 C553 C552 C584 C572
GND_BB VCC_12V_C
AGP_SBA_L6 F5 GND_CC VCC_12V_D E5 Added 2/26
AGP_SBA_L5 F6 E6 22u-16V 22u-16V 0.1u 0.1u
GND_DD VCC_12V_E
AGP_SBA_L4 F7 GND_EE VCC_12V_F E7 Near AGP
A AGP_SBA_L3 F8 GND_FF VCC_12V_G E8 Added 2/26 A
AGP_SBA_L2 F9 E9
AGP_SBA_L1 GND_GG VCC_12V_H
F10 GND_HH VCC_12V_I E10
AGP_SBA_L0 +12V
F11 GND_II VCC_12V_J E11
J32
Micro Star Restricted Secret
F12 GND_JJ VCC_12V_K E12
F13 E13 Title Rev
AGP_SBA_L[0..7] 10 GND_KK VCC_12V_L 1
F14 E14 AGP 8X CONNECTOR
GND_LL VCC_12V_M 2 Document Number 00E
3
J_AGP_1.5V 4
MICRO-STAR INT'L CO.,LTD. Last Revision Date:
X_D2x2 Monday, September 09, 2002
F02 CHANGE TO M06 added 2/18 No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 17 of 64
5 4 3 2 1
5 4 3 2 1

VREF CIRCUITS FOR HUB INTERFACE A


+1_5V VREF CIRCUIT FOR AGP 4X AND 8X
R339 +1_2V
19,61 P1_5V_ICH4
+12V
X_82 49.9 for +1.2V
R273 R349
C515 R342 R347 75 for +1.4V
43.2-1%
49.9-1% 88.7 for +1.5V
X_470p 324-1% 143-1% R384
0.75V FOR 4X 0.8V 0.8V
1K-1%
D
0.35V FOR 8X 10 HIA_VSWNG_MCH 19 ICH4_HI_VSWING
D
Q43
12 mil C450 12 mil C546

D
NDS351AN-S-SOT23 R274 R350
0.1u 0.1u
G 100-1% 49.9-1%
AGP_GC_8XDET_L 17
R340

S
AGP_VREF 10,17
C506 0 PLACE WITHIN 4" OF MCH PLACE WITHIN 4" OF ICH4
+1_2V
19,61 P1_5V_ICH4
X_470p

R334 R335 R305


R296 100 for +1.2V
X_82 100-1% 78.7-1%
100-1% 124 for +1.4V
137 for +1.5V 0.347V R380
0.35V R285
19 ICH4_HI_REF
10 HIA_VREF_MCH
12 mil 0 C464
12 mil 0 C461 R379
R300 0.1u
0.1u 24.3-1%
41.2-1%
C C

VCC_CORE VCC_CORE

VREF CIRCUITS FOR HUB INTERFACE B


R134 R140
GTL_VREF_P0 GTL_VREF_P0 +1_2V +1_8V
49.9-1% 49.9-1%

R142
VREF1_GTL1_P0 VREF2_GTL2_P0 R275 49.9 for +1.2V R614
GTL_VREF1_P0 3 GTL_VREF2_P0 3
0 C250 C228 49.9-1% 75 for +1.4V 49.9-1%
12 mil 12 mil
R131 R138
1u-0805 1u-0805 0.8V 0.8V
84.5-1% 84.5-1%
10 HIB_VSWNG_MCH 25 HIB_VSWNG_P64H2
12 mil C438 12 mil C797
R286 R617
0.1u 0.1u
100-1% 40.2-1%
B B
VCC_CORE VCC_CORE

PLACE WITHIN 4" OF MCH PLACE WITHIN 4" OF P64H2


R211 GTL_VREF_P1 R188 GTL_VREF_P1 +1_8V
+1_2V
49.9-1% 49.9-1%

100 for +1.2V R631


VREF3_GTL1_P1 VREF3_GTL2_P1 R297
GTL_VREF1_P1 5 GTL_VREF2_P1 5 124 for +1.4V 102-1%
C308 12 mil C296 12 mil 100-1%
R210 R191 0.353V R627
1u-0805 1u-0805 0.35V R287
25 HIB_VREF_P64H2
84.5-1% 84.5-1%
10 HIB_VREF_MCH
12 mil 0 C800
12 mil 0 C462 R626
R282 0.1u
VCC_CORE
0.1u 24.9-1%
41.2-1%

R255 GTL_VREF_MCH
49.9-1%

A VREF5_GTL_1_MCH A
GTL_VREF_MCH 9 VREF CIRCUIT FOR GTL+
C392 12 mil
R256
Micro Star Restricted Secret
1u-0805 Title Rev
84.5-1% AGP&GTL+&HUBLINK VREFS
Document Number 00E

MICRO-STAR INT'L CO.,LTD. Last Revision Date:


Monday, September 09, 2002
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan Sheet
http://www.msi.com.tw 18 of 64
5 4 3 2 1
5 4 3 2 1

RN68
ICH4_IGNNE_L 1 2
P1_5V_ICH4 18,61 CPU_IGNNE_L 3,4,5
3VDUAL ICH4_A20M_L 3 4 CPU_A20M_L 3,4,5
SB1_5V SB1_5V ICH4_CPUSLP_L 5 6 CPU_CPUSLP_L 3,4,5
ICH4_INIT_L 7 8
VCC_CORE CPU_INIT_L 3,4,5,43
+3_3V 3VDUAL
PME_J 8.2K 10
R512 RN67
ICH4_STPCLK_L 1 2 CPU_STPCLK_L 3,4,5
ICH4_SMI_L

AC17
3 4 CPU_SMI_L 3,4,5

AC8

M10

M14
G18
U19

H18
K10
K12
K18
K22
P10

V14

P12

V10
V16
V18

E12
E13
E20

P18
T18

T22
F14

L23
J18
U22A R411

H6

U1

R6

U6
5 6

A5

B2

K6

P6

E9
T6

F6
F7

F9
J1
D 28,29 AD[0..31] D
ICH4_INTR 7 8 CPU_LINIT0_INTR 3,4,5
AD0 H5 AB23 ICH4_A20M_L 56

VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5

VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3

VCCSUS1_5
VCCSUS1_5
VCCSUS1_5