Sei sulla pagina 1di 76

5 4 3 2 1

SYSTEM PAGE REF.


01. Block Diagram
02. System Setting
03. CPU(1)_DMI,DP,PEG,FDI
10FTG 15" CHIEF RIVER Schematics Rev 1.1
04. CPU(2)_CLK,MSIC,JTAG
05. CPU(3)_DDR3
06. CPU(4)_PROCRSSOE POWER
07. CPU(5)_GRAPHIC POWER BLOCK DIAGRAM
08. CPU(6)_GND
D
09. CPU(7)_RESERVED D
10. CPU_PCH_XDP
16. DDR3(1)_SO-DIMM0 1G/2G DDR3 NVIDIA PCIE*8 CPU DDR3 1333/1600 MHz
17. DDR3(2)_SO-DIMM1 VRAM * 8 N14P-GV2 DDR3 SO-DIMM
18. DDR3(3)_CA/DQ Voltage Ivy Bridge BGA (17W)
20. PCH(1)_SATA,IHDA,RTC,LPC Page 16~18
21. PCH(2)_PCIE,CLK,SMB,PEG Page 3~11
Page 70~79
22. PCH(3)_FDI,DMI,SYS PWR
23. PCH(4)_DP,LVDS,CRT
24. PCH(5)_PCI,NVRAM,USB
25. PCH(6)_CPU,GPIO,MISC
26. PCH(7)_POWER,GND
27. PCH(8)_POWER,GND
28. PCH(9)_SPI,SMB USB2.0
30. EC_IT8587E/CX(1) eDP Panel Camera
31. EC_IT8587E/CX(2)KB,TP,FP Page 45
32. RST_Reset Circuit Page 45
33. LAN_QCA8171/72
34. LAN_RJ45 USB2.0
HDMI eDPx2 USB PORT9
36. AUD(1)_92HD99
37. AUD(2)_JACK Page 48 Page 52
40. CB(1)_AU6465 DDC
USB2.0
POWER
C
44. BUG_Debug
45. CRT(1)_LVDS
PCH USB PORT3
CPU VCORE C
Page 80
46. CRT(2)_D-Sub CRT Page 52
48. TV(1)_HDMI Page 44 Panther Point USB2.0 SYSTEM, +3V, Page
+5V 81
50. FAN_Fan,Sensor Page 46 USB20 PORT1
51. XDD_HDD,ODD USB30 PORT2
52. USB_USB Port Debug Conn. USB3.0 Page 52 +1.05VS Page 82
53. MINICARD_WLAN / mSTAT K/B
56. LED_Indicator Page 31 USB2.0
57. DSG_Discharge EC LPC USB20 PORT0 DDR & VTT Page 83
58. G-sensor T/P USB30 PORT1
USB3.0
59. CIR
60. DC_DC/BAT CONN
Page 31
IT8587E/CX HSPI
Page 52
1.8VS Page 84
FAN
61. Touch Panel Page 50 Page 30
65. ME_CONN,Skew Hole PCIE *1
MiniCard SMART CHARGER
Page 88
66. PWR BRD/IO BRD WLAN/WMAX
70. VGA_Main (1) USB2.0
71. VGA_Main (2) SPI ROM Page 20~28 BT combo POWER DETECT
Page 90
72. VGA_VRAM CH A 4MB (BIOS/EC)
73. VGA_VRAM CH B Page 28
74. VGA_MEMORY INTERFACE Page 53
LOAD SWITCHPage 91
75. VGA_POWER (1) Page 38
76. VGA_POWER (2) Head Phone POWER PROTECT
Azalia ATHEROS Page 92
77. VGA_THERMAL SENSOR (Combo Jack) Azalia Codec PCIE *1 RJ45
B
78. VGA_STRAP IDT/ID92HD99 QCA8171_Giga B

wo/LED

SATA
80_POWER_VCORE&VGFX
DMIC QCA8172_10/100
81_POWER_SYSTEM
82_POWER_+VCCP Page 45 VGA POWER
Page 36 USB2.0
83_POWER_DDR & VTT Card Reader GPU VCORE
84_POWER_+1.8VS 2in1 Page 87
Alcor AU6465
87_POWER_+VGA_CORE(DSC)
88_POWER_CHARGER(ISL88731) Page 40 +1.05VS_VGA Page 91
90_POWER_DETECT SATA HDD
91_POWER_LOAD SWITCH
92_POWER_PROTECT Page 51 PCIE *1 +1.5VS_VGA Page 91
93_POWER_SIGNAL mSATA/SSD
94_POWER_FLOWCHART SATA 3.0
SATA ODD +3VS_VGA Page 91
95. POWER_ HISTORY
97. SYSTEM_HISTORY Page 53
98. Power On Sequence Page 51 +12VS_VGA Page 91
99. Power On Timing
LOAD SWITCHPage 91

POWER PROTECT
Page 92

A A

Discharge Circuit DC & BATT. Conn.


Page 57 Page 60 Title : Block Diagram
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Reset Circuit Skew Holes Size Project Name Rev

Page 32 Page 65
Custom VGFTG 1.1

forum.hocvienit.vn
Date: Tuesday, December 11, 2012 Sheet 1 of 104
5 4 3 2 1
5 4 3 2 1

EC GPIO Use As Signal Name


EC GPA0 PWR_WHITE_LED#
PCH_CPT PCH_CPT
Internal &
GPA1 BAT_ORG_LED# EC Name Use As Signal Name
GPIO GPIO Use As Signal Name External
Pull-up/down
Power IT8587 GPA2 KEYBOARD_LED# WRST# EC_RST#
GPIO 00 ID PX/UMA,DSC PCB_ID4 EXT PU REV PD +3VS GPA3 DC_IN_LED# FSCE# SCE#
GPIO 01 ID STD/EN PCB_ID6 EXT PU REV PD +3VS GPA4 WLAN_RST# FSCK SCK
GPIO 02 MPC_PWR_CTRL# EXT PU REV PD +3VS GPA5 CHGCB2# FMOSI SI
GPIO 03 SATA_ODD_DA# EXT PU +3VS GPA6 THERM_ALERT#_EC FMISO SO
GPIO[4:5] EXTTS_SNI_DRV[0:1]_PCH EXT PU +3VS GPA7 PCH_FLASH_DESCRIPTOR KSI0 KSI0
GPIO 06 ID Pre/Main PCB_ID7 EXT PU REV PD +3VS GPB0 NUM_LED# KSI1 KSI1
D GPIO 07 ID USB3.0 PCB_ID3 EXT PU REV PD +3VS GPB1 CAP_LED# KSI2 KSI2 D

GPIO 08 BT_ON/OFF# EXT PU +3VSUS_ORG GPB2 THRO_CPU KSI3 KSI3


GPIO 09 ID Speaker ONKYO_DET1 EXT PU +3VSUS_ORG GPB3 SMB0_CLK KSI4 KSI4
GPIO 10 ID Sleep & Music PCB_ID11 EXT PU REV PD +3VSUS_ORG GPB4 SMB0_DAT KSI5 KSI5
GPIO 11 EXT_SCI# EXT PU +3VSUS_ORG GPB5 A20GATE KSI6 KSI6
GPIO 12 GPIO12 EXT PU +3VSUS_ORG GPB6 RCIN# KSI7 KSI7
GPIO 13 GPIO13 EXT PU +3VSUS_ORG GPB7 PM_RSMRST# KSO0 KSO0
GPIO 14 PCB_ID10 EXT PU REV PD +3VSUS_ORG GPC0 CRX0 KSO1 KSO1
GPIO 15 EXT_SMI# EXT PU +3VSUS_ORG GPC1 SMB1_CLK KSO2 KSO2
GPIO 16 Clear PWD GPIO16 +3VS GPC2 SMB1_DAT KSO3 KSO3
GPIO 17 DGPU_PWROK EXT PU REV PD +3VS GPC3 KSO16 KSO4 KSO4
GPIO 18 CLK_REQ1# EXT PU +3VS GPC4 AC_IN_OC KSO5 KSO5
GPIO 19 BBS_BIT0 REV PD +3VS GPC5 KSO17 KSO6 KSO6
GPIO 20 WLAN CLK_REQ_WLAN# EXT PU REV PD +3VS GPC6 BAT1_IN_OC# KSO7 KSO7
GPIO 21 ID 17W/35W/45W PCB_ID8 EXT PD REV PU +3VS GPC7 ME_AC_PRESENT KSO8 KSO8
GPIO 22 WLAN_LED EXT PD +3VS GPD0 PM_SUSB# KSO9 KSO9
GPIO 23 GPIO23 TEST POINT +3VS GPD1 PM_SUSC# KSO10 KSO10
GPIO 24 GPIO24 EXT PU +3VSUS_ORG GPD2 BUF_PLT_RST# KSO11 KSO11
GPIO 25 LAN CLK_REQ_LAN# EXT PU REV PD +3VSUS_ORG GPD3 EXT_SCI# KSO12 KSO12
GPIO 26 CLK_REQ4# EXT PU +3VSUS_ORG GPD4 EXT_SMI# KSO13 KSO13
GPIO 27 GPIO27 PD +3VSUS_ORG GPD5 PM_PWROK KSO14 KSO14
C GPIO 28 PLL_ODVR_EN REV PD +3VSUS_ORG GPD6 FAN0_TACH KSO15 KSO15 C

GPIO 29 GPIO29 REV PU +3VSUS_ORG GPD7 USBP01_EN


GPIO 30 ME_SUSPWRDNACK EXT PU +3VSUS_ORG GPE0 VSUS_ON
GPIO 31 ME_AC_PRESENT EXT PU +3VSUS_ORG GPE1 SUSC_EC#
GPIO 32 PM_CLKRUN# EXT PU +3VS GPE2 SUSB_EC#
GPIO 33 HDA_DOCK_EN# TEST POINT +3VS GPE3 CPU_VRON
GPIO 34 ID HDMI SKU PCB_ID2 EXT PU REV PD +3VS GPE4 PWR_SW#_M
GPIO 35 CRT_IN# EXT PU +3VS GPE5 USB_OC01#_EC
GPIO 36 SATA_ODD_PRSNT#_R EXT PU +3VS GPE6 LID_SW#
GPIO 37 FDI_OVRVLTG EXT PD REV PU +3VS GPE7 USB_OC2#_EC
GPIO 38 PCB_ID0 EXT PD REV PU +3VS GPF0 BAT_LEARN
GPIO 39 PCB_ID1 EXT PD REV PU +3VS GPF1 ME_SUSPWRDNACK
GPIO 40 GPIO40 EXT PU +3VSUS_ORG GPF2 PM_PWRBTN#
GPIO 41 GPIO41 EXT PU +3VSUS_ORG GPF3 TEST pin SM_BUS ADDRESS :
GPIO 42 GPIO42 EXT PU +3VSUS_ORG GPF4 TP_CLK
ID Speaker SM-Bus Device SM-Bus Address
GPIO 43 HARMAN_DET2 EXT PU +3VSUS_ORG GPF5 TP_DAT
GPIO 44 CLK_REQ5# EXT PU +3VSUS_ORG GPF6 H_PECI_EC
SO-DIMM 0 1010000x ( A0h )
GPIO 45 CLK_REQ6# EXT PU +3VSUS_ORG GPF7 LCD_BACKOFF#
SO-DIMM 1 1010001x ( A4h )
GPIO 46 CLK_REQ7# EXT PU +3VSUS_ORG GPG0 HDMI_HPD_M
GPIO 47 CLKREQ_PEG# EXT PU REV PD +3VSUS_ORG GPG1 NC
GPIO 48 ID 17W/35W/45W PCB_ID9 EXT PU REV PD +3VS GPG2 FB_CLAMP_TGL_REQ#
B
GPIO 49 ID zero Power ODD PCB_ID5 EXT PU REV PD +3VS GPG6 HDPINT# B
GPIO 50 DGPU_HOLD_RST# EXT PU +3VS GPH0 PM_CLKRUN#
GPIO 51 BBS_BIT1 REV PD +3VS GPH1 CHGCB0#
GPIO 52 ID eDP/LVDS PCB_ID12 EXT PD REV PU +3VS GPH2 CHGCB1#
PCIE 1 N/A USB 0 USB 3.0 Port(Right Front)
GPIO 53 KB_LED_ID REV PU +3VS GPH3 KB_ID
PCIE 2 WLAN USB 1 USB 3.0 Port (Right Back)
GPIO 54 DGPU_PWR_EN EXT PU +3VS GPH4 JACK_IN#
PCIE 3 LAN USB 2 WIFI/BT
GPIO 55 STP_A16OVR REV PD +3VS GPH5 HDPLOC
PCIE 4 N/A USB 3 USB-Reserve
GPIO 56 CLK_REQ_PEG_B# EXT PU +3VSUS_ORG GPH6 HDPACT
PCIE 5 N/A USB 4 TV Tuner Card1
GPIO 57 WLAN_ON +3VSUS_ORG GPI0 AD_IINP
PCIE 6 N/A USB 5 TV Tuner Card2
GPIO 58 SML1_CLK EXT PU +3VSUS_ORG GPI1 SUS_PWRGD
PCIE 7 N/A USB 6 N/A
GPIO 59 GPIO59 EXT PU +3VSUS_ORG GPI2 ALL_SYSTEM_PWRGD
PCIE 8 N/A USB 7 N/A
GPIO 60 DRAMRST_CNTRL_PCH EXT PU +3VSUS_ORG GPI3 VRM_PWRGD
USB 8 Card reader
GPIO 61 PM_SUS_STAT# TEST POINT +3VSUS_ORG GPI4 ADAPT_AD SATA0 SATA HDD
USB 9 USB(Left Front)
GPIO 62 SUSCLK TEST POINT +3VSUS_ORG GPI5 BACK_EN_C SATA1 mSATA
USB 10 Camera
GPIO 63 SLP_S5# TEST POINT +3VSUS_ORG GPI6 WLAN_ON_EC SATA2 SATA ODD
USB 11 Touch Panel
GPIO 64 DGPU_EDID_SELECT# REV PU +3VS GPI7 IMON SATA3 N/A
USB 12 N/A
GPIO 65 CLK_USB48_CR +3VS GPJ0 SLP_MUSIC_EN SATA4 N/A
USB 13 N/A
GPIO 66 GPIO66 TEST POINT +3VS GPJ1 BAT_OFF# SATA5 N/A
GPIO 67 DGPU_PRSNT# EXT PD REV PU +3VS GPJ2 OP_SD#
GPIO 68 SATA_ODD_PWRGT EXT PU +3VS GPJ3 USBSLP_EN
GPIO 69 TV_DET EXT PD +3VS GPJ4 GPU_FB_CLAMP
GPIO[70:71] GPIO[70:71] EXT PU +3VS GPJ5 CTL_FAN
A A
GPIO 72 BATLOW# EXT PU& TP +3VSUS_ORG GPJ6 SW_RTCRST
GPIO 73 CLK_REQ0# EXT PU +3VSUS_ORG GPJ7 LAN_PWR_EN#
GPIO 74 SML1_ALERT# EXT PU +3VSUS_ORG GPM0 LPC_AD0
GPIO 75 SML1_DAT EXT PU +3VSUS_ORG GPM1 LPC_AD1
GPM2 LPC_AD2
GPM3 LPC_AD3
GPM4 CLK_KBCPCI_PCH
Title : System Setting
GPM5 LPC_FRAME#
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
GPM6 INT_SERIRQ
forum.hocvienit.vn
Size Project Name Rev
Custom VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 2 of 104
5 4 3 2 1
5 4 3 2 1

+VCCP +VCCP 4,6,7,26,27,32,57,82

D D

PEG Compensation(Keep if PEG no used)


+VCCP
PEG_ICOMPO>12 mils
U0301A
G3 PEG_COMP R0301 1 1% 2 24.9Ohm
PEG_ICOMPI G1
M2 PEG_ICOMPO G4
22 DMI_TXN0 DMI_RX#[0] PEG_RCOMPO
22 DMI_TXN1 P6
P1 DMI_RX#[1]
22 DMI_TXN2 DMI_RX#[2] PCIENB_RXN[0..7] 70
P10 H22 PCIENB_RXN0
22 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] J21 PCIENB_RXN1
N3 PEG_RX#[1] B22 PCIENB_RXN2
22 DMI_TXP0 DMI_RX[0] PEG_RX#[2]
22 DMI_TXP1 P7 D21 PCIENB_RXN3
DMI_RX[1] PEG_RX#[3]

DMI
P3 A19 PCIENB_RXN4
22 DMI_TXP2 DMI_RX[2] PEG_RX#[4]
P11 D17 PCIENB_RXN5
22 DMI_TXP3 DMI_RX[3] PEG_RX#[5] B14 PCIENB_RXN6
K1 PEG_RX#[6] D13 PCIENB_RXN7
22 DMI_RXN0 DMI_TX#[0] PEG_RX#[7]
22 DMI_RXN1 M8 A11
N4 DMI_TX#[1] PEG_RX#[8] B10
22 DMI_RXN2 DMI_TX#[2] PEG_RX#[9]
R2 G8
22 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] A8
K3 PEG_RX#[11] B6
22 DMI_RXP0 DMI_TX[0] PEG_RX#[12]
22 DMI_RXP1 M7 H8
P4 DMI_TX[1] PEG_RX#[13] E5
22 DMI_RXP2 DMI_TX[2] PEG_RX#[14]
T3 K7
22 DMI_RXP3 DMI_TX[3] PEG_RX#[15]
PCIENB_RXP[0..7] 70
K22 PCIENB_RXP0
PEG_RX[0] K19 PCIENB_RXP1
PEG_RX[1] C21 PCIENB_RXP2
22 FDI_TXN[7:0] PEG_RX[2]
FDI_TXN0 U7 D19 PCIENB_RXP3
FDI_TXN1 W11 FDI0_TX#[0] PEG_RX[3] C19 PCIENB_RXP4
C C
FDI_TXN2 W1 FDI0_TX#[1] PEG_RX[4] D16 PCIENB_RXP5
FDI_TXN3 AA6 FDI0_TX#[2] PEG_RX[5] C13 PCIENB_RXP6

PCI EXPRESS -- GRAPHICS


FDI_TXN4 W6 FDI0_TX#[3] PEG_RX[6] D12 PCIENB_RXP7
FDI_TXN5 V4 FDI1_TX#[0] PEG_RX[7] C11
FDI_TXN6 Y2 FDI1_TX#[1] PEG_RX[8] C9
FDI1_TX#[2] PEG_RX[9]

Intel(R) FDI
FDI_TXN7 AC9 F8
FDI1_TX#[3] PEG_RX[10] C8
PEG_RX[11] C5
22 FDI_TXP[7:0] PEG_RX[12]
FDI_TXP0 U6 H6
FDI_TXP1 W10 FDI0_TX[0] PEG_RX[13] F6
FDI_TXP2 W3 FDI0_TX[1] PEG_RX[14] K6
FDI_TXP3 AA7 FDI0_TX[2] PEG_RX[15]
FDI0_TX[3] PCIEG_TXN[0..7] 70
FDI_TXP4 W7 G22 PCIENB_TXN0 C0301 1 2 0.22UF/10V /VGA PCIEG_TXN0
FDI_TXP5 T4 FDI1_TX[0] PEG_TX#[0] C23 PCIENB_TXN1 C0302 1 2 0.22UF/10V /VGA PCIEG_TXN1
FDI_TXP6 AA3 FDI1_TX[1] PEG_TX#[1] D23 PCIENB_TXN2 C0303 1 2 0.22UF/10V /VGA PCIEG_TXN2
FDI_TXP7 AC8 FDI1_TX[2] PEG_TX#[2] F21 PCIENB_TXN3 C0304 1 2 0.22UF/10V /VGA PCIEG_TXN3
FDI1_TX[3] PEG_TX#[3] H19 PCIENB_TXN4 C0305 1 2 0.22UF/10V /VGA PCIEG_TXN4
AA11 PEG_TX#[4] C17 PCIENB_TXN5 C0306 1 2 0.22UF/10V /VGA PCIEG_TXN5
22 FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5]
AC12 K15 PCIENB_TXN6 C0307 1 2 0.22UF/10V /VGA PCIEG_TXN6
22 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] F17 PCIENB_TXN7 C0308 1 2 0.22UF/10V /VGA PCIEG_TXN7
U11 PEG_TX#[7] F14
22 FDI_INT FDI_INT PEG_TX#[8] A15
AA10 PEG_TX#[9] J14
22 FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10]
AG8 H13
+3VS +3VS 22 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] M10
Mount 0.1uF (1AV200000041) for PCIE GEN1, GEN2
PEG_TX#[12] F10 Mount 0.22uF (1AV200000050) for PCIE GEN3
+VCCP PEG_TX#[13] D9
Always required PEG_TX#[14] J4
PEG_TX#[15]
1

24.9Ohm 2 1% 1 R0302 DP_COMP AF3


eDP_COMPIO PCIEG_TXP[0..7] 70
R0305 R0303 AD2 F22 PCIENB_TXP0 C0317 1 2 0.22UF/10V /VGA PCIEG_TXP0
100KOhm 100KOhm EDP_HPD# AG11 eDP_ICOMPO PEG_TX[0] A23 PCIENB_TXP1 C0318 1 2 0.22UF/10V /VGA PCIEG_TXP1
@ @ eDP_HPD PEG_TX[1] D24 PCIENB_TXP2 C0319 1 2 0.22UF/10V /VGA PCIEG_TXP2
PEG_TX[2] E21 PCIENB_TXP3 C0320 1 2 0.22UF/10V /VGA PCIEG_TXP3
2

C0333 1 2 0.1UF/25V /eDP EDP_AUXN_R AG4 PEG_TX[3] G19 PCIENB_TXP4 C0321 1 2 0.22UF/10V /VGA PCIEG_TXP4
45 EDP_AUXN eDP_AUX# PEG_TX[4]
45 EDP_AUXP C0334 1 2 0.1UF/25V /eDP EDP_AUXP_R AF4 B18 PCIENB_TXP5 C0322 1 2 0.22UF/10V /VGA PCIEG_TXP5
eDP_AUX PEG_TX[5] K17 PCIENB_TXP6 C0323 1 2 0.22UF/10V /VGA PCIEG_TXP6
PEG_TX[6]
1

DP

G17 PCIENB_TXP7 C0324 1 2 0.22UF/10V /VGA PCIEG_TXP7


B
R0306 R0304 C0335 1 2 0.1UF/25V /eDP EDP_TXN0_R AC3 PEG_TX[7] E14 B
100KOhm 100KOhm 45 EDP_TXN0 eDP_TX#[0] PEG_TX[8]
C0336 1 2 0.1UF/25V /eDP EDP_TXN1_R AC4 C15
45 EDP_TXN1 eDP_TX#[1] PEG_TX[9]
@ @ AE11 K13
AE7 eDP_TX#[2] PEG_TX[10] G13
2

eDP_TX#[3] PEG_TX[11] K10


C0337 1 2 0.1UF/25V /eDP EDP_TXP0_R AC1 PEG_TX[12] G10
45 EDP_TXP0 eDP_TX[0] PEG_TX[13]
C0338 1 2 0.1UF/25V /eDP EDP_TXP1_R AA4 D8
45 EDP_TXP1 eDP_TX[1] PEG_TX[14]
AE10 K4
AE6 eDP_TX[2] PEG_TX[15]
eDP_TX[3]

ES1
01V010000003

+VCCP
1

R0308
1KOhm
/eDP
2

EDP_HPD#

3 /eDP
D
Q0301
2N7002
1 EDP_HPD eDP_HPD 45
G
S 2
pull down 100K ohm at P.45
A
0917 Ken A

TitleCPU(1)_DMI,DP,PEG,FDI
:
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 3 of 104
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V 5,7,16,17,18,57,83

+3VS +3VS 3,16,17,20,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

+3VSUS +3VSUS 22,24,27,28,30,33,34,37,53,62,81,92

+VCCP +VCCP 3,6,7,26,27,32,57,82

+3V +3V 24,44,45,57,91

D D

U0301B

J3 CLK_EXP_P_R R0422 1 2 0Ohm


BCLK H2 1 2 0Ohm CLK_EXP_P 21
CLK_EXP_N_R R0423
BCLK# CLK_EXP_N 21

CLOCKS
MISC
R0425 1 /LVDS 2 1KOhm
F49
25 H_SNB_IVB# PROC_SELECT# AG3 CLK_DP_P_R R0428 1 /eDP 2 0Ohm
DPLL_REF_CLK CLK_DP_P 21
AG1 CLK_DP_N_R R0429 1 /eDP 2 0Ohm
1 C57 DPLL_REF_CLK# CLK_DP_N 21
T0401 TP_SKTOCC#_R
PROC_DETECT# R0426 1 /LVDS 2 1KOhm +VCCP
N59
BCLK_ITP N58
BCLK_ITP#
T0402 1 TP_CATERR#_R C49
CATERR#

THERMAL
A48 AT30
25 H_PECI PECI SM_DRAMRST# CPUDRAMRST# 5

+VCCP R0404 1 2 62Ohm


BF44 SM_RCOMP_0 R0418 1 1% 2 140Ohm
H_PROCHOT# R0403 1 2 56Ohm H_PROCHOT#_D C45 SM_RCOMP[0] BE43 SM_RCOMP_1 R0419 1 1% 2 25.5Ohm
PROCHOT# SM_RCOMP[1]

DDR3
MISC
BG43 SM_RCOMP_2 R0420 1 1% 2 200Ohm
SM_RCOMP[2]

D45
25,32 H_THRMTRIP# THERMTRIP#
PU/PD for JTAG signals
N53 1 T0403
PRDY# N55 XDP_PREQ# R0440 1 @ 2 51Ohm
PREQ# +VCCP
L56 XDP_TCK R0441 1 2 51Ohm
TCK L55 XDP_TMS R0438 1 2 51Ohm
TMS +VCCP

PWR MANAGEMENT
J58 XDP_TRST# R0442 1 2 51Ohm
TRST#

JTAG & BPM


C SP0401 C
2 1 H_PM_SYNC_R C48 M60 XDP_TDI R0439 1 2 51Ohm
22 H_PM_SYNC PM_SYNC TDI +VCCP
NB_R0402_20MIL_SMALL L59 XDP_TDO R0414 1 2 51Ohm +VCCP
R0408 2 1 10KOhm TDO
SP0402
2 1 H_CPUPWRGD_R B46
25 H_CPUPWRGD UNCOREPWRGOOD K58
NB_R0402_20MIL_SMALL H_DBR# R0424 1 @ 2 1KOhm
+3VS
DBR#

R0409 1 1% 2 130Ohm VDDPWRGOOD_R BE45 G58 1 T0404


22 PM_DRAM_PWRGD SM_DRAMPWROK BPM#[0] E55 1 T0405
BPM#[1] E59 1 T0406
BPM#[2] G55 1 T0407
BPM#[3] G59 1 T0408
R0416 1 1% 2 1.5KOhm BUF_CPU_RST# D44 BPM#[4] H60 1 T0409
24,30,32,33,40,53,70 BUF_PLT_RST# RESET# BPM#[5] J59 1 T0410
BPM#[6] J61 1 T0411
BPM#[7]
1

R0417
680OHM
2

ES1

Sandy Bridge:R0417 = 750 ohm (10V220000093)


Ivy Bridge:R0417 = 680 ohm (10V240000041)

@
Different from EVEREST R0461 1 2 0Ohm
PM_SYS_PWRGD is the power good for +1.5V_VCCDDQ 80 VR_HOT#

B B
H_PROCHOT#
If don't support S3 power reduction
1. Unmount R0450, R0452
2. Change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106
+1.5V
3. Unmount Q0501, C0501, R0506, R0507 Intel Comments

2
4. Mount R0501, change R0508 to 0ohm from 1kohm C0401 3
D
5. Mount R0702 and short JP0701 47PF/50V Q0401

1
1

6. Unmount R2232, R2231, Q2203 @ 2N7002


1
R0449 THRO_CPU
THRO_CPU 30
200Ohm G
S 2
1%
1.57 Volt
2

SP0403
PM_DRAM_PWRGD 2 1 2 @ 1
PM_PWROK 22,30,92
NB_R0402_5MIL_SMALL R0452
1

1.1KOhm
R0450 1%
1KOhm @
1%
2

A A

CPU(1)_CLK,MISC,JTAG
Title :
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 4 of 104
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V 4,7,16,17,18,57,83

U0301D
U0301C
17 M_B_DQ[63:0]
16 M_A_DQ[63:0] AL4
M_B_DQ0
M_A_DQ0 AG6 M_B_DQ1 AL1 SB_DQ[0] BA34
D SA_DQ[0] SB_DQ[1] SB_CK[0] M_B_DIM0_CLK_DDR0 17 D
M_A_DQ1 AJ6 AU36 M_B_DQ2 AN3 AY34
SA_DQ[1] SA_CK[0] M_A_DIM0_CLK_DDR0 16 SB_DQ[2] SB_CK#[0] M_B_DIM0_CLK_DDR#0 17
M_A_DQ2 AP11 AV36 M_B_DQ3 AR4 AR22
SA_DQ[2] SA_CK#[0] M_A_DIM0_CLK_DDR#0 16 SB_DQ[3] SB_CKE[0] M_B_DIM0_CKE0 17
M_A_DQ3 AL6 AY26 M_B_DQ4 AK4
SA_DQ[3] SA_CKE[0] M_A_DIM0_CKE0 16 SB_DQ[4]
M_A_DQ4 AJ10 M_B_DQ5 AK3
M_A_DQ5 AJ8 SA_DQ[4] M_B_DQ6 AN4 SB_DQ[5]
M_A_DQ6 AL8 SA_DQ[5] M_B_DQ7 AR1 SB_DQ[6]
M_A_DQ7 AL7 SA_DQ[6] M_B_DQ8 AU4 SB_DQ[7]
M_A_DQ8 AR11 SA_DQ[7] M_B_DQ9 AT2 SB_DQ[8] BA36
AP6 SA_DQ[8] AT40 AV4 SB_DQ[9] SB_CK[1] BB36 M_B_DIM0_CLK_DDR1 17
M_A_DQ9 M_B_DQ10
SA_DQ[9] SA_CK[1] M_A_DIM0_CLK_DDR1 16 SB_DQ[10] SB_CK#[1] M_B_DIM0_CLK_DDR#1 17
M_A_DQ10 AU6 AU40 M_B_DQ11 BA4 BF27
SA_DQ[10] SA_CK#[1] M_A_DIM0_CLK_DDR#1 16 SB_DQ[11] SB_CKE[1] M_B_DIM0_CKE1 17
M_A_DQ11 AV9 BB26 M_B_DQ12 AU3
SA_DQ[11] SA_CKE[1] M_A_DIM0_CKE1 16 SB_DQ[12]
M_A_DQ12 AR6 M_B_DQ13 AR3
M_A_DQ13 AP8 SA_DQ[12] M_B_DQ14 AY2 SB_DQ[13]
M_A_DQ14 AT13 SA_DQ[13] M_B_DQ15 BA3 SB_DQ[14]
M_A_DQ15 AU13 SA_DQ[14] M_B_DQ16 BE9 SB_DQ[15]
M_A_DQ16 BC7 SA_DQ[15] M_B_DQ17 BD9 SB_DQ[16] BE41
SA_DQ[16] SB_DQ[17] SB_CS#[0] M_B_DIM0_CS#0 17
M_A_DQ17 BB7 BB40 M_B_DQ18 BD13 BE47
SA_DQ[17] SA_CS#[0] M_A_DIM0_CS#0 16 SB_DQ[18] SB_CS#[1] M_B_DIM0_CS#1 17
M_A_DQ18 BA13 BC41 M_B_DQ19 BF12
SA_DQ[18] SA_CS#[1] M_A_DIM0_CS#1 16 SB_DQ[19]
M_A_DQ19 BB11 M_B_DQ20 BF8
M_A_DQ20 BA7 SA_DQ[19] M_B_DQ21 BD10 SB_DQ[20]
M_A_DQ21 BA9 SA_DQ[20] M_B_DQ22 BD14 SB_DQ[21]
M_A_DQ22 BB9 SA_DQ[21] M_B_DQ23 BE13 SB_DQ[22]
M_A_DQ23 AY13 SA_DQ[22] M_B_DQ24 BF16 SB_DQ[23] AT43
SA_DQ[23] SB_DQ[24] SB_ODT[0] M_B_DIM0_ODT0 17
M_A_DQ24 AV14 AY40 M_B_DQ25 BE17 BG47
SA_DQ[24] SA_ODT[0] M_A_DIM0_ODT0 16 SB_DQ[25] SB_ODT[1] M_B_DIM0_ODT1 17
M_A_DQ25 AR14 BA41 M_B_DQ26 BE18
SA_DQ[25] SA_ODT[1] M_A_DIM0_ODT1 16 SB_DQ[26]
M_A_DQ26 AY17 M_B_DQ27 BE21
M_A_DQ27 AR19 SA_DQ[26] M_B_DQ28 BE14 SB_DQ[27]
M_A_DQ28 BA14 SA_DQ[27] M_B_DQ29 BG14 SB_DQ[28]
M_A_DQ29 AU14 SA_DQ[28] M_B_DQ30 BG18 SB_DQ[29]
SA_DQ[29] SB_DQ[30] M_B_DQS#[7:0] 17
M_A_DQ30 BB14 M_B_DQ31 BF19 AL3 M_B_DQS#0
SA_DQ[30] M_A_DQS#[7:0] 16 SB_DQ[31] SB_DQS#[0]
M_A_DQ31 BB17 AL11 M_A_DQS#0 M_B_DQ32 BD50 AV3 M_B_DQS#1
M_A_DQ32 BA45 SA_DQ[31] SA_DQS#[0] AR8 M_A_DQS#1 M_B_DQ33 BF48 SB_DQ[32] SB_DQS#[1] BG11 M_B_DQS#2
M_A_DQ33 AR43 SA_DQ[32] SA_DQS#[1] AV11 M_A_DQS#2 M_B_DQ34 BD53 SB_DQ[33] SB_DQS#[2] BD17 M_B_DQS#3
M_A_DQ34 AW48 SA_DQ[33] SA_DQS#[2] AT17 M_A_DQS#3 M_B_DQ35 BF52 SB_DQ[34] SB_DQS#[3] BG51 M_B_DQS#4
SA_DQ[34] SA_DQS#[3] SB_DQ[35] SB_DQS#[4]

DDR SYSTEM MEMORY B


M_A_DQ35 BC48 AV45 M_A_DQS#4 M_B_DQ36 BD49 BA59 M_B_DQS#5
DDR SYSTEM MEMORY A

M_A_DQ36 BC45 SA_DQ[35] SA_DQS#[4] AY51 M_A_DQS#5 M_B_DQ37 BE49 SB_DQ[36] SB_DQS#[5] AT60 M_B_DQS#6
M_A_DQ37 AR45 SA_DQ[36] SA_DQS#[5] AT55 M_A_DQS#6 M_B_DQ38 BD54 SB_DQ[37] SB_DQS#[6] AK59 M_B_DQS#7
M_A_DQ38 AT48 SA_DQ[37] SA_DQS#[6] AK55 M_A_DQS#7 M_B_DQ39 BE53 SB_DQ[38] SB_DQS#[7]
C C
M_A_DQ39 AY48 SA_DQ[38] SA_DQS#[7] M_B_DQ40 BF56 SB_DQ[39]
M_A_DQ40 BA49 SA_DQ[39] M_B_DQ41 BE57 SB_DQ[40]
M_A_DQ41 AV49 SA_DQ[40] M_B_DQ42 BC59 SB_DQ[41]
M_A_DQ42 BB51 SA_DQ[41] M_B_DQ43 AY60 SB_DQ[42]
M_A_DQ43 AY53 SA_DQ[42] M_B_DQ44 BE54 SB_DQ[43]
M_A_DQ44 BB49 SA_DQ[43] M_B_DQ45 BG54 SB_DQ[44]
SA_DQ[44] M_A_DQS[7:0] 16 SB_DQ[45] M_B_DQS[7:0] 17
M_A_DQ45 AU49 AJ11 M_A_DQS0 M_B_DQ46 BA58 AM2 M_B_DQS0
M_A_DQ46 BA53 SA_DQ[45] SA_DQS[0] AR10 M_A_DQS1 M_B_DQ47 AW59 SB_DQ[46] SB_DQS[0] AV1 M_B_DQS1
M_A_DQ47 BB55 SA_DQ[46] SA_DQS[1] AY11 M_A_DQS2 M_B_DQ48 AW58 SB_DQ[47] SB_DQS[1] BE11 M_B_DQS2
M_A_DQ48 BA55 SA_DQ[47] SA_DQS[2] AU17 M_A_DQS3 M_B_DQ49 AU58 SB_DQ[48] SB_DQS[2] BD18 M_B_DQS3
M_A_DQ49 AV56 SA_DQ[48] SA_DQS[3] AW45 M_A_DQS4 M_B_DQ50 AN61 SB_DQ[49] SB_DQS[3] BE51 M_B_DQS4
M_A_DQ50 AP50 SA_DQ[49] SA_DQS[4] AV51 M_A_DQS5 M_B_DQ51 AN59 SB_DQ[50] SB_DQS[4] BA61 M_B_DQS5
M_A_DQ51 AP53 SA_DQ[50] SA_DQS[5] AT56 M_A_DQS6 M_B_DQ52 AU59 SB_DQ[51] SB_DQS[5] AR59 M_B_DQS6
M_A_DQ52 AV54 SA_DQ[51] SA_DQS[6] AK54 M_A_DQS7 M_B_DQ53 AU61 SB_DQ[52] SB_DQS[6] AK61 M_B_DQS7
M_A_DQ53 AT54 SA_DQ[52] SA_DQS[7] M_B_DQ54 AN58 SB_DQ[53] SB_DQS[7]
M_A_DQ54 AP56 SA_DQ[53] M_B_DQ55 AR58 SB_DQ[54]
M_A_DQ55 AP52 SA_DQ[54] M_B_DQ56 AK58 SB_DQ[55]
M_A_DQ56 AN57 SA_DQ[55] M_B_DQ57 AL58 SB_DQ[56]
M_A_DQ57 AN53 SA_DQ[56] M_B_DQ58 AG58 SB_DQ[57]
M_A_DQ58 AG56 SA_DQ[57] M_B_DQ59 AG59 SB_DQ[58]
M_A_DQ59 AG53 SA_DQ[58] M_B_DQ60 AM60 SB_DQ[59]
SA_DQ[59] SB_DQ[60] M_B_A[15:0] 17
M_A_DQ60 AN55 M_B_DQ61 AL59 BF32 M_B_A0
SA_DQ[60] M_A_A[15:0] 16 SB_DQ[61] SB_MA[0]
M_A_DQ61 AN52 BG35 M_A_A0 M_B_DQ62 AF61 BE33 M_B_A1
M_A_DQ62 AG55 SA_DQ[61] SA_MA[0] BB34 M_A_A1 M_B_DQ63 AH60 SB_DQ[62] SB_MA[1] BD33 M_B_A2
M_A_DQ63 AK56 SA_DQ[62] SA_MA[1] BE35 M_A_A2 SB_DQ[63] SB_MA[2] AU30 M_B_A3
SA_DQ[63] SA_MA[2] BD35 M_A_A3 SB_MA[3] BD30 M_B_A4
SA_MA[3] AT34 M_A_A4 SB_MA[4] AV30 M_B_A5
SA_MA[4] AU34 M_A_A5 SB_MA[5] BG30 M_B_A6
SA_MA[5] BB32 M_A_A6 BG39 SB_MA[6] BD29 M_B_A7
SA_MA[6] 17 M_B_BS0 SB_BS[0] SB_MA[7]
BD37 AT32 M_A_A7 BD42 BE30 M_B_A8
16 M_A_BS0 BF36 SA_BS[0] SA_MA[7] AY32 17 M_B_BS1 AT22 SB_BS[1] SB_MA[8] BE28
M_A_A8 M_B_A9
16 M_A_BS1 SA_BS[1] SA_MA[8] 17 M_B_BS2 SB_BS[2] SB_MA[9]
BA28 AV32 M_A_A9 BD43 M_B_A10
16 M_A_BS2 SA_BS[2] SA_MA[9] SB_MA[10]
BE37 M_A_A10 AT28 M_B_A11
SA_MA[10] BA30 M_A_A11 SB_MA[11] AV28 M_B_A12
SA_MA[11] BC30 M_A_A12 AV43 SB_MA[12] BD46 M_B_A13
BE39 SA_MA[12] AW41 17 M_B_CAS# BF40 SB_CAS# SB_MA[13] AT26
M_A_A13 M_B_A14
16 M_A_CAS# SA_CAS# SA_MA[13] 17 M_B_RAS# SB_RAS# SB_MA[14]
BD39 AY28 M_A_A14 BD45 AU22 M_B_A15
B 16 M_A_RAS# SA_RAS# SA_MA[14] 17 M_B_WE# SB_WE# SB_MA[15] B
AT41 AU26 M_A_A15
16 M_A_WE# SA_WE# SA_MA[15]

ES1
ES1 01V010000003
01V010000003

R1.0 S3 circuit: DRAM_RST# to memory should be high during S3


+1.5V
2

R0507
@ 1KOhm
1

R0501 1 2 0Ohm

Q0501
@
R0508 1 2 1KOhm
2 S
D

16,17 DDR3_DRAMRST# CPUDRAMRST# 4


3

R0508 use 1k ohm


G

Design Guide 2.0 p133(471984) 2N7002


1

A A
Close to DIMM
SP0501
1 2
9,21 DRAMRST_CNTRL_PCH
1

R0506
NB_R0402_5MIL_SMALL 4.99KOhm
@ 1%
1

@ C0501
2

0.1UF/10V
2

Title : CPU(3)_DDR3
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 5 of 104
5 4 3 2 1
5 4 3 2 1

+VCCP +VCCP 3,4,7,26,27,32,57,82

+VCORE +VCORE 9,11,80

Voltage for the memory controller and


Vcc for processor core shared cache defined at the
Voltage range: 0.3 - 1.52V motherboard VCCIO_SENSE and
VSS_SENSE_VCCIO
U0301F
D D

25A +VCCP +VCCP

+VCORE AF46
VCCIO34 AG48
8.5A Chief River
VCCIO28 AG50
VCCIO27 Decoupling guide from Intel (EE)

1
A26 AG51
A29 VCC74 VCCIO26 AJ17 C0628 C0631 C0632 C0635 C0634 C0636 C0637 C0613 C0610 C0609 C0606
A31 VCC73 VCCIO23 AJ21 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
+VCCP 1uF * 21pcs
10uF * 10pcs

2
A34 VCC72 VCCIO22 AJ25
VCC71 VCCIO21
A35
VCC70 VCCIO20
AJ43 220uF *1pcs
A38 AJ47
A39 VCC69 VCCIO19 AK50
A42 VCC68 VCCIO18 AK51
C26 VCC67 VCCIO17 AL14
VCC66 VCCIO16

1
C27 AL15
C32 VCC65 VCCIO15 AL16 C0611 C0625 C0626 C0627 C0629 C0630 C0633 C0607 C0608 C0612
C34 VCC64 VCCIO14 AL20 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
C37 VCC63 VCCIO13 AL22
C39 VCC62 VCCIO12 AL26
C42 VCC61 VCCIO11 AL45
D27 VCC60 VCCIO10 AL48
10/08 change
D32 VCC59 VCCIO9 AM16
D34 VCC58 VCCIO8 AM17
VCC57 VCCIO7

1
D37 AM21
D39 VCC56 VCCIO6 AM43 C0618 C0619 C0620 C0621 C0617 C0602 C0603 C0605 C0604 C0601
D42 VCC55 VCCIO5 AM47 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

2
E26 VCC54 VCCIO4 AN20
E28 VCC53 VCCIO3 AN42
E32 VCC52 VCCIO2 AN45
E34 VCC51 VCCIO1 AN48
E37 VCC50 VCCIO0
E38 VCC49
VCC48
CORE SUPPLY
F25
F26 VCC47

PEG AND DDR


F28 VCC46
F32 VCC45
C C
F34 VCC44
F37 VCC43 AA14
F38 VCC42 VCCIO47 AA15
F42 VCC41 VCCIO46 AB17
G42 VCC40 VCCIO45 AB20
H25 VCC39 VCCIO44 AC13
H26 VCC38 VCCIO43 AD16
H28 VCC37 VCCIO42 AD18
H29 VCC36 VCCIO41 AD21
H32 VCC35 VCCIO40 AE14
H34 VCC34 VCCIO39 AE15
H35 VCC33 VCCIO38 AF16
H37 VCC32 VCCIO37 AF18
H38 VCC31 VCCIO36 AF20
H40 VCC30 VCCIO35 AG15
J25 VCC29 VCCIO33 AG16
J26 VCC28 VCCIO32 AG17
J28 VCC27 VCCIO31 AG20
J29 VCC26 VCCIO30 AG21
J32 VCC25 VCCIO29 AJ14
VCC24 VCCIO25
POWER

J34 AJ15
J35 VCC23 VCCIO24
J37 VCC22
J38 VCC21
J40 VCC20
J42 VCC19
K26 VCC18 W16 +VCCIO_CPU_F SP0601 1 2
1A
VCC17 VCCIO49 +VCCP
K27 W17
K29 VCC16 VCCIO48 NB_R0603_32MIL_SMALL
K32 VCC15
K34 VCC14
K35 VCC13
K37 VCC12
K39 VCC11 Cheif River VCCIO_SEL VCCSA
K42 VCC10 BC22 VCCP_SEL R0615 2 @ 1 10KOhm
VCC9 VCCIO_SEL +3VA H 1.05V
L25
L28 VCC8
B VCC7 L 1.00V B
L33
L36 VCC6
L40 VCC5
Filitered(BGA only)
QUIET RAILS

N26 VCC4
N30 VCC3 AM25
N34 VCC2 VCCPQE1 AN22 1 2 +VCCP +VCCP +VCCP +VCCP
VCC1 VCCPQE0 +VCCP
N38 R0613 0Ohm
VCC0
1

2
C0622
1UF/6.3V Close to CPU R0603 Close to VR R0605 Close to CPU R0607 Close to VR R0608
2

75Ohm 54.9Ohm 130Ohm 130Ohm


1% 1% 1% 1%

1
A44 H_CPU_SVIDALRT# R0602 1 2 43Ohm SP0602
VIDALERT# VR_SVID_ALERT# 80
B43 H_CPU_SVIDCLK 1 2 SP0603
SVID

VIDSCLK VR_SVID_CLK 80
C44 H_CPU_SVIDDAT 1 2
VIDSOUT VR_SVID_DATA 80

SP0604
F43 VCC_SENSE_R 1 2 NB_R0402_20MIL_SMALL VCCSENSE
VCCSENSE 80
SENSE LINES

VCC_SENSE G43 VSS_SENSE_R 1 2 NB_R0402_20MIL_SMALL VSSSENSE


VSS_SENSE VSSSENSE 80
SP0605

AN16
VCCIO_SENSE AN17
VSS_SENSE_VCCIO

A A
ES1
01V010000003

Title : CPU(4)_Processor Power


BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev
C VGFTG 1.1

5 forum.hocvienit.vn 4 3 2
Date: Tuesday, December 11, 2012

1
Sheet 6 of 104
5 4 3 2 1

+VCCP +VCCP 3,4,6,26,27,32,57,82

+1.5V +1.5V 4,5,16,17,18,57,83

+VCCSA +VCCSA 57,82

+1.8VS +1.8VS 25,26,84

+VGFX_CORE +VGFX_CORE 9,80

+V_SM_VREF +V_SM_VREF 18

D D

Decoupling guide from Intel PDDG R0.8


+VGFX_CORE
1uF * 11pcs
10uF * 6pcs
22uF * 6pcs
U0301G

+VGFX_CORE
Graphics core voltage Voltage range: 0 - 1.52V
AA46 ( Without Implement S3 circuit)
AB47 VAXG21
AB50 VAXG20
VAXG19
1

1
AB51 AY43 +V_SM_VREF +V_SM_VREF
C0725 C0727 C0731 C0726 C0732 C0729 C0730 C0728 AB52 VAXG18 SM_VREF
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V AB53 VAXG17 +1.5V
+V_SM_REF 10mil
2

2
AB55 VAXG16
AB56 VAXG15
AB58 VAXG14
AB59 VAXG13 AJ28
5A
AC61 VAXG12 VDDQ25 AJ33
AD47 VAXG11 VDDQ24 AJ36
VAXG10 VDDQ23

1
AD48 AJ40
VAXG9 VDDQ22
1

1
AD50 AL30 C0704 C0709 C0705 C0706 C0707 C0708 C0713 C0710 C0712 C0711

- 1.5V RAILS
C0717 C0719 C0722 C0790 C0791 C0788 C0789 C0787 AD51 VAXG8 VDDQ21 AL34 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V AD52 VAXG7 VDDQ20 AL38
2

2
AD53 VAXG6 VDDQ19 AL42
AD55 VAXG5 VDDQ18 AM33
AD56 VAXG4 VDDQ17 AM36
AD58 VAXG3 VDDQ16 AM40
AD59 VAXG2 VDDQ15 AN30
AE46 VAXG1 VDDQ14 AN34
C C
VAXG0 VDDQ13

1
N45 AN38

POWER
VAXG55 VDDQ12
1

@ P47 AR26 C0775 C0774 C0772 C0769 C0767 C0765 C0770 C0768
+ P48 VAXG54 VDDQ11 AR28
C0786 C0738 C0739 C0740 C0741 C0742 C0743 CE0703 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V

2
10UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V P50 VAXG53 VDDQ10 AR30
330UF/2.5V
2

vx_c3528_h79 P51 VAXG52 VDDQ9 AR32


2

P52 VAXG51 VDDQ8 AR34

DDR3
P53 VAXG50 VDDQ7 AR36
P55 VAXG49 VDDQ6 AR40
P56 VAXG48 VDDQ5 AV41 Chief River
P61 VAXG47 VDDQ4 AW26
T48 VAXG46 VDDQ3 BA40
Decoupling guide from Intel (EE)
VAXG45 VDDQ2

GRAPHICS
T58 BB28 >0 SUSB_EC#
T59 VAXG44 VDDQ1 BG33
+1.5VS_VCCDDQ
T61 VAXG43 VDDQ0 1uF * 10pcs
VAXG42
U46
VAXG41
10uF * 8pcs +1.5V_VCCDDQ
V47
V48 VAXG40
V50 VAXG39
V51 VAXG38
+1.5V_VCCDDQ Power Good
V52 VAXG37 (U0404 pin 4)
V53 VAXG36
V55 VAXG35
+0.75VS
V56 VAXG34
VAXG33 Processor I/O supply
V58
V59 VAXG32
>100 ns
voltage for DDR3
W50 VAXG31 (DC + AC specification)
W51 VAXG30
W52 VAXG29
W53 VAXG28
W55 VAXG27
W56 VAXG26
W61 VAXG25
Y48 VAXG24
Y61 VAXG23
VAXG22
Filtered(BGA Only) +1.5V
B +1.5VS_VCCDDQ_R B

1A
QUIET RAILS

SP0701 AM28 R0707 1 2 0Ohm


VCCDQ1
LINES
SENSE

VCCGT_SENSE 2 1 NB_R0402_20MIL_SMALL VCCGT_SENSE_R F45 AN26


80 VCCGT_SENSE VAXG_SENSE VCCDQ0
VSSGT_SENSE 2 1 NB_R0402_20MIL_SMALL VSSGT_SENSE_R G45
80 VSSGT_SENSE VSSAXG_SENSE

1
SP0702
C0714
1UF/6.3V

2
+1.8VS
1.8V RAIL

10/08 change
PLL supply voltage 1.2A BB3
VCCPLL2
(DC + AC specification) BC1
VCCPLL1
1

BC4
C0780 C0761 C0764 VCCPLL0
22UF/6.3V 1UF/6.3V 1UF/6.3V
2

BC43 1 T0701
+VCCSA VDDQ_SENSE BA43 1 T0702
SENSE LINES

VSS_SENSE_VDDQ +VCCP
2.4A L17
L21 VCCSA15
Decoupling guide for A14 (EE) N16 VCCSA14
VCCSA13
1

2
N20
+VCCSA VCCSA12
SA RAIL

C0735 C0736 C0733 C0734 C0737 N22 R0708 R0709


1uF * 5pcs 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V P17 VCCSA11 1KOhm 1KOhm
2

VCCSA10
10uF * 5pcs P20
VCCSA9 VCCSA_SENSE
U10
VCCSA_SENSE
@ @
R16

1
R18 VCCSA8 1 @ 2 VCCSA_SEL0
Close to CPU
R21 VCCSA7 R0704 0Ohm
U15 VCCSA6 VCCSA_SEL1
V16 VCCSA5
V17 VCCSA4 D48 VCCSA_SEL0
VCCSA3 VCCSA_VID[0] VCCSA_SEL0 82
1

2
V18 D49 VCCSA_SEL1
VCCSA2 VCCSA_VID[1] VCCSA_SEL1 82
C0783 C0781 C0792 C0777 C0793 V21 R0701 R0702
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V W20 VCCSA1 1KOhm 1KOhm
+VCCSA_SEL0 +VCCSA_SEL1 VCCSA
2

VCCSA0
Chief River
A L L 0.9V A

1
L H 0.85V
ES1 H L 0.725V
01V010000003
H H 0.675V

Title : CPU(5)_Graphics Power


BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 7 of 104
5 4 3 2 1
5 4 3 2 1

D D

U0301H U0301I

BG17 M4
A13 AM38 BG21 VSS8 VSS230 M58
A17 VSS299 VSS98 AM4 BG24 VSS7 VSS226 M6
A21 VSS298 VSS105 AM42 BG28 VSS6 VSS229 N1
A25 VSS297 VSS97 AM45 BG37 VSS5 VSS225 N17
A28 VSS296 VSS96 AM48 BG41 VSS4 VSS224 N21
A33 VSS295 VSS95 AM58 BG45 VSS3 VSS223 N25
A37 VSS294 VSS94 AN1 BG49 VSS2 VSS222 N28
A40 VSS293 VSS93 AN21 BG53 VSS1 VSS221 N33
A45 VSS292 VSS92 AN25 BG9 VSS0 VSS220 N36
A49 VSS291 VSS91 AN28 C29 VSS10 VSS219 N40
A53 VSS290 VSS90 AN33 C35 VSS288 VSS218 N43
A9 VSS289 VSS89 AN36 C40 VSS287 VSS217 N47
AA1 VSS300 VSS88 AN40 D10 VSS286 VSS216 N48
AA13 VSS177 VSS87 AN43 D14 VSS283 VSS215 N51
AA50 VSS175 VSS86 AN47 D18 VSS282 VSS214 N52
AA51 VSS174 VSS85 AN50 D22 VSS281 VSS213 N56
AA52 VSS173 VSS84 AN54 D26 VSS280 VSS212 N61
AA53 VSS172 VSS83 AP10 D29 VSS279 VSS211 P14
AA55 VSS171 VSS81 AP51 D35 VSS278 VSS209 P16
AA56 VSS170 VSS80 AP55 D4 VSS277 VSS208 P18
AA8 VSS169 VSS79 AP7 D40 VSS285 VSS207 P21
AB16 VSS176 VSS82 AR13 D43 VSS276 VSS206 P58
AB18
AB21
VSS168
VSS167
VSS166
VSS77
VSS76
VSS75
AR17
AR21
D46
D50
VSS275
VSS274
VSS273
VSS VSS205
VSS204
VSS210
P59
P9
AB48 AR41 D54 R17
AB61 VSS165 VSS74 AR48 D58 VSS272 VSS202 R20
AC10 VSS164 VSS73 AR61 D6 VSS271 VSS201 R4
AC14 VSS162 VSS72 AR7 E25 VSS284 VSS203 R46
C C
AC46 VSS161 VSS78 AT14 E29 VSS269 VSS200 T1
AC6 VSS160 VSS70 AT19 E3 VSS268 VSS199 T47
AD17 VSS163 VSS69 AT36 E35 VSS270 VSS198 T50
AD20 VSS158 VSS68 AT4 E40 VSS267 VSS197 T51
AD4 VSS157 VSS71 AT45 F13 VSS266 VSS196 T52
AD61
AE13
VSS159
VSS156
VSS154
VSS VSS67
VSS66
VSS65
AT52
AT58
F15
F19
VSS265
VSS264
VSS263
VSS195
VSS194
VSS193
T53
T55
AE8 AU1 F29 T56
AF1 VSS155 VSS64 AU11 F35 VSS262 VSS192 U13
AF17 VSS153 VSS62 AU28 F40 VSS261 VSS190 U8
AF21 VSS152 VSS61 AU32 F55 VSS260 VSS191 V20
AF47 VSS151 VSS60 AU51 G48 VSS259 VSS189 V61
AF48 VSS150 VSS59 AU7 G51 VSS257 VSS188 W13
AF50 VSS149 VSS63 AV17 G6 VSS256 VSS186 W15
AF51 VSS148 VSS58 AV21 G61 VSS258 VSS185 W18
AF52 VSS147 VSS57 AV22 H10 VSS255 VSS184 W21
AF53 VSS146 VSS56 AV34 H14 VSS253 VSS183 W46
AF55 VSS145 VSS55 AV40 H17 VSS252 VSS182 W8
AF56 VSS144 VSS54 AV48 H21 VSS251 VSS187 Y4
AF58 VSS143 VSS53 AV55 H4 VSS250 VSS181 Y47
AF59 VSS142 VSS52 AW13 H53 VSS254 VSS180 Y58
AG10 VSS141 VSS50 AW43 H58 VSS249 VSS179 Y59
AG14 VSS139 VSS49 AW61 J1 VSS248 VSS178
AG18 VSS138 VSS48 AW7 J49 VSS247
AG47 VSS137 VSS51 AY14 J55 VSS246
AG52 VSS136 VSS45 AY19 K11 VSS245
AG61 VSS135 VSS44 AY30 K21 VSS243
AG7 VSS134 VSS43 AY36 K51 VSS242 A5
AH4 VSS140 VSS42 AY4 K8 VSS241 VSS_NCTF13 A57
AH58 VSS133 VSS47 AY41 L16 VSS244 VSS_NCTF12 BC61
AJ13 VSS132 VSS41 AY45 L20 VSS240 VSS_NCTF6 BD3
AJ16 VSS130 VSS40 AY49 L22 VSS239 VSS_NCTF5 BD59

NCTF
AJ20 VSS129 VSS39 AY55 L26 VSS238 VSS_NCTF4 BE4
AJ22 VSS128 VSS38 AY58 L30 VSS237 VSS_NCTF3 BE58
AJ26 VSS127 VSS37 AY9 L34 VSS236 VSS_NCTF2 BG5
AJ30 VSS126 VSS46 BA1 L38 VSS235 VSS_NCTF1 BG57
AJ34 VSS125 VSS36 BA11 L43 VSS234 VSS_NCTF0 C3
B
AJ38 VSS124 VSS35 BA17 L48 VSS233 VSS_NCTF11 C58 B
AJ42 VSS123 VSS34 BA21 L61 VSS232 VSS_NCTF10 D59
AJ45 VSS122 VSS33 BA26 M11 VSS231 VSS_NCTF9 E1
AJ48 VSS121 VSS32 BA32 M15 VSS228 VSS_NCTF8 E61
AJ7 VSS120 VSS31 BA48 VSS227 VSS_NCTF7
AK1 VSS131 VSS30 BA51
AK52 VSS119 VSS29 BB53
AL10 VSS118 VSS28 BC13
VSS117 VSS26
BGA only
AL13 BC5 All NCTF pins should be test points
AL17 VSS116 VSS27 BC57 ES1
VSS115 VSS25 and should be routed as trace.
AL21 BD12 01V010000003
AL25 VSS114 VSS23 BD16
AL28 VSS113 VSS22 BD19
AL33 VSS112 VSS21 BD23
AL36 VSS111 VSS20 BD27
AL40 VSS110 VSS19 BD32
AL43 VSS109 VSS18 BD36
AL47 VSS108 VSS17 BD40
AL61 VSS107 VSS16 BD44
AM13 VSS106 VSS15 BD48
AM20 VSS104 VSS14 BD52
AM22 VSS103 VSS13 BD56
AM26 VSS102 VSS12 BD8
AM30 VSS101 VSS24 BE5
AM34 VSS100 VSS11 BG13
VSS99 VSS9

ES1
01V010000003

A A

Title : CPU(6)_GND
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 8 of 104
5 4 3 2 1
5 4 3 2 1

U0301E
Chief River
CFG strapping information: B50 BE7 DDR_WR_VREF01
C51 CFG[0] RSVD7 BG7 DDR_WR_VREF02
D
CFG2 B54 CFG[1] RSVD2 D
D53 CFG[2]
CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x CFG[3]
CFG4 A51 N42
CFG5 C53 CFG[4] RSVD31 L42
- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition CFG[5] RSVD36
CFG6 C55 L45
- 0: Lane Numbers Reversed CFG7 H49 CFG[6] RSVD35 L47
A55 CFG[7] RSVD34
H51 CFG[8]
K49 CFG[9] M13
CFG[4]: Embedded DisplayPort Detection CFG[10] RSVD33
K53 M14
F53 CFG[11] RSVD32 U14
- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort G53 CFG[12] RSVD28 W14
- 0: Enabled ; An external Display Port device is connected to the Embedded Display Port L51 CFG[13] RSVD27 P13
F51 CFG[14] RSVD29
D52 CFG[15]
L53 CFG[16] AT49
CFG[6:5]: PCI Express Port Bifurcation Straps CFG[17] RSVD21 K24
RSVD38
- 11 : (Default) x 1 6

RESERVED
T0913 1 VCC_VAL_SENSE H43
- 10 : x 8,x8 T0914 1 VSS_VAL_SENSE K43 VCC_VAL_SENSE AH2
- 01 : Reserved VSS_VAL_SENSE RSVD25 AG13
- 00 : x8,x4,x4 RSVD26 AM14
T0915 1 VAXG_VAL_SENSE H45 RSVD24 AM15
T0916 1 VSSAXG_VAL_SENSE K45 VAXG_VAL_SENSE RSVD23
VSSAXG_VAL_SENSE
CFG[7]: PEG DEFER TRAINING
N50
T0917 1 VCCAXG_VAL_SENSE F48 RSVD30
- 1: (Default) PEG Train immediately following xxRESETB de assertion VCC_DIE_SENSE
- 0: PEG Wait for BIOS training
H48
K48 RSVD39
RSVD37 A4
DC_TEST_A4 C4
BA19 DC_TEST_C4 D3
CFG2 1 1% 2 AV19 RSVD15 DC_TEST_D3 D1
R0902 @ 1KOhm AT21 RSVD18 DC_TEST_D1 A58
BB21 RSVD22 DC_TEST_A58 A59
BB19 RSVD12 DC_TEST_A59 C59
C C
CFG4 1 1% 2 AY21 RSVD13 DC_TEST_C59 A61
R0903 /eDP 1KOhm BA22 RSVD17 DC_TEST_A61 C61
AY22 RSVD14 DC_TEST_C61 D61
AU19 RSVD16 DC_TEST_D61 BD61
CFG5 1 1% 2 AU21 RSVD20 DC_TEST_BD61 BE61
R0904 1KOhm R1.1 BD21 RSVD19 DC_TEST_BE61 BE59
BD22 RSVD11 DC_TEST_BE59 BG61
BD25 RSVD10 DC_TEST_BG61 BG59
CFG6 1 1% 2 BD26 RSVD9 DC_TEST_BG59 BG58
R0905 @ 1KOhm BG22 RSVD8 DC_TEST_BG58 BG4
BE22 RSVD1 DC_TEST_BG4 BG3
BG26 RSVD6 DC_TEST_BG3 BE3
CFG7 1 1% 2 BE26 RSVD0 DC_TEST_BE3 BG1
R0906 @ 1KOhm BF23 RSVD4 DC_TEST_BG1 BE1
BE24 RSVD3 DC_TEST_BE1 BD1
RSVD5 DC_TEST_BD1

ES1
01V010000003

PROCESSOR DRIVEN Vref PATH WAS STUFFED BY DEFAULT:

1 2 0Ohm
For iFDIM testing
R0907
R0912~ R0917 close to pin < 1 inch
458544_CR_PDDG
@ Q0901A
UM6K1N
DDR_WR_VREF01 1 6 +VGFX_CORE +VCORE
DIMM0_VREF_DQ 18
1

1
2

B B
R0909 R0912 R0915
1KOhm @ 49.9Ohm @ 49.9Ohm
1% @ 1% 1%
2

2
VAXG_VAL_SENSE VCC_VAL_SENSE

5,9,21 DRAMRST_CNTRL_PCH

2
R0913 R0916
@ 100Ohm @ 100Ohm
R0910 1 2 0Ohm
1% 1%

1
@ Q0901B VSSAXG_VAL_SENSE VSS_VAL_SENSE
UM6K1N
DDR_WR_VREF02 4 3
DIMM1_VREF_DQ 18

1
R0914 R0917
1

@ 49.9Ohm @ 49.9Ohm
5

R0911 1% 1%
1KOhm

2
1% @
2

5,9,21 DRAMRST_CNTRL_PCH

A A

Title : CPU(7)_RESERVED
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 9 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : CPU_PCH_XDP*****
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev
Custom VGFTG 1.1

5 forum.hocvienit.vn
4 3 2
Date: Tuesday, December 11, 2012
1
Sheet 10 of 104
5 4 3 2 1

D D

+VCORE

Chief River

1
Decoupling guide from Intel PDDG R0.8 C1101 C1102 C1110 C1103 C1104 C1105 C1106 C1107 C1108 C1109
+VCORE 2.2uF * 16 pcs 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V

2
22uF * 12 pcs

1
C1111 C1112 C1113 C1114 C1115 C1117
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V

2
C C

1
C1136 C1137 C1138 C1139 C1140 C1141 C1142 C1143
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
1

1
C1144 C1145 C1146 C1147
2 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
B B

A A

Title : CPU DECOUPLING


BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev
B VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 11 of 104
5 4 3 2 1

forum.hocvienit.vn
5 4 3 2 1

+1.5V
Layout Note: Place these caps near SO DIMM 0 +0.75VS
+1.5V +1.5V 4,5,7,17,18,57,83

+0.75VS vx_c0603_small vx_c0603_small vx_c0603_small


+0.75VS 17,57,83

1
+3VS @ +
+3VS 3,4,17,20,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

1
CE1601 C1609 C1610 C1611 C1612 C1613 C1620

1
330UF/2.5V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V C1616 C1617 C1618 C1619
@ @ @ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
1BV080000031

2
+V_VREF_CA_DIMM0 @ @
+V_VREF_CA_DIMM0 18

2
+V_VREF_DQ_DIMM0 vx_c0603_small vx_c0603_small vx_c0603_small
+V_VREF_DQ_DIMM0 18
D D

H4.0mm,REV +1.5V +1.5V


5 M_A_A[15:0] M_A_DQ[63:0] 5 J1601B
75 76
81 VDD1 VDD2 82
J1601A
M_A_DIM0_CLK_DDR0 M_A_A0 98 5 M_A_DQ0 87 VDD3 VDD4 88
A0 DQ0 VDD5 VDD6
1

1
1% M_A_A1 97 7 M_A_DQ1 93 94
A1 DQ1 VDD7 VDD8
1

C1602 150Ohm M_A_A2 96 15 M_A_DQ6 C1605 C1606 99 100 C1607 C1608


10PF/50V R1603 M_A_A3 95 A2 DQ2 17 M_A_DQ5 105 VDD9 VDD10 106
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
@ @ M_A_A4 92 A3 DQ3 4 M_A_DQ4 111 VDD11 VDD12 112
2

M_A_DIM0_CLK_DDR#0 M_A_A5 91 A4 DQ4 6 M_A_DQ2 117 VDD13 VDD14 118


2

M_A_A6 90 A5 DQ5 16 M_A_DQ3 123 VDD15 VDD16 124


M_A_A7 86 A6 0 DQ6 18 M_A_DQ7 VDD17 VDD18
M_A_DIM0_CLK_DDR1 M_A_A8 89 A7 DQ7 21 M_A_DQ13
A8 DQ8
1

1% M_A_A9 85 23 M_A_DQ8 2 3
A9 DQ9 VSS1 VSS2
1

C1601 150Ohm M_A_A10 107 33 M_A_DQ10 Layout Note: Place these caps near SO DIMM 0 8 9
10PF/50V R1604 M_A_A11 84 A10/AP DQ10 35 M_A_DQ14 13 VSS3 VSS4 14
@ @ M_A_A12 83 A11 DQ11 22 M_A_DQ9 19 VSS5 VSS6 20
2

M_A_DIM0_CLK_DDR#1 M_A_A13 119 A12/BC# DQ12 24 M_A_DQ12 25 VSS7 VSS8 26


2

M_A_A14 80 A13 DQ13 34 M_A_DQ15 31 VSS9 VSS10 32


M_A_A15 78 A14 1 DQ14 36 M_A_DQ11 37 VSS11 VSS12 38
A15 DQ15 39 M_A_DQ16 43 VSS13 VSS14 44
PLACE CLOSE TO SODIMM DQ16 41 M_A_DQ21 48 VSS15 VSS16 49
102 DQ17 51 M_A_DQ23 54 VSS17 VSS18 55
5 M_A_DIM0_CLK_DDR1 CK1 DQ18 VSS19 VSS20
104 53 M_A_DQ18 60 61
5 M_A_DIM0_CLK_DDR#1 101 CK1# DQ19 40 65 VSS21 VSS22 66
M_A_DQ20
5 M_A_DIM0_CLK_DDR0 CK0 DQ20 VSS23 VSS24
C 103 42 M_A_DQ17 71 72 C
5 M_A_DIM0_CLK_DDR#0 CK0# DQ21 50 127 VSS25 VSS26 128
M_A_DQ22
121
2 DQ22 52 M_A_DQ19 133 VSS27 VSS28 134
5 M_A_DIM0_CS#1 S1# DQ23 VSS29 VSS30
114 57 M_A_DQ29 138 139
5 M_A_DIM0_CS#0 S0# DQ24 59 144 VSS31 VSS32 145
M_A_DQ24
120 DQ25 67 M_A_DQ26 150 VSS33 VSS34 151
5 M_A_DIM0_ODT1 116 ODT1 DQ26 69 155 VSS35 VSS36 156
M_A_DQ31
5 M_A_DIM0_ODT0 ODT0 DQ27 VSS37 VSS38
56 M_A_DQ30 161 162
113 DQ28 58 M_A_DQ28 167 VSS39 VSS40 168
5 M_A_WE# WE# DQ29 VSS41 VSS42
110 68 M_A_DQ25 172 173
5 M_A_RAS#
115 RAS# 3 DQ30 70 M_A_DQ27 178 VSS43 VSS44 179
5 M_A_CAS# CAS# DQ31 129 184 VSS45 VSS46 185
M_A_DQ39
79 DQ32 131 M_A_DQ37 189 VSS47 VSS48 190
5 M_A_BS2 BA2 DQ33 VSS49 VSS50
108 141 M_A_DQ33 195 196
5 M_A_BS1 109 BA1 DQ34 143 VSS51 VSS52
M_A_DQ38
5 M_A_BS0 BA0 DQ35 130 M_A_DQ32 207
74 DQ36 132 M_A_DQ36 T1601 1 PM_EXTTS#0_DIM_A 198 GND1 208
5 M_A_DIM0_CKE1 CKE1 DQ37 EVENT# GND2
73 140 M_A_DQ35 125
5 M_A_DIM0_CKE0 CKE0 4 DQ38 142 M_A_DQ34 Reserve
TEST 205 MAX: 0.75A
1 2 RN1601A 201 DQ39 147 M_A_DQ40 77 NP_NC1 206
SMBus Slave Address: A0H 3
10KOhm
4 RN1601B 197 SA1 DQ40 149 M_A_DQ44 122 NC1 NP_NC2 TDC: 0.75A
10KOhm SA0 DQ41 157 NC2 203
M_A_DQ46 +0.75VS
DQ42 159 M_A_DQ47 +V_VREF_CA_DIMM0 VTT1 204 +3VS
5 M_A_DQS[7:0] DQ43 VTT2
M_A_DQS0 M_A_DQS7 188 146 M_A_DQ45 W/S=20/20
M_A_DQS1 M_A_DQS#7 186 DQS7 DQ44 148 M_A_DQ41 126
M_A_DQS2 M_A_DQS6 171 DQS#7 DQ45 158 M_A_DQ43 1 VREFCA 199
M_A_DQS3 M_A_DQS#6 169 DQS6 5 DQ46 160 M_A_DQ42 VREFDQ VDDSPD
DQS#6 DQ47

1
M_A_DQS4 M_A_DQS5 154 163 M_A_DQ53 DDR3_DIMM_204P
M_A_DQS5 M_A_DQS#5 152 DQS5 DQ48 165 M_A_DQ52 C1624 C1623 C1615 C1614
M_A_DQS6 M_A_DQS4 137 DQS#5 DQ49 175 M_A_DQ55 2.2UF/6.3V 0.1UF/16V
12V02GIRM001 0.1UF/16V 2.2UF/6.3V

2
M_A_DQS7 M_A_DQS#4 135 DQS4 DQ50 177 M_A_DQ50 @ @
5 M_A_DQS#[7:0] 64 DQS#4 DQ51 164
M_A_DQS#0 M_A_DQS3 M_A_DQ49
M_A_DQS#1 M_A_DQS#3 62 DQS3 DQ52 166 M_A_DQ48
M_A_DQS#2 M_A_DQS2 47 DQS#3 DQ53 174 M_A_DQ54 +V_VREF_DQ_DIMM0
M_A_DQS#3 M_A_DQS#2 45 DQS2 6 DQ54 176 M_A_DQ51 W/S=20/20
M_A_DQS#4 M_A_DQS1 29 DQS#2 DQ55 181 M_A_DQ58
M_A_DQS#5 M_A_DQS#1 27 DQS1 DQ56 183 M_A_DQ62
DQS#1 DQ57

1
M_A_DQS#6 M_A_DQS0 12 191 M_A_DQ57
B
M_A_DQS#7 M_A_DQS#0 10 DQS0 DQ58 193 M_A_DQ61 C1622 C1625
B
DQS#0 DQ59 180 M_A_DQ63 2.2UF/6.3V 0.1UF/16V

2
187 DQ60 182 M_A_DQ56 @
170 DM7 DQ61 192 M_A_DQ60
DM should connect to GND directly 153 DM6 7 DQ62 194 M_A_DQ59
Design Guide 0.9 p86 (436735) 136 DM5 DQ63
63 DM4
46 DM3
28 DM2
11 DM1
DM0
202 30
17,28,31 SMB_CLK_S SCL RESET# DDR3_DRAMRST# 5,17
200
17,28,31 SMB_DAT_S SDA
DDR3_DIMM_204P

12V02GIRM001
M: 1202-000R000
S: 1202-00K7000
S: 1202-00LP000

A A

Title : DDR3(1)_SO-DIMM0
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 16 of 104
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V 4,5,7,16,18,57,83 +1.5V +0.75VS


+0.75VS +0.75VS 16,57,83 Layout Note: Place these caps near SO DIMM 1
+3VS +3VS 3,4,16,20,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

1
@ +

1
CE1701 C1709 C1710 C1711 C1712 C1713 C1726
+V_VREF_CA_DIMM0 330UF/2.5V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V C1716 C1717 C1718 C1719
+V_VREF_CA_DIMM0 16,18
@ @ @ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
1BV080000031

2
+V_VREF_DQ_DIMM0 @ @
+V_VREF_DQ_DIMM0 16,18

D D

M_B_DIM0_CLK_DDR0
H4.0mm,STD
1
1%
1

C1720 150Ohm +1.5V +1.5V


5 M_B_A[15:0] M_B_DQ[63:0] 5
10PF/50V R1707
@ @ J1701A J1701B
2

M_B_DIM0_CLK_DDR#0 M_B_A0 98 5 M_B_DQ0 75 76


2

M_B_A1 97 A0 DQ0 7 M_B_DQ4 81 VDD1 VDD2 82


A1 DQ1 VDD3 VDD4

1
M_B_A2 96 15 M_B_DQ2 87 88
M_B_DIM0_CLK_DDR1 M_B_A3 95 A2 DQ2 17 M_B_DQ6 C1705 C1706 93 VDD5 VDD6 94 C1707 C1708
A3 DQ3 VDD7 VDD8
1

1% M_B_A4 92 4 M_B_DQ5 0.1UF/16V 0.1UF/16V 99 100 0.1UF/16V 0.1UF/16V

2
A4 DQ4 VDD9 VDD10
1

C1721 150Ohm M_B_A5 91 6 M_B_DQ1 105 106


10PF/50V R1708 M_B_A6 90 A5 DQ5 16 M_B_DQ3 111 VDD11 VDD12 112
@ @ M_B_A7 86 A6 0 DQ6 18 M_B_DQ7 117 VDD13 VDD14 118
2

M_B_DIM0_CLK_DDR#1 M_B_A8 89 A7 DQ7 21 M_B_DQ12 123 VDD15 VDD16 124


2

M_B_A9 85 A8 DQ8 23 M_B_DQ8 VDD17 VDD18


M_B_A10 107 A9 DQ9 33 M_B_DQ10
Layout Note: Place these caps near SO DIMM 1
M_B_A11 84 A10/AP DQ10 35 M_B_DQ14 2 3
PLACE CLOSE TO SODIMM M_B_A12 83 A11 DQ11 22 M_B_DQ13 8 VSS1 VSS2 9
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ9 13 VSS3 VSS4 14
M_B_A14 80 A13 DQ13 34 M_B_DQ11 19 VSS5 VSS6 20
M_B_A15 78 A14 1 DQ14 36 M_B_DQ15 25 VSS7 VSS8 26
A15 DQ15 39 M_B_DQ20 31 VSS9 VSS10 32
DQ16 41 M_B_DQ16 37 VSS11 VSS12 38
102 DQ17 51 M_B_DQ18 43 VSS13 VSS14 44
5 M_B_DIM0_CLK_DDR1 CK1 DQ18 VSS15 VSS16
104 53 M_B_DQ19 48 49
5 M_B_DIM0_CLK_DDR#1 CK1# DQ19 VSS17 VSS18
101 40 M_B_DQ22 54 55
5 M_B_DIM0_CLK_DDR0 103 CK0 DQ20 42 60 VSS19 VSS20 61
M_B_DQ23
5 M_B_DIM0_CLK_DDR#0 CK0# DQ21 VSS21 VSS22
50 M_B_DQ17 65 66
121
2 DQ22 52 M_B_DQ21 71 VSS23 VSS24 72
5 M_B_DIM0_CS#1 S1# DQ23 VSS25 VSS26
114 57 M_B_DQ28 127 128
5 M_B_DIM0_CS#0 S0# DQ24 VSS27 VSS28
59 M_B_DQ29 133 134
120 DQ25 67 M_B_DQ26 138 VSS29 VSS30 139
5 M_B_DIM0_ODT1 ODT1 DQ26 VSS31 VSS32
C 116 69 M_B_DQ30 144 145 C
5 M_B_DIM0_ODT0 ODT0 DQ27 56 150 VSS33 VSS34 151
M_B_DQ24
113 DQ28 58 M_B_DQ25 155 VSS35 VSS36 156
5 M_B_WE# WE# DQ29 VSS37 VSS38
110 68 M_B_DQ27 161 162
5 M_B_RAS# 115 RAS# 3 DQ30 70 M_B_DQ31 167 VSS39 VSS40 168
5 M_B_CAS# CAS# DQ31 VSS41 VSS42
129 M_B_DQ37 172 173
79 DQ32 131 M_B_DQ33 178 VSS43 VSS44 179
5 M_B_BS2 BA2 DQ33 VSS45 VSS46
108 141 M_B_DQ39 184 185
5 M_B_BS1 BA1 DQ34 VSS47 VSS48
109 143 M_B_DQ35 189 190
5 M_B_BS0 BA0 DQ35 130 195 VSS49 VSS50 196
M_B_DQ32
74 DQ36 132 M_B_DQ36 VSS51 VSS52
5 M_B_DIM0_CKE1 73 CKE1 DQ37 140 207
M_B_DQ34
5 M_B_DIM0_CKE0 CKE0 4 DQ38 142 M_B_DQ38 T1701 1 PM_EXTTS#0_DIM_B 198 GND1 208
RN1701A 1 2 10KOhm 201 DQ39 147 M_B_DQ41 125 EVENT# GND2
+3VS SA1 DQ40 TEST
SMBus Slave Address: A4H RN1701B 3 4 10KOhm 197 149 M_B_DQ42 Reserve 205
SA0 DQ41 157 M_B_DQ46 77 NP_NC1 206
DQ42 159 M_B_DQ45 122 NC1 NP_NC2
5 M_B_DQS[7:0] DQ43 NC2
M_B_DQS0 M_B_DQS7 188 146 M_B_DQ44 203 +0.75VS
M_B_DQS1 M_B_DQS#7 186 DQS7 DQ44 148 M_B_DQ40 +V_VREF_CA_DIMM1 VTT1 204
M_B_DQS2 M_B_DQS6 171 DQS#7 5 DQ45 158 M_B_DQ47 W/S=20/20 VTT2 +3VS
M_B_DQS3 M_B_DQS#6 169 DQS6 DQ46 160 M_B_DQ43 126
M_B_DQS4 M_B_DQS5 154 DQS#6 DQ47 163 M_B_DQ51 1 VREFCA 199
M_B_DQS5 M_B_DQS#5 152 DQS5 DQ48 165 M_B_DQ50 VREFDQ VDDSPD
DQS#5 DQ49

1
M_B_DQS6 M_B_DQS4 137 175 M_B_DQ53 DDR3_DIMM_204P
M_B_DQS7 M_B_DQS#4 135 DQS4 DQ50 177 M_B_DQ52 C1724 C1723 C1715 C1714
5 M_B_DQS#[7:0]
M_B_DQS#0 M_B_DQS3 64 DQS#4 DQ51 164 M_B_DQ54 2.2UF/6.3V 0.1UF/16V
12V02GISM001 0.1UF/16V 2.2UF/6.3V

2
M_B_DQS#1 M_B_DQS#3 62 DQS3 DQ52 166 M_B_DQ55 @ @
M_B_DQS#2 M_B_DQS2 47 DQS#3 DQ53 174 M_B_DQ48
M_B_DQS#3 M_B_DQS#2 45 DQS2 6 DQ54 176 M_B_DQ49
M_B_DQS#4 M_B_DQS1 29 DQS#2 DQ55 181 M_B_DQ60 +V_VREF_DQ_DIMM1
27 DQS1 DQ56 183
M_B_DQS#5 M_B_DQS#1
DQS#1 DQ57
M_B_DQ63 W/S=20/20
M_B_DQS#6 M_B_DQS0 12 191 M_B_DQ58
M_B_DQS#7 M_B_DQS#0 10 DQS0 DQ58 193 M_B_DQ62
DQS#0 DQ59

1
180 M_B_DQ57
187 DQ60 182 M_B_DQ61 C1722 C1725
170 DM7 DQ61 192 M_B_DQ59 2.2UF/6.3V
7 0.1UF/16V

2
153 DM6 DQ62 194 M_B_DQ56 @
136 DM5 DQ63
B
DM should connect to GND directly DM4 B
Design Guide 0.9 p86 (436735) 63
46 DM3
28 DM2
11 DM1
DM0
202 30
16,28,31 SMB_CLK_S 200 SCL RESET# DDR3_DRAMRST# 5,16
16,28,31 SMB_DAT_S SDA
DDR3_DIMM_204P

12V02GISM001
M: 1202-00HK000
S: 1202-00K4000
S: 1202-00LU000

A A

Title : DDR3(2)_SO-DIMM1
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 17 of 104
5 4 3 2 1
5 4 3 2 1

+V_VREF_CA_DIMM0 +V_VREF_CA_DIMM0 16

+V_VREF_DQ_DIMM0 +V_VREF_DQ_DIMM0 16

D +V_VREF_CA_DIMM1 +V_VREF_CA_DIMM1 17 D

+V_VREF_DQ_DIMM1
DDR3 Vref +V_SM_VREF
+V_VREF_DQ_DIMM1

+V_SM_VREF 7
17

+V_SM_VREF
+V_VREF_CA_DIMM0
SP1801
R1805 1 @ 2 0Ohm 2 1
30,83 M_VREF
NB_R0402_20MIL_SMALL +V_VREF_CA_DIMM1

SP1802
2 1

NB_R0402_20MIL_SMALL
For DDR3_VREF command & address.

M1: Fixed SO-DIMM VREF_DQ +1.5V +1.5V


+V_VREF_DQ_DIMM0 +V_VREF_DQ_DIMM1 M3 test only
C C

2
R1807 R1811
1KOhm R1801 1 2 0Ohm R1802 1 @ 2 0Ohm 1KOhm
@

1
R1804 1 2 0Ohm R1803 1 @ 2 0Ohm
1

1
C1801 R1808 C1802 R1810
0.1UF/25V 1KOhm SP1804 0.1UF/25V 1KOhm
2

2
2 1 @ @
9 DIMM0_VREF_DQ
2

2
NB_R0402_20MIL_SMALL
SP1805
2 1
9 DIMM1_VREF_DQ
NB_R0402_20MIL_SMALL

Default M1 M3
M3: Processor Generated SO-DIMM VREFDQ
B – New Requirement B

If support M3 :
1. Mount R1802,R1803,R1805,R1806,R1810,R1811,C1802
2. Un mount R1801,R1804

A A

Title :DDR3(3)_CA/DQ Voltage


BG1-CSC-HW R&D Dept.5 Engineer:
Size Project Name Rev
B VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 18 of 104
5 4 3 2 1

forum.hocvienit.vn
5 4 3 2 1

RTC battery +VCC_RTC +VCC_RTC 22,27


+3VA +VCC_RTC
+RTCBAT +3VA +3VA 6,30,33,37,57,60,65,81,88,93
D2001
1 +3VS +3VS 3,4,16,17,21,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92
3
R2001 2 1 1KOhm +RTC_BAT 2
+3VSUS_ORG +3VSUS_ORG 21,22,24,25,27

1
C2003
0.8V/0.2mA 1UF/6.3V Request by CSC for CMOS clear function +VTT_PCH_VCCIO +VTT_PCH_VCCIO 26,27

1
J2001 07V030000001

2
3 BATT_HOLDER_2P
4 CMOS Settings JRST2001 TPM Settings JRST2002 +5VS +5VS 27,30,31,36,37,46,48,50,51,56,57,58,62,66,80,87,91
12V20GBSM000
GND Clear ME RTC
M: 1220-001O000 Clear CMOS Shunt Registers Shunt

2
D
S: 1220-00F2000 Keep ME RTC
D

S :1220-00HD000 Keep CMOS Open Registers Open


GND

+VCC_RTC C2001 2 1 RTC_X1


RTCRST# RC delay
18PF/50V
should be 18ms~25ms GND

1
2 1

1
R2003 20KOhm 2
Xtal Spec:NC X2001 R2002
R1.1 2012/11/30 delete
1

3 32.768KHZ 10MOhm
1

C2004 JRST2001
1

1UF/6.3V SGL_JUMP

2
2
2

4
U2001A
2

EC reset CMOS feature A20 C38


RTCX1 FWH0/LAD0 LPC_AD0 30,44
SP2005 A38

LPC
FWH1/LAD1 LPC_AD1 30,44
C2002 2 1 RTC_X2_C 2 1 RTC_X2 C20 B37
LPC_AD2 30,44
GND GND 18PF/50V RTCX2 FWH2/LAD2 C37
FWH3/LAD3 LPC_AD3 30,44
GND NB_R0402_20MIL_SMALL RTC_RST# D20
RTCRST# D36
FWH4/LFRAME# LPC_FRAME# 30,44
R2004 2 1 20KOhm SRTC_RST# G22
SRTCRST# E36 SNN_PCH_DRQ#0 1 T2024

RTC
SM_INTRUDER# K22 LDRQ0# K36 GPIO23 1 T2023
INTRUDER# LDRQ1#/GPIO23
1

+VCC_RTC R2006 2 1% 1 330KOhm PCH_INTVRMEN C17 V5 INT_SERIRQ 30,44


INTVRMEN SERIRQ
2

C2005 JRST2002 INTVRMEN: Integrated SUS 1.05V VRM Enables


1

R2005 1UF/6.3V SGL_JUMP


Low: Enable External VRs
2

1MOhm AM3 SATA_RXN0 51


High:Enable Internal VRs
2

R2035 33Ohm ACZ_BCLK N34 SATA0RXN AM1


36 ACZ_BCLK_AUD SATA_RXP0 51
2

HDA_BCLK SATA0RXP

SATA 6G
AP7 SATA_TXN0 51 0.HDD
1

PCH_INTVRMEN R2030 2 1% 1 330KOhm ACZ_SYNC L34 SATA0TXN AP5


HDA_SYNC SATA0TXP SATA_TXP0 51
@
C T10 AM10 C
GND GND GND 36 SB_SPKR SPKR SATA1RXN AM8
R2052 33Ohm ACZ_RST# K34 SATA1RXP AP11
36,37 ACZ_RST#_AUD HDA_RST# SATA1TXN AP10
SATA1TXP
+5VS E34 AD7
36 ACZ_SDIN0 HDA_SDIN0 SATA2RXN AD5 SATA_RXN2 51
SATA2RXP SATA_RXP2 51
reserved for leakage G34 AH5 2.ODD
HDA_SDIN1 SATA2TXN SATA_TXN2 51
AH4
C34 SATA2TXP SATA_TXP2 51
Q2010 SP2006
1

IHDA
HDA_SDIN2
G

30 PCH_FLASH_DESCRIPTOR 2 1 AB8
R2009 ACZ_SYNC_C ACZ_SYNC A34 SATA3RXN AB10
2 S

36 ACZ_SYNC_AUD HDA_SDIN3 SATA3RXP


D

33Ohm NB_R0402_20MIL_SMALL AF3


SATA3TXN
2

2N7002 AF1
R2011 R2012 1 @ 2 0Ohm R2055 33Ohm ACZ_SDOUT A36 SATA3TXP
36 ACZ_SDOUT_AUD

SATA
1MOhm HDA_SDO Y7
SATA4RXN Y5
10V240000006 SATA4RXP
T2003 1 HDA_DOCK_EN# C36 AD3
1

HDA_DOCK_EN#/GPIO33 SATA4TXN AD1


GPIO13 N32 SATA4TXP
GND HDA_DOCK_RST#/GPIO13 Y3
+3VSUS_ORG SATA5RXN Y1
SATA5RXP AB3
PCH_JTAG_TCK_BUF J3 SATA5TXN AB1 R1.1
GPIO13 R2028 1 2 10KOhm JTAG_TCK SATA5TXP
PCH_JTAG_TMS H7 Y11 +VTT_PCH_VCCIO

JTAG
JTAG_TMS SATAICOMPO
PCH_JTAG_TDI K5 Y10 SATA_COMP R2007 1% 35.7OHM
JTAG_TDI SATAICOMPI
XDP reserved +3VSUS_ORG PCH_JTAG_TDO H1
JTAG_TDO AB12 +VTT_PCH_VCCIO
SATA3RCOMPO 1%
PCH_JTAG_TMS @ R2040 1 1% 2 220Ohm AB13 SATA3_COMP R2047 42.2Ohm
PCH_JTAG_TDO @ R2038 1 1% 2 220Ohm SATA3COMPI
PCH_JTAG_TDI @ R2039 1 1% 2 220Ohm +3VS
T3 AH1 RBIAS_SATA3 R2048 1 1% 2 750Ohm
Pull High
28,30 SPI_CLK SPI_CLK SATA3RBIAS GND
@ R2041 1 1% 2 100Ohm Y14 INT_SERIRQ R2026 1 2 10KOhm
B 28 SPI_CS#0 SPI_CS0# +3VS B
@ R2042 1 1% 2 100Ohm
@ R2043 1 1% 2 100Ohm T1

SPI
28,30 SPI_CS#1 SPI_CS1#
PCH_JTAG_TCK_BUF @ R2044 1 2 51Ohm P3 SATALED# R2025 1 @ 2 10KOhm
SATALED#

28,30 SPI_SI V4 V14 PCB_ID8


SPI_MOSI SATA0GP/GPIO21 PCB_ID8 25
SP2003
GND U3 P1 BBS_BIT0_R 2 1
28,30 SPI_SO SPI_MISO SATA1GP/GPIO19 BBS_BIT0 24
NB_R0402_20MIL_SMALL
COUGAR_POINT_ES1

Strap information:
HM70: 0200-00PT0TB
+3VS
HM76: 0200-00P20TB
SB_SPKR: No reboot strap
Low: Disable SB_SPKR R2020 1 @ 2 1KOhm
High:Enable
+3VSUS_ORG
ACZ_SDOUT:
1.Flash descriptor security: ACZ_SDOUT R2034 1 @ 2 1KOhm
Sampled Low: in effect.
Sampled High: override
2.ACZ_SDOUT which sample high on the
rising edge of PWROK will also disable Intel ME.
+3VSUS_ORG

ACZ_SYNC: On Die PLL VR voltage selector ACZ_SYNC R2036 1 2 1KOhm


Low: 1.8V
High: 1.5V
note : VCCVRAM use +1.5VS in mobile
CRB has no strap
Hrron River Platform Schematic Design
Checklist(438390 page 48)

A A

PCH(1)_SATA,IHDA,RTC,LPC
Title :
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 20 of 104
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 3,4,16,17,20,22,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

+VTT_PCH_ORG +VTT_PCH_ORG 22,26,27

+3VSUS_ORG +3VSUS_ORG 20,22,24,25,27

U2001B

BG34 CLK_BUF_CPYCLK_P R2109 1 2 10KOhm


BJ34 PERn1 E12 EXT_SCI#
D PERp1 SMBALERT#/GPIO11 EXT_SCI# 30 D
AV32
AU32 PETn1 H14 SCL_3A CLK_BUF_EXP_N RN2101A 1 2 10KOhm
PETp1 SMBCLK SCL_3A 28
CLK_BUF_EXP_P RN2101B 3 4 10KOhm
BE34 C9 SDA_3A CLK_BUF_DOT96_N RN2102A 1 2 10KOhm
53 PCIE_RXN_WLAN PERn2 SMBDATA SDA_3A 28
2.WLAN BF34 CLK_BUF_DOT96_P RN2102B 3 4 10KOhm
53 PCIE_RXP_WLAN PERp2
C2104 1 2 0.1UF/25V PCIE_TXN_WLAN_C BB32 CLK_BUF_CKSSCD_N RN2103B 3 4 10KOhm
53 PCIE_TXN_WLAN PETn2
C2112 1 2 0.1UF/25V PCIE_TXP_WLAN_C AY32 CLK_BUF_CKSSCD_P RN2103A 1 2 10KOhm

SMBUS
53 PCIE_TXP_WLAN PETp2 A12
BG36 SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 5,9 1 2 10KOhm
CLK_BUF_REF14 R2116
33 PCIE_RXN_LAN PERn3
3.LAN BJ36 C8 SML0_CLK 1 T2101
33 PCIE_RXP_LAN PERp3 SML0CLK
C2105 1 2 0.1UF/25V PCIE_TXN_LAN_C AV34 CLOCK TERMINATION for FCIM
33 PCIE_TXN_LAN PETn3
C2103 1 2 0.1UF/25V PCIE_TXP_LAN_C AU34 G12 SML0_DAT 1 T2102 Default power-on mode is ICC. GND
33 PCIE_TXP_LAN PETp3 SML0DATA
BF36
BE36
AY34
PERn4
PERp4 C13 SML1_ALERT# 1
R1.1 2012/12/03 NFC delete this port
T2103
BB34 PETn4 SML1ALERT#/PCHHOT#/GPIO74 +3VSUS_ORG
PETp4 E14 SML1_CLK SML1_CLK 28

PCI-E*
BG37 SML1CLK/GPIO58 EXT_SCI# R2117 1 2 10KOhm
BH37 PERn5 M16 SML1_DAT
PERp5 SML1DATA/GPIO75 SML1_DAT 28
AY36 SCL_3A RN2104B 3 4 2.2KOhm
BB36 PETn5
PETp5 SDA_3A RN2104C 5 6 2.2KOhm
BJ38
BG38 PERn6 SML0_CLK RN2104D 7 8 2.2KOhm

Controller
AU36 PERp6 M7
AV36 PETn6 CL_CLK1 SML0_DAT RN2104A 1 2 2.2KOhm
PETp6

Link
BG40 T11
BJ40 PERn7 CL_DATA1 DRAMRST_CNTRL_PCH R2120 1 2 1KOhm
AY40 PERp7
BB40 PETn7 P10 SML1_CLK RN2106B 3 4 2.2KOhm
PETp7 CL_RST1#
BE38 SML1_DAT RN2106A 1 2 2.2KOhm
BC38 PERn8
AW38 PERp8 SML1_ALERT# R2125 1 2 10KOhm
AY38 PETn8
PETp8
C @ C
M10 CLKREQ_PEG#
PEG_A_CLKRQ#/GPIO47 CLKREQ_PEG# 70 +3VS
Y40
Y39 CLKOUT_PCIE0N
CLKOUT_PCIE0P AB37 CLK_PCIE_PEG#_PCH_L R2103 2 1 NB_R0402_20MIL_SMALL DGPU_EDID_SELECT# R2145 1 @ 2 10KOhm
CLKOUT_PEG_A_N CLK_PCIE_PEG#_PCH 70

CLOCKS
CLK_REQ0# J2 AB38 CLK_PCIE_PEG_PCH_L R2104 2 1 NB_R0402_20MIL_SMALL
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P CLK_PCIE_PEG_PCH 70
DGPU_PRSNT# R2126 1 /UMA 2 10KOhm

AB49 AV22 DGPU_PRSNT# R2135 1 2 10KOhm


AB47 CLKOUT_PCIE1N CLKOUT_DMI_N AU22 CLK_EXP_N 4
/VGA
CLKOUT_PCIE1P CLKOUT_DMI_P CLK_EXP_P 4
CLK_REQ1# M1 R1.1
PCIECLKRQ1#/GPIO18 AM12 GND
CLKOUT_DP_N CLK_DP_N 4
AM13
CLKOUT_DP_P CLK_DP_P 4
SP2104 2 1 CLK_PCH_SRC2_N AA48 PCH CLKREQ Setting:
53 CLK_PCIE_WLAN# CLKOUT_PCIE2N +3VS
2.WLAN SP2105 2 1 CLK_PCH_SRC2_P AA47 Not connected to device.
53 CLK_PCIE_WLAN CLKOUT_PCIE2P BF18 CLK_BUF_EXP_N
SP2106 2 1 CLK_REQ2# V10 CLKIN_DMI_N BE18 CLK_BUF_EXP_P
53 CLK_REQ_WLAN# PCIECLKRQ2#/GPIO20 CLKIN_DMI_P CLK_REQ1# R2138 1 2 10KOhm

SP2107 2 1 CLK_PCH_SRC3_N Y37 BJ30 NOTE: Pull-down can be shared 25-MHz is required in: +3VSUS_ORG
33 CLK_PCIE_LAN# CLKOUT_PCIE3N CLKIN_GND1_N
3.LAN SP2108 2 1 CLK_PCH_SRC3_P Y36 BG30 CLK_BUF_CPYCLK_P between P and N signals. 1. FCIM
33 CLK_PCIE_LAN CLKOUT_PCIE3P CLKIN_GND1_P
2. BTM for PCH Display Clock gereration CLK_REQ0# R2127 1 2 10KOhm
33 CLK_REQ_LAN# SP2109 2 1 CLK_REQ3# A8
in Integrated Graphics platforms
PCIECLKRQ3#/GPIO25 G24 CLK_BUF_DOT96_N CLK_REQ6# R2130 1 2 10KOhm
CLKIN_DOT_96N E24 CLK_BUF_DOT96_P
Y43 CLKIN_DOT_96P CLK_REQ5# R2136 1 2 10KOhm
Y45 CLKOUT_PCIE4N
CLKOUT_PCIE4P AK7 CLK_BUF_CKSSCD_N CLK_REQ7# R2131 1 2 10KOhm
CLK_REQ4# L12 CLKIN_SATA_N AK5 CLK_BUF_CKSSCD_P
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P CLK_REQ_PEG_B# R2132 1 2 10KOhm

V45 K45 CLK_BUF_REF14 CLK_REQ4# R2134 1 2 10KOhm


V46 CLKOUT_PCIE5N REFCLK14IN
CLKOUT_PCIE5P
CLK_REQ5# L14 H45 CLK_PCI_FB 24 1 2 GND Connected to device.
PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK C2101 12PF/50V Default : Clock free run. (PD 10K).
+3VS
B Reserver 10K PU for power saving purpose. B
AB42 V47 XTAL25_IN
CLKOUT_PEG_B_N XTAL25_IN

3
AB40 V49 XTAL25_OUT
CLKOUT_PEG_B_P XTAL25_OUT CLK_REQ2# R2128 1 2 10KOhm

2
CLK_REQ_PEG_B# E6 +VCCDIFFCLKN 4
PEG_B_CLKRQ#/GPIO56 R2142 X2103
Y47 XCLK_COMP R2106 1 90.9Ohm 2 1MOhm 25MHZ 2
XCLK_RCOMP GND
V40
V42 CLKOUT_PCIE6N

1
CLKOUT_PCIE6P +3VSUS_ORG

1
CLK_REQ6# T13 SP2110
PCIECLKRQ6#/GPIO45 2 1 XTAL25_OUT_C 1 2
GND
V38 K43 DGPU_EDID_SELECT# C2102 12PF/50V CLK_REQ3# R2149 1 2 10KOhm
V37 CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64
FLEX CLOCKS

NB_R0402_20MIL_SMALL
CLKOUT_PCIE7P F47 CLK_USB48_CR_R R2107 2 1 22Ohm CLKREQ_PEG# R2141 1 2 10KOhm
CLKOUTFLEX1/GPIO65 CLK_USB48_CR 40
CLK_REQ7# K12 pull up at GPU
PCIECLKRQ7#/GPIO46 H47 GPIO66 1 T2127
AK14 CLKOUTFLEX2/GPIO66
CLKOUT_ITPXDP_N
2
AK13 K49 DGPU_PRSNT# C2109
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67
10PF/50V
@ CLK_REQ2# R2133 1 @ 2 10KOhm
1

COUGAR_POINT_ES1
CLK_REQ3# R2129 1 @ 2 10KOhm
HM70: 0200-00PT0TB GND CLKREQ_PEG# R2151 1 @ 2 10KOhm
HM76: 0200-00P20TB Reserved for Wireless team
GND

A A

PCH(2)_PCIE,CLK,SMB,PEG
Title :
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 21 of 104
5 4 3 2 1
5 4 3 2 1

+3VSUS_ORG +3VSUS_ORG 20,21,24,25,27

+3VS +3VS 3,4,16,17,20,21,23,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

+VTT_PCH_ORG +VTT_PCH_ORG 26,27

+3VA +3VA 6,20,30,33,37,57,60,65,81,88,93

+VCC_RTC +VCC_RTC 20,27

+3VSUS +3VSUS 24,27,28,30,33,34,37,53,62,81,92

+5VSUS +5VSUS 27,51,52,62,81,82

+12VSUS +12VSUS 33,36,51,81,91

D D

U2001C

BC24 BJ14
3 DMI_RXN0 DMI0RXN FDI_RXN0 FDI_TXN0 3
BE20 AY14
3 DMI_RXN1 DMI1RXN FDI_RXN1 FDI_TXN1 3
3 DMI_RXN2 BG18 BE14 FDI_TXN2 3
BG20 DMI2RXN FDI_RXN2 BH13
3 DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 3
BC12 FDI_TXN4 3
BE24 FDI_RXN4 BJ12
3 DMI_RXP0 DMI0RXP FDI_RXN5 FDI_TXN5 3
BC20 BG10
3 DMI_RXP1 DMI1RXP FDI_RXN6 FDI_TXN6 3
3 DMI_RXP2 BJ18 BG9 FDI_TXN7 3
BJ20 DMI2RXP FDI_RXN7
3 DMI_RXP3 DMI3RXP BG14 FDI_TXP0 3
AW24 FDI_RXP0 BB14
3 DMI_TXN0 DMI0TXN FDI_RXP1 FDI_TXP1 3
AW20 BF14
3 DMI_TXN1 DMI1TXN FDI_RXP2 FDI_TXP2 3
3 DMI_TXN2 BB18 BG13 FDI_TXP3 3
AV18 DMI2TXN FDI_RXP3 BE12

DMI
FDI
3 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 3
BG12 FDI_TXP5 3
AY24 FDI_RXP5 BJ10
3 DMI_TXP0 DMI0TXP FDI_RXP6 FDI_TXP6 3
AY20 BH9
3 DMI_TXP1 DMI1TXP FDI_RXP7 FDI_TXP7 3
3 DMI_TXP2 AY18
AU18 DMI2TXP
3 DMI_TXP3 DMI3TXP AW16 FDI_INT 3
FDI_INT
BJ24 AV12
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 3
R2201 2 1% 1 49.9Ohm DMI_COMP_R BG25 BC10
+VTT_PCH_ORG DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 3
R2202 2 1% 1 750Ohm RBIAS_CPY BH21 AV14
GND DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 3
BB10 FDI_LSYNC1 3
FDI_LSYNC1

SP2203 R2215 1 @ 2 330KOhm DSWODVREN - On Die DSW VR Enable


GND
ME_SUSPWRDNACK 2 1 A18 DSWODVREN R2214 1 2 330KOhm HIGH - Enabled(DEFAULT) ; LOW-Disabled
DSWVRMEN +VCC_RTC
C C

System Power Management


NB_R0402_20MIL_SMALL SP2202
T2206 1 SUSACK#_R C12 E22 2 1 PM_RSMRST_R
SUSACK# DPWROK
R2205 2 1 10KOhm PM_SYSRST#_R NB_R0402_20MIL_SMALL
+3VS
K3 B9 PCIE_WAKE# 33,53
D2201 1 2 1.2V/0.1A SYS_RESET# WAKE#
@ +3VSUS_ORG
SYS_PWROK P12 N3
SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 30

4,30,92 PM_PWROK SP2212 2 1 NB_R0402_20MIL_SMALL PM_PCH_PWROK_R T2203 RI# R2223 1 2 10KOhm


L22 G8 PM_SUS_STAT# 1
SP2201 2 1 NB_R0402_20MIL_SMALL PWROK SUS_STAT#/GPIO61 BATLOW# R2224 1 2 10KOhm
T2207
non-iAMT:connected to PWROK. PM_APWROK_R L10 N14 SUSCLK_C 1 PCIE_WAKE# R2225 1 2 1KOhm
APWROK SUSCLK/GPIO62
T2204 ME_PM_SLP_M# R2226 1 @ 2 10KOhm
4 PM_DRAM_PWRGD B13 D10 SLP_S5# 1
DRAMPWROK SLP_S5#/GPIO63 ME_SUSPWRDNACK R2227 1 2 10KOhm
SP2213
PM_RSMRST# 30 PM_RSMRST# 2 1 PM_RSMRST_R C21 H4 PM_SUSC# 30 ME_AC_PRESENT R2228 1 2 10KOhm
RSMRST# SLP_S4#
has PD 10k ohm in EC
NB_R0402_20MIL_SMALL GPIO29 R2229 1 @ 2 10KOhm
K16 F4
30 ME_SUSPWRDNACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SUSB# 30
SP2214
2 1 E20 G10 ME_PM_SLP_M# NC when non-iAMT +3VS
30 PM_PWRBTN# PWRBTN# SLP_A#
NB_R0402_20MIL_SMALL T2205 PM_CLKRUN# R2220 1 2 10KOhm
H20 G16 SLP_SUS# 1
30 ME_AC_PRESENT ACPRESENT/GPIO31 SLP_SUS# PM_PWROK R2221 1 2 10KOhm
T2201
1 BATLOW# E10 AP14 H_PM_SYNC 4
BATLOW#/GPIO72 PMSYNCH
T2202 GND
1 RI# A10 K14 GPIO29 NC when non-intel LAN
RI# SLP_LAN#/GPIO29

B B
COUGAR_POINT_ES1

PANTHERPOINT
HM70: 0200-00PT0TB
HM76: 0200-00P20TB

SYS_PWROK for PCH +12VSUS


+3VSUS
Add for S3 power reduce
U2201 2
PM_PWROK 1 A 5 +3VSUS +5VSUS R2231
VCC
100KOhm
2 B 1%
92 DELAY_VR_AND_ALL_SYS
@
1
1

3 4 SYS_PWROK
GND
1

Y R2232 PS_S3CNTRL_1.5V
Vcc=2~5.5 R2230 10KOhm
10KOhm @
3

@
2

Q2203B
2

5 UM6K1N
@
4
6

SP2211 Q2203A
2 1 2 UM6K1N
24,30,36,57,91,92 SUSB_EC#
@
1

NB_R0402_20MIL_SMALL GND
PM_SUSB# R2241 2 @ 1 0Ohm

GND

A A

Title : PCH(3)_FDI,DMI,SYS PWR


BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 22 of 104
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 3,4,16,17,20,21,22,24,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

D D

U2001D
J47 AP43
45 LCD_BKEN_PCH M45 L_BKLTEN SDVO_TVCLKINN AP45
+3VS 45 L_VDDEN_PCH L_VDD_EN SDVO_TVCLKINP
P45 AM42
45 L_BKLT_CTRL L_BKLTCTL SDVO_STALLN AM40
/VGA_OPT/UMA T40 SDVO_STALLP
2 1 2.2KOhm 45 EDID_CLK_PCH K47 L_DDC_CLK AP39
RN2301A L_CTRL_CLK
45 EDID_DATA_PCH L_DDC_DATA SDVO_INTN AP40
/VGA_OPT/UMA T2301 1 L_CTRL_CLK T45 SDVO_INTP
RN2301B 4 3 2.2KOhm L_CTRL_DATA T2302 1 L_CTRL_DATA P39 L_CTRL_CLK
/VGA_OPT/UMA L_CTRL_DATA
/VGA_OPT/UMA R2301 2 1 2.37KOhm AF37 P38
RN2301D 8 7 2.2KOhm EDID_DATA_PCH R2302 2 @ 1 0Ohm AF36 LVD_IBG SDVO_CTRLCLK M39
LVD_VBG SDVO_CTRLDATA
/VGA_OPT/UMA SP2303 2 1 AE48
RN2301C 6 5 2.2KOhm EDID_CLK_PCH AE47 LVD_VREFH AT49
NB_R0402_20MIL_SMALL LVD_VREFL DDPB_AUXN AT47
GND DDPB_AUXP AT40
/VGA_OPT/UMA AK39 DDPB_HPD

LVDS
2 1 100KOhm 45 LVDSA_LCLKN_PCH AK40 LVDSA_CLK# AV42
R2307 LCD_BKEN_PCH
45 LVDSA_LCLKP_PCH LVDSA_CLK DDPB_0N
/VGA_OPT/UMA AV40
R2308 2 1 100KOhm L_VDDEN_PCH AN48 DDPB_0P AV45
45 LVDSA_L0N_PCH LVDSA_DATA#0 DDPB_1N
AM47 AV46

Digital Display Interface


45 LVDSA_L1N_PCH LVDSA_DATA#1 DDPB_1P
AK47 AU48
45 LVDSA_L2N_PCH AJ48 LVDSA_DATA#2 DDPB_2N AU47
GND
LVDSA_DATA#3 DDPB_2P AV47
AN47 DDPB_3N AV49
45 LVDSA_L0P_PCH LVDSA_DATA0 DDPB_3P
AM49
45 LVDSA_L1P_PCH LVDSA_DATA1
AK49
45 LVDSA_L2P_PCH AJ47 LVDSA_DATA2 P46
LVDSA_DATA3 DDPC_CTRLCLK P42
C C
DDPC_CTRLDATA +3VS
AF40
AF39 LVDSB_CLK# AP47
LVDSB_CLK DDPC_AUXN AP49
AH45 DDPC_AUXP AT38
LVDSB_DATA#0 DDPC_HPD

4
AH47
AF49 LVDSB_DATA#1 AY47 RN2303A RN2303B
AF45 LVDSB_DATA#2 DDPC_0N AY49 2.2KOhm
LVDSB_DATA#3 DDPC_0P 2.2KOhm
AY43 /VGA_OPT/UMA /VGA_OPT/UMA
AH43 DDPC_1N AY45
AH49 LVDSB_DATA0 DDPC_1P BA47

3
AF47 LVDSB_DATA1 DDPC_2N BA48
AF43 LVDSB_DATA2 DDPC_2P BB47
LVDSB_DATA3 DDPC_3N BB49
DDPC_3P

CRT_B_PCH 50 ohm JP2301 2 1 SHORT_PIN 37.5 ohm B_PCH N48 M43


46 CRT_B_PCH CRT_BLUE DDPD_CTRLCLK HDMI_DDC_CLK_PCH 48
CRT_G_PCH 50 ohm JP2302 2 1 SHORT_PIN 37.5 ohm G_PCH P49 M36
46 CRT_G_PCH CRT_GREEN DDPD_CTRLDATA HDMI_DDC_DATA_PCH 48

Display Port D
CRT_R_PCH 50 ohm 2 1 37.5 ohm R_PCH T49
46 CRT_R_PCH CRT_RED
JP2303 SHORT_PIN
AT45 DDPD_AUXN 1 T2303

CRT
DDPD_AUXN
1

T39 AT43 DDPD_AUXP 1 T2304


46 DDC_CLK_PCH CRT_DDC_CLK DDPD_AUXP
R2304 R2305 R2306 M40 BH41
46 DDC_DATA_PCH CRT_DDC_DATA DDPD_HPD HDMI_HPD_PCH 48
150Ohm 150Ohm 150Ohm
/VGA_OPT/UMA /VGA_OPT/UMA /VGA_OPT/UMA BB43
M47 DDPD_0N BB45 HDMI_TXN2_PCH 48
46 CRT_HSYNC_PCH HDMI_TXP2_PCH 48
2

M49 CRT_HSYNC DDPD_0P BF44


46 CRT_VSYNC_PCH CRT_VSYNC DDPD_1N HDMI_TXN1_PCH 48
BE44
DDPD_1P BF42 HDMI_TXP1_PCH 48
DDPD_2N HDMI_TXN0_PCH 48
R2303 2 0.5% 1 1KOhm T43 BE42
T42 DAC_IREF DDPD_2P BJ42 HDMI_TXP0_PCH 48
Close to PCH CRT_IRTN DDPD_3N HDMI_CLKN_PCH 48
GND BG42
DDPD_3P HDMI_CLKP_PCH 48
COUGAR_POINT_ES1

GND GND
RN2302A 1 2 2.2KOhm DDC_DATA_PCH HM70: 0200-00PT0TB
B B
+3VS
RN2302B 3 4 2.2KOhm DDC_CLK_PCH HM76: 0200-00P20TB

CRT Disable: (For discrete graphic)


DisPlay Port Disable: (For discrete graphic)
1. NC:
1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
ALL
CRT_HSYCN,CRT_VSYNC
2. 1-kΩ ±0.5% pull-down to GND:
DAC_IREF
3. Connected to GND:
CRT_ITRN LVDS Disable: (For discrete graphic)
4. Connect to +V3.3: 1. NC:
VCCADAC LVDSA_DATA [3:0], LVDSA_DATA# [3:0],
LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],
A LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK# A

L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH


LVD_VREFL, LVD_IBG, LVD_VBG
2. Connected to GND:
VccALVDS,VccTX_LVDS

Title : PCH(4)_DP,LVDS,CRT
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 23 of 104
5 4 3 2 1
5 4 3 2 1

+3VSUS +3VSUS 22,27,28,30,33,34,37,53,62,81,92

+3VS +3VS 3,4,16,17,20,21,22,23,25,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

+3V +3V 44,45,57,91

+3VSUS_ORG +3VSUS_ORG 20,21,22,25,27

+12VS +12VS 28,31,48,91

R1.1 U2001E
AY7
+3VS RSVD1 AV7
D
BG26 RSVD2 AU3 D
BJ26 TP1 RSVD3 BG4
TP2 RSVD4

1
BH25
R2430 BJ16 TP3 AT10
10KOhm BG16 TP4 RSVD5 BC8
AH38 TP5 RSVD6
AH37 TP6 AU2

2
AK43 TP7 RSVD7 AT4
U2402 AK45 TP8 RSVD8 AT3
5 1 R2415 1 2 0Ohm DGPU_PWR_EN C18 TP9 RSVD9 AT1
+3VSUS VCC A TP10 RSVD10
2 N30 AY3
B SUSB_EC# 22,30,36,57,91,92 TP11 RSVD11
R2414 1 2 0Ohm 4 3 H3 AT5
91 VGA_PWRON Y GND GND TP12 RSVD12
AH12 AV3
SN74LVC1G08DCKR AM4 TP13 RSVD13 AV1
AM5 TP14 RSVD14 BB1
R2413 1 2 0Ohm Y13 TP15 RSVD15 BA3
@ K24 TP16 RSVD16 BB5
L24 TP17 RSVD17 BB3
AB46 TP18 RSVD18 BB7
AB45 TP19 RSVD19 BE8

RSVD
TP20 RSVD20 BD4
RSVD21 BF6
RSVD22
B21 AV5
M20 TP21 RSVD23 AV10 NV_RCOMP R2427 1 1% 2 32.4Ohm
TP22 RSVD24 GND
AY16 @
BG46 TP23 AT8
TP24 RSVD25
USB (3.0 for IVB) AY5
RSVD26 BA2
BE28 RSVD27
port1 52 USB3_RX1_N BC30 TP25 AT12
port2 52 USB3_RX2_N TP26 RSVD28
BE32 BF3
BJ32 TP27 RSVD29
BC28 TP28
52 USB3_RX1_P TP29
BE30
52 USB3_RX2_P BF32 TP30
BG32 TP31 C24
C C
AV26 TP32 USBP0N A24 USB_PN0 52 9
52 USB3_TX1_N TP33 USBP0P USB_PP0 52 0.USB - USB3.0 co-lay 3
BB26 C25
52 USB3_TX2_N TP34 USBP1N USB_PN1 52
AU28 B25 1.USB - USB3.0 co-lay
AY30 TP35 USBP1P C26 USB_PP1 52 USB CONN location
TP36 USBP2N USB_PN2 53 1
AU26 A26 2.WIFI/BT module
52 USB3_TX1_P AY26 TP37 USBP2P K28 USB_PP2 53 0
52 USB3_TX2_P USB_PN3 52 TP
AV28 TP38 USBP3N H28
TP39 USBP3P USB_PP3 52 3.USB-Reserve
AW30 E28
TP40 USBP4N D28
USBP4P 4.TV Tuner Card1
USBP5N
C28
A28
HM70:Port4,5 Disable
USBP5P 5.TV Tuner Card2 (Reserve)
C29
USBP6N B29
USBP6P
+3VS
INT_PIRQA#
INT_PIRQB#
K40
K38 PIRQA# USBP7N
N28
M28
HM65:Port6,7 Disable

PCI
INT_PIRQC# H38 PIRQB# USBP7P L30
PIRQC# USBP8N USB_PN8 40
DGPU_HOLD_RST#: INT_PIRQD# G38 K30 8.Card reader
PIRQD# USBP8P USB_PP8 40
1 = Reset is released. RN2403D 7 8 10KOhm MPC_PWR_CTRL# G30
5 6 C46 USBP9N E30 USB_PN9 52
100 ms after DGPU_PWROK RN2403C 10KOhm INT_PIRQB# DGPU_HOLD_RST# 9.USB

USB
70 DGPU_HOLD_RST# REQ1#/GPIO50 USBP9P USB_PP9 52
RN2403B 3 4 10KOhm INT_PIRQC# PCB_ID12 C44 C30
1 2 REQ2#/GPIO52 USBP10N USB_PN10 45
RN2403A 10KOhm INT_PIRQD# DGPU_PWR_EN SP2402 2 1 DGPU_PWR_EN_R E40 A30 10.Camera
REQ3#/GPIO54 USBP10P USB_PP10 45
L32
USBP11N USB_PN11 61
NB_R0402_20MIL_SMALL BBS_BIT1 D47 K32 11.Touch Panel
E42 GNT1#/GPIO51 USBP11P G32 USB_PP11 61
31 KB_LED_ID KB_LED_ID
GNT2#/GPIO53 USBP12N USB_PN12 62
STP_A16OVR F46 E32 11.NFC
GNT3#/GPIO55 USBP12P C32 USB_PP12 62 R1.1 add USB12 for NFC
+3VS USBP13N A32
R2405 1 @ 2 1KOhm MPC_PWR_CTRL# G42 USBP13P
GND PIRQE#/GPIO2
RN2407C 6 5 10KOhm INT_PIRQA# SATA_ODD_DA# G40
51 SATA_ODD_DA# PIRQF#/GPIO3
RN2407D 8 7 10KOhm SATA_ODD_DA# EXTTS_SNI_DRV0_PCH C42 C33
RN2407B 4 3 10KOhm EXTTS_SNI_DRV0_PCH EXTTS_SNI_DRV1_PCH D44 PIRQG#/GPIO4 USBRBIAS#
RN2407A 2 1 10KOhm EXTTS_SNI_DRV1_PCH PIRQH#/GPIO5
B33 USB_BIAS R2416 22.6Ohm +3VSUS_ORG
USBRBIAS GND
T2401 1 PCI_PME# K10
PME#
PLT_RST# C6 A14 GPIO59 RN2401D 7 8 10KOhm
R2422 2 1 10KOhm DGPU_HOLD_RST# PLTRST# OC0#/GPIO59 K20 GPIO40 RN2401A 1 2 10KOhm
B
R2423 2 1 1KOhm DGPU_PWR_EN OC1#/GPIO40 B17 GPIO41 RN2401B 3 4 10KOhm
B

T2402 1 CLKOUT_PCI0 H49 OC2#/GPIO41 C16 GPIO42 RN2401C 5 6 10KOhm


22Ohm 2 1 R2409 CLK_PCI_FB_R H43 CLKOUT_PCI0 OC3#/GPIO42 L16
21 CLK_PCI_FB CLKOUT_PCI1 OC4#/GPIO43 HARMAN_DET2 37
22Ohm 2 1 R2410 CLK_KBCPCI_PCH_R J48 A16
30 CLK_KBCPCI_PCH CLKOUT_PCI2 OC5#/GPIO9 ONKYO_DET1 37
44 CLK_DEBUG 22Ohm 2 1 R2412 CLK_DBG_R K42 D14 PCB_ID11
H40 CLKOUT_PCI3 OC6#/GPIO10 C14 PCB_ID10
CLKOUT_PCI4 OC7#/GPIO14
Place within 500 mils of PCH
COUGAR_POINT_ES1
2

C2403
10PF/50V HM70: 0200-00PT0TB PCB_ID10 PCB_ID11 PCB_ID12
@ HM76: 0200-00P20TB
1

USB 3.0 Port Sleep & Music eDP & LVDS


Reserved for Wireless team 1: Support 1: Support 1: eDP
GND 0: No Support
0 USB 3.0 port 0: No Support 0: LVDS
+3V

+3VSUS_ORG +3VSUS_ORG +3VS

STP_A16OVR: U2401
BBS_BIT0,BBS_BIT1 : Boot BIOS Strap

1
1 A 5
A16 swap override Strap/ VCC
R2431 R2433 R2435
Boot BIOS Strap Top-Block swap override jumper PLT_RST# 2 B 10KOhm 10KOhm
/SLP_MUSIC
10KOhm
/eDP
3 4
BUF_PLT_RST# 4,30,32,33,40,53,70

2
GND
BBS_BIT1 BBS_BIT0 Boot BIOS Location Low=Enabled A16 swap override/ Y
SN74LVC1G08DCKR PCB_ID10
Top-Block swap override
1

0 0 LPC GND PCB_ID11


R2426 PCB_ID12
0 1 Reserved (NAND) R2428 1 @ 2 0Ohm 10KOhm
High=Default
1 0 Reserved
2

1
A A
1 SPI (PCH) R2432 R2434 R2436
1 10KOhm 10KOhm 10KOhm
GND @ /non-SLP_MUSIC /LVDS
Sampled on rising edge of PWROK.

2
20 BBS_BIT0 BBS_BIT0 R2417 1 @ 2 1KOhm STP_A16OVR R2419 1 @ 2 1KOhm
GND GND GND
BBS_BIT1 R2418 1 @ 2 1KOhm
GND

GND
Title : PCH(5)_PCI,NVRAM,USB

BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu


Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 24 of 104
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 3,4,16,17,20,21,22,23,24,26,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

+VCCP +VCCP 3,4,6,7,26,27,32,57,82

+3VSUS_ORG +3VSUS_ORG 20,21,22,24,27

+1.8VS +1.8VS 7,26,84

BIOS Rev. SKU


PCB_ID3
ID0 ID1 PCB Rev. PCB_ID2 PCB_ID4 PCB_ID5
D USB 3.0 D

0 0 R1.0 1: HDMI 1: 2 port 1:OPT/UMA 1:Zero_ODD


1 port support
0 1 R1.1 Sleep & Charge
1 0 R2.0
1 1 R2.1 0:non-HDMI 0: 1 port 0:DSC 0:NON_Zero_ODD

+3VS +3VS +3VS +3VS +3VS +3VS U2001F

PCB_ID4 T7 C40 SATA_ODD_PWRGT 51


BMBUSY#/GPIO0 TACH4/GPIO68
1

1
R2525 R2528 R2530 R2533 R2540 R2535 PCB_ID6 A42 B41 R2511 1 1% 2 1.5KOhm GND
10KOhm 10KOhm 10KOhm 10KOhm 10KOhm 10KOhm TACH1/GPIO1 TACH5/GPIO69
@ /Zero_ODD PCB_ID7 H36 C41 R2512 1 1% 2 1.5KOhm
TACH2/GPIO6 TACH6/GPIO70 +3VS
2

2
PCB_ID3 E38 A40 R2513 1 1% 2 1.5KOhm
TACH3/GPIO7 TACH7/GPIO71 +3VS
PCB_ID0
PCB_ID1 BT_ON/OFF# C10
53 BT_ON/OFF# GPIO8
PCB_ID2
PCB_ID3 GPIO12 C4
PCB_ID4 LAN_PHY_PWR_CTRL/GPIO12
PCB_ID5 G2 P4 A20GATE 30
30,44 EXT_SMI# GPIO15 A20GATE
AU16 H_PECI_R R2514 1 @ 2 0Ohm
R1.1 R1.1 GPIO16 U2 PECI R2515 1 2 43Ohm
H_PECI
H_PECI_EC
4
30
SATA4GP/GPIO16
1

P5
R2526 R2527 R2531 R2532 R2537 R2536 RCIN# RCIN# 30

GPIO
10KOhm 10KOhm 10KOhm 1KOhm 10KOhm 10KOhm DGPU_PWROK D40 AY11

CPU/MISC
87,91,92 DGPU_PWROK TACH0/GPIO17 PROCPWRGD H_CPUPWRGD 4
@ @ @ @ /NON_Zero_ODD
56 WLAN_LED T5 AY10 PM_THRMTRIP# R2516 1 1% 2 390Ohm
H_THRMTRIP# 4,32
2

SCLOCK/GPIO22 THRMTRIP#
GPIO24 E8 T14 INIT3_3V# 1 T2504 +1.8VS
GND GND GND GND GND GND GPIO24/MEM_LED INIT3_3V# R2502 1 2 2.2KOhm
GPIO27 E16 AY1 NV_CLE R2503 2 1 1KOhm
GPIO27 DF_TVS H_SNB_IVB# 4
C C
PLL_ODVR_EN P8
GPIO28 AH8
PCB_ID2 K1 TS_VSS1
PCB_ID6 PCB_ID7 PCB_ID8 PCB_ID9 STP_PCI#/GPIO34 AK11
TS Signal Disable Guideline
TS_VSS2 TS_VSS[1:4] should pull down to GND
0 0: 17W K4
1: Standard 1: Premium R1.1 46 CRT_IN# GPIO35 AH10
Design Guide 0.9 (436735)
V8 TS_VSS3
0 1: 35W 51 SATA_ODD_PRSNT# SATA2GP/GPIO36 AK10
FDI_OVRVLTG M5 TS_VSS4
0: Entry 0: Mainstream 1 0: 45W SATA3GP/GPIO37
1 1: Reserve PCB_ID0 N2 P37
SLOAD/GPIO38 NC_1 GND
PCB_ID1 M3
SDATAOUT0/GPIO39
PCB_ID9 V13 BG2
SDATAOUT1/GPIO48 Vss_NCTF15
+3VS +3VS +3VS +3VS PCB_ID5 V3 BG48
SATA5GP/GPIO49 Vss_NCTF16
WLAN_ON D6 BH3
53 WLAN_ON GPIO57 Vss_NCTF17
1

R2545 R2546 R2549 R2551 BH47


10KOhm 10KOhm 10KOhm 10KOhm Vss_NCTF18
@ @ A4 BJ4
Vss_NCTF1 Vss_NCTF19
2

A44 BJ44
PCB_ID6 Vss_NCTF2 Vss_NCTF20
PCB_ID7 A45 BJ45
PCB_ID8 Vss_NCTF3 Vss_NCTF21

NCTF
20 PCB_ID8 A46 BJ46
PCB_ID9
Vss_NCTF4 Vss_NCTF22
A5 BJ5
R1.1 Vss_NCTF5 Vss_NCTF23
1

R2547 R2548 R2550 R2552 A6 BJ6


1KOhm 1KOhm 10KOhm 10KOhm Vss_NCTF6 Vss_NCTF24
@ @ B3 C2
Vss_NCTF7 Vss_NCTF25
2

B47 C48
B Vss_NCTF8 Vss_NCTF26 B
BD1 D1
GND GND GND GND Vss_NCTF9 Vss_NCTF27
BD49 D49
Vss_NCTF10 Vss_NCTF28
BE1 E1
Vss_NCTF11 Vss_NCTF29
BE49 E49
+3VSUS_ORG Vss_NCTF12 Vss_NCTF30
R1.1 Clear password for TODs required BF1 F1
Vss_NCTF13 Vss_NCTF31
EXT_SMI# R2529 2 1 1KOhm Place ONTO D-part BF49 F49
Vss_NCTF14 Vss_NCTF32
JRST2501 1 2 GPIO16
GPIO12 R2538 2 1 10KOhm 1 2 COUGAR_POINT_ES1
SGL_JUMP
/nonWOWL
BT_ON/OFF# R2539 2 1 10KOhm GND HM70: 0200-00PT0TB
10/11 HM76: 0200-00P20TB
GPIO24 R2524 1 2 10KOhm
+3VS R2518 1 1% 2 1KOhm FDI_OVRVLTG R2519 1 2 100KOhm
GND
@
WLAN_ON R2544 2 1 10KOhm FDI TERMINATION VOLTAGE OVERRIDE
10/11 - GPIO37 (FDI_OVRVLTG)
LOW - TX, RX terminated to same voltage
+3VS (DC Couplong Mode)
DEFAULT

R2520 1 1% 2 200KOhm SATA_ODD_PRSNT#


+3VS
DGPU_PWROK R2542 2 1 10KOhm
DMI TERMINATION VOLTAGE OVERRIDE
- GPIO36 (SATA_ODD_PRSNT#)
GPIO16 R2553 2 1 10KOhm LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT
A
R1.1 A

PLL ON DIE VR ENABLE


DGPU_PWROK R2543 2 @ 1 10KOhm HIGH - ENABLED
GPIO27 R2523 2 1 10KOhm
LOW - DISABLED R1.1
#438390 Checklist
PLL_ODVR_EN R2521 1 @ 2 1KOhm GND
GND
Title : PCH(6)_CPU,GPIO,MISC
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 25 of 104
5 4 3 2 1
5 4 3 2 1

+VTT_PCH_VCCIO +VTT_PCH_VCCIO 20,27

+VTT_PCH_ORG +VTT_PCH_ORG 22,27

+VCCP +VCCP 3,4,6,7,27,32,57,82

+1.8VS +1.8VS 7,25,84

+1.5VS +1.5VS 53,57,91

+3VS +3VS 3,4,16,17,20,21,22,23,24,25,27,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92

+1.05VS +1.05VS 27,80,82

+3VS_VCC3_3 +3VS_VCC3_3 27

+3VM_SPI +3VM_SPI 28
D D
U2001H +VCCAFDI_VRM
H5 +VCCAFDI_VRM 27
VSS0
AA17 AK38
AA2 VSS1 VSS80 AK4
AA3 VSS2 VSS81 AK42
AA33 VSS3 VSS82 AK46
AA34 VSS4 VSS83 AK8 +VCCA_DAC_1_2 +3VS
AB11 VSS5 VSS84 AL16
AB14 VSS6 VSS85 AL17 R2607 1 2 0Ohm
VSS7 VSS86 63mA
AB39 AL19
AB4 VSS8 VSS87 AL2
VSS9 VSS88

1
AB43 AL21 C2612 C2613 C2614
AB5 VSS10 VSS89 AL23 0.01UF/50V 0.1UF/25V 10UF/6.3V
AB7 VSS11 VSS90 AL26 /VGA_OPT/UMA /VGA_OPT/UMA vx_c0603_small
POWER SKU(VGA) UMA/OPT DSC

2
AC19 VSS12 VSS91 AL27 U2001G /VGA_OPT/UMA
AC2 VSS13 VSS92 AL31
AC21 VSS14 VSS93 AL33
AC24 VSS15 VSS94 AL34 AA23 U48 GND GND
VSS16 VSS95 +VTT_PCH_VCC 1.73A VccCore1 VccADAC C2612,C2613,
AC33 AL48 AC23
VSS17 VSS96 VccCore2
C2614,R2609,

CRT
AC34 AM11 AD21
VSS18 VSS97 VccCore3 I NI

1
AC48 AM14 C2602 C2603 C2604 AD23 U47
VSS19 VSS98 VccCore4 VssADAC GND +3VS_VCCA_LVD +3VS C2615,C2616,

VCC CORE
AD10 AM36 C2601 1UF/6.3V 1UF/6.3V 1UF/6.3V AF21 GND
VSS20 VSS99 VccCore5
AD11 AM39 10UF/6.3V AF23
L2602

2
AD12 VSS21 VSS100 AM43 vx_c0603_small AG21 VccCore6 R2609 1 2 0Ohm
VSS22 VSS101 VccCore7 1mA
AD13 AM45 AG23 /VGA_OPT/UMA
AD19 VSS23 VSS102 AM46 AG24 VccCore8 AK36
VSS24 VSS103 VccCore9 VccALVDS

1
AD24 AM7 GND GND GND GND AG26
AD26 VSS25 VSS104 AN2 AG27 VccCore10 AK37
GND R2610 R2610,R2611 NI I
AD27 VSS26 VSS105 AN29 AG29 VccCore11 VssALVDS
VSS27 VSS106 VccCore12 0Ohm
AD33 AN3 AJ23 @

LVDS
AD34 VSS28 VSS107 AN31 AJ26 VccCore13 AM37

2
AD36 VSS29 VSS108 AP12 AJ27 VccCore14 VccTX_LVDS1
AD37 VSS30 VSS109 AP19 AJ29 VccCore15 AM38 +1.8VS_VCCTX_LVD +1.8VS
AD38 VSS31 VSS110 AP28 AJ31 VccCore16 VccTX_LVDS2 GND
AD39 VSS32 VSS111 AP30 +VTT_PCH_VCCDPLL_EXP VccCore17 AP36 L2602 1 2 1kOhm/100Mhz
VSS33 VSS112 VccTX_LVDS3 40mA
AD4 AP32 /VGA_OPT/UMA
VSS34 VSS113

1
C AD40 AP38 SP2601 +VTT_PCH_VCCDPLL_EXP AP37 C
VSS35 VSS114 VccTX_LVDS4

1
AD42 AP4 2 1 131mA AN19 R2611 C2615 C2616 C2617
VSS36 VSS115 +VTT_PCH_VCCIO VccIO1
AD43 AP42 0Ohm 0.01UF/50V 0.01UF/50V 10UF/6.3V
AD45 VSS37 VSS116 AP46 NB_R0402_20MIL_SMALL +VTT_PCH_VCCAPLL_EXP @ /VGA_OPT/UMA /VGA_OPT/UMA vx_c0603_small

2
AD46 VSS38 VSS117 AP8 L2601 2 1 1kOhm/100Mhz BJ22 /VGA_OPT/UMA
+VTT_PCH_ORG

2
AD8 VSS39 VSS118 AR2 @ VccAPLLEXP
VSS40 VSS119

1
AE2 AR48 C2605 V33

HVCMOS
AE3 VSS41 VSS120 AT11 10UF/6.3V AN16 Vcc3_3_2 GND GND GND GND
AF10 VSS42 VSS121 AT13 vx_c0603_small VccIO2

2
AF12 VSS43 VSS122 AT18 @ AN17 +3VS_VCC_GIO SP2607 +3VS_VCC3_3
AD14 VSS44 VSS123 AT22 VccIO3 V34 2 1
VSS45 VSS124 Vcc3_3_3 44.5mA
AD16 AT26 GND
VSS46 VSS125

1
AF16 AT28 AN21 C2618 NB_R0402_20MIL_SMALL
AF19 VSS47 VSS126 AT30 VccIO4 0.1UF/25V
VSS48 VSS127 +VTT_PCH_VCC_EXP
AF24 AT32 1.572A AN26 +VCCAFDI_VRM
+VTT_PCH_VCCIO

2
AF26 VSS49 VSS128 AT34 VccIO5
AF27 VSS50 VSS129 AT39 AN27 AT16
VSS51 VSS130 VccIO6 VccVRM2 147mA
1

1
AF29 AT42 C2607 C2608 C2609 C2610 GND
AF31 VSS52 VSS131 AT46 C2606 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V AP21
AF38 VSS53 VSS132 AT7 10UF/6.3V VccIO7 +VCCIO_CPU_VCC_DMI SP2606 +VCCP
2

2
AF4 VSS54 VSS133 AU24 vx_c0603_small AP23 AT20 2 1
VSS55 VSS134 VccIO8 VccDMI2 47mA
AF42 AU30

DMI
VSS56 VSS135

1
AF46 AV16 AP24 C2619 NB_R0402_20MIL_SMALL

VCCIO
AF5 VSS57 VSS136 AV20 VccIO9 1UF/6.3V +VTT_PCH_ORG
AF7 VSS58 VSS137 AV24 AP26 AB36 75mA

2
AF8 VSS59 VSS138 AV30 GND VccIO10 VccClkDMI +VTT_PCH_ORG_VCCCLKDMI
AG19 VSS60 VSS139 AV38 AT24 L2603 2 1 1kOhm/100Mhz
AG2 VSS61 VSS140 AV4 VccIO11 GND @
AG31 VSS62 VSS141 AV43 R2614 2 1 0Ohm
AG48 VSS63 VSS142 AV8 AN33
VSS64 VSS143 VccIO12

1
AH11 AW14 C2620
AH3 VSS65 VSS144 AW18 +3VS_VCC3_3 +3VS_VCCA3GBG AN34 AG16 10UF/6.3V
AH36 VSS66 VSS145 AW2 VccIO13 VccDFTERM1 vx_c0603_small

2
AH39 VSS67 VSS146 AW22 SP2603 @
AH40 VSS68 VSS147 AW26 2 1 22.25mA BH29 AG17

DFT / SPI
AH42 VSS69 VSS148 AW28 Vcc3_3_1 VccDFTERM2 GND +V_NVRAM_VCCPNAND +1.8VS
VSS70 VSS149
1

AH46 AW32 NB_R0402_20MIL_SMALL C2611 SP2605


AH7 VSS71 VSS150 AW34 +VTT_PCH_VCCAPLL_FDI 0.1UF/25V +VCCAFDI_VRM AJ16 2 1
B VSS72 VSS151 VccDFTERM3 2mA B
AJ19 AW36
2

VSS73 VSS152

1
AJ21 AW40 R2605 2 @ 1 0Ohm 147mA AP16 C2621 NB_R0402_20MIL_SMALL
VSS74 VSS153 +VTT_PCH_ORG VccVRM1
AJ24 AW48 AJ17 0.1UF/25V
VSS75 VSS154 VccDFTERM4
1

AJ33 AV11 C2623 GND

2
AJ34 VSS76 VSS155 AY12 0.1UF/25V BG6
AK12 VSS77 VSS156 AY22 +VTT_PCH_VCCDPLL_FDI @ VccAFDIPLL
2

AK3 VSS78 VSS157 AY28 SP2604 GND +3VM_VCCPSPI +3VS +3VM_SPI


VSS79 VSS158 2 1 GND AP17
+VTT_PCH_VCCIO 131mA VccIO14

FDI
COUGAR_POINT_ES1 V1 10mA R2616 2 @ 1 0Ohm
NB_R0402_20MIL_SMALL VccSPI

1
GND GND 47mA AU20 C2622 R2617 2 1 0Ohm
+VCCIO_CPU_VCC_DMI VccDMI1 0.1UF/25V

2
COUGAR_POINT_ES1

T2601 T2602 T2603 +1.5VS +VCCAFDI_VRM GND


TPC26T TPC26T TPC26T +VCCAFDI_VRM HM70: 0200-00PT0TB
HM76: 0200-00P20TB
SP2602 160mA
1

2 1 C2624
0.1UF/25V
NB_R0402_20MIL_SMALL
2

+1.05VS
+VTT_PCH_ORG GND

JP2601
1 2
1 2
4.56A=330mA+1.3A+2.925A
3MM_OPEN_5MIL

+VTT_PCH_ORG
+VTT_PCH_VCC

JP2602 1.3A
1 2
1 2
A A
2MM_OPEN_5MIL
+VTT_PCH_VCCIO

JP2603 2.925A
1 2
1 2
2MM_OPEN_5MIL

Title : PCH(7)_POWER,GND
BG1-CSC-HW R&D Dept.5 Engineer: Jim3_Liu
Size Project Name Rev

forum.hocvienit.vn
C VGFTG 1.1
Date: Tuesday, December 11, 2012 Sheet 26 of 104
5 4 3 2 1
5 4 3 2 1

U2001I

AY4
AY42 VSS159 VSS259
H46
K18
U2001J POWER +VTT_PCH_VCCUSBCORE
SP2702
AY46 VSS160 VSS260 K26 R2703 1 @ 2 0Ohm +VTT_PCH_VCCACLK AD49 N26 1 2
VSS161 VSS261 +VTT_PCH_ORG VccAClk VccIO17 524mA +VTT_PCH_VCCIO
AY8 K39
B11 VSS162 VSS262 K46 SP2711 P26 NB_R0402_20MIL_SMALL
VSS163 VSS263 VccIO18

1
B15 K7 1 2 +VCCPDSW 1mA T16 C2726
VSS164 VSS264 +3VSUS_ORG VccDSW3_3
B19 L18 P28 1UF/6.3V
B23 VSS165 VSS265 L2 NB_R0402_20MIL_SMALL PCH_VCCDSW VccIO19

2
VSS166 VSS266

1
B27 L20 C2705 V12 T27
VSS167 VSS267 DcpSusByp VccIO20

1
B31 L26 0.1UF/25V C2706
B35 VSS168 VSS268 L28 0.1UF/25V +3VS_VCC_CLKF33 T29 GND

2
B39 VSS169 VSS269 L36 @ T38 VccIO21
22.25mA

2
B7 VSS170 VSS270 L48 Vcc3_3_4 SP2703
F45 VSS171 VSS271 M12 GND T23 +3VSUS_ORG_VCCPUSB 1 2
VSS172 VSS272 VccSus3_3_1 65mA +3VSUS_ORG
BB12 P16 +VTT_PCH_ORG L2704 1 2 1kOhm/100Mhz GND +VCCAPLL_CPY_PCH BH23
VSS173 VSS273 VccAPLLDMI2

1
D D
BB16 M18 @ T24 C2727 NB_R0402_20MIL_SMALL
BB20 VSS174 VSS274 M22 +VTT_PCH_VCCIO SP2712 +VCCDPLL_CPY AL29 VccSus3_3_2 0.1UF/25V SP2704
VSS175 VSS275 VccIO15

1
BB22 M24 C2707 1 2 131mA V23 +3VSUS_ORG_VCCAUBG 1 2

USB
+3VSUS_ORG

2
BB24 VSS176 VSS276 M30 10UF/6.3V VccSus3_3_3
VSS177 VSS277

1
BB28 M32 vx_c0603_small NB_R0402_20MIL_SMALL AL24 V24 C2728 NB_R0402_20MIL_SMALL +3VSUS_ORG

2
BB30 VSS178 VSS278 M34 @ DcpSus1 VccSus3_3_4 GND 0.1UF/25V
VSS179 VSS279

2
BB38 M38 +VCCSUS1 120mA P24 65mA

2
BB4 VSS180 VSS280 M4 VccSus3_3_5 07V030000001
VSS181 VSS281

1
BB46 M42 GND C2708 AA19 131mA GND
BC14 VSS182 VSS282 M46 1UF/6.3V VccASW1 T26 +VCCAUPLL SP2705 1 2 0.8V/0.2mA
VSS183 VSS283 VccIO22 +VTT_PCH_VCCIO D2701
BC18 M8 @ AA21

2
BC2 VSS184 VSS284 N18 VccASW2 NB_R0402_20MIL_SMALL +5VSUS_PCH_VCC5REFSUS

3
BC22 VSS185 VSS285 P30 AA24 M26 R2711 1 2 10Ohm
VSS186 VSS286 VccASW3 V5REF_Sus 1mA +5VSUS_ORG
BC26 N47
VSS187 VSS287

1
Clock and Miscellaneous
BC32 P11 GND AA26 +3VS
BC34 VSS188 VSS288 P18 VccASW4 AN23 +VCCA_USBSUS C2729
VSS189 VSS289 DcpSus4 120mA

2
BC36 T33 AA27 1UF/6.3V

2
VSS190 VSS290 VccASW5

1
BC40 P40 AN24 65mA +3VSUS_ORG_VCCPSUS C2730 07V030000001
BC42 VSS191 VSS291 P43 AA29 VccSus3_3_6 1UF/6.3V
BC48 VSS192 VSS292 P47 VccASW6 @ GND 0.8V/0.2mA

2
BD46 VSS193 VSS293 P7 AA31 D2702
BD5 VSS194 VSS294 R2 VccASW7 +5VS_PCH_VCC5REF

3
BE22 VSS195 VSS295 R48 AC26 P34 GND 1 2
VSS196 VSS296 VccASW8 V5REF 1mA +5VS
BE26 T12 R2712 10Ohm
VSS197 VSS297

1
BE40 T31 AC27 +3VSUS_ORG_VCCPSUS SP2706 C2731
BF10 VSS198 VSS298 T37 VccASW9 N20 1 2 1UF/6.3V
65mA +3VSUS_ORG

PCI/GPIO/LPC
BF12 VSS199 VSS299 T4 +1.05VM_ORG AC29 VccSus3_3_7

2
VSS200 VSS300 VccASW10

1
BF16 W34 N22 C2732 NB_R0402_20MIL_SMALL
BF20 VSS201 VSS301 T46 AC31 VccSus3_3_8
VSS202 VSS302 803mA VccASW11
BF22 T47 P20 1UF/6.3V

2
BF24 VSS203 VSS303 T8 AD29 VccSus3_3_9 GND
VSS204 VSS304 VccASW12

1
BF26 V11 C2709 C2710 C2711 C2712 C2713 P22
BF28 VSS205 VSS305 V17 22UF/6.3V 22UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V AD31 VccSus3_3_10 GND +3VS_VCCPCORE
BD3 VSS206 VSS306 V26 VccASW13 SP2707

2
BF30 VSS207 VSS307 V27 W21 AA16 1 2
VSS208 VSS308 VccASW14 Vcc3_3_5 44.5mA +3VS_VCC3_3
BF38 V29
VSS209 VSS309

1
BF40 V31 W23 W16 +3VS_VCCPPCI SP2708 C2733 NB_R0402_20MIL_SMALL
BF8 VSS210 VSS310 V36 GND GND GND GND GND VccASW15 Vcc3_3_6 1 2 0.1UF/25V
C
VSS211 VSS311 22.25mA +3VS_VCC3_3 C
BG17 V39 W24 T34

2
VSS212 VSS312 VccASW16 Vcc3_3_7

1
BG21 V43 C2734 NB_R0402_20MIL_SMALL
BG33 VSS213 VSS313 V7 W26 0.1UF/25V
BG44 VSS214 VSS314 W17 VccASW17 GND

2
BG8 VSS215 VSS315 W19 W29
BH11 VSS216 VSS316 W2 VccASW18 GND
BH15 VSS217 VSS317 W27 W31 AJ2
VSS218 VSS318 VccASW19 Vcc3_3_8 22.25mA +3VS_VCC3_3
BH17 W48
VSS219 VSS319

1
BH19 Y12 W33 C2735
H10 VSS220 VSS320 Y38 VccASW20 AF13 0.1UF/25V
BH27 VSS221 VSS321 Y4 VccIO23

2
BH31 VSS222 VSS322 Y42 +VCCRTCEXT N16 +VTT_PCH_VCCIO_SATA3
BH33 VSS223 VSS323 Y46 DcpRTC AH13 GND SP2709
BH35 VSS224 VSS324 Y8 VccIO24 1 2
VSS225 VSS325 524mA +VTT_PCH_VCCIO

1
BH39 BG29 C2714 +VCCAFDI_VRM 147mA Y49 AH14
VSS226 VSS326 VccVRM3 VccIO25

1
BH43 N24 0.1UF/25V C2736 NB_R0402_20MIL_SMALL
BH7 VSS227 VSS327 AJ3 1UF/6.3V

2
D3 VSS228 VSS328 AD47 AF14 +VTT_PCH_ORG_VCCAPLL_SATA3

2
D12 VSS229 VSS329 B43 +VTT_PCH_VCCIO BD47 VccIO26
75mA

SATA
VSS230 VSS330 +VTT_PCH_VCCA_A_DPL VccADPLLA
D16 BE10 AK1 GND L2705 1 2 1kOhm/100Mhz +VTT_PCH_ORG
D18 VSS231 VSS331 BG41 SP2715 GND BF47 VccAPLLSATA @
VSS232 VSS332 +VTT_PCH_VCCA_B_DPL 75mA VccADPLLB

1
D22 G14 1 2 +VCCDIFFCLK 131mA C2737
D24 VSS233 VSS333 H16 AF11 10UF/6.3V
VSS234 VSS334 VccVRM4 147mA +VCCAFDI_VRM
D26 T36 NB_R0402_20MIL_SMALL +VTT_PCH_ORG +VCCDIFFCLKN AF17 vx_c0603_small

2
D30 VSS235 VSS335 BG22 R2708 1 2 0Ohm AF33 VccIO16 @
VSS236 VSS336 55mA VccDIFFCLKN1
1

D32 BG24 C2715 AF34 AC16 +VTT_PCH_VCCIO_VCC_SATA


VSS237 VSS337 VccDIFFCLKN2 VccIO27
1

D34 C22 1UF/6.3V C2716 +VTT_PCH_ORG SP2716 +VTT_PCH_ORG_SSCVCC AG34 SP2710 GND
D38 VSS238 VSS338 AP13 1UF/6.3V 1 2 VccDIFFCLKN3 AC17 1 2
95mA 393mA +VTT_PCH_VCCIO
2

D42 VSS239 VSS339 M14 VccIO28


2

VSS240 VSS340

1
D8 AP3 AG33 AD17 C2738 NB_R0402_20MIL_SMALL
E18 VSS241 VSS341 AP1 GND C2717 VccSSC VccIO29 1UF/6.3V
E26 VSS242 VSS342 BE16 GND 1UF/6.3V

2
G18 VSS243 VSS343 BC16 2 1VCCSST V16

GND
G20 VSS244 VSS344 BG28 C2718 0.1UF/25V DcpSST
G26 VSS245 VSS345 BJ28 GND GND
G28 VSS246 VSS346 T17 T21
VSS247 DcpSus2 VccASW21 803mA +1.05VM_ORG
G36 +1.05VM_ORG R2710 1 @ 2 0Ohm +V1.05VM_ORG_VCCSUS 120mA V19

MISC
B
G48 VSS248 1 DcpSus3 B
H12 VSS249 C2719 V21
H18 VSS250 +VTT_CPU_VCCPCPU 1UF/6.3V VccASW22

CPU
2

H22 VSS251 @ BJ8


H24 VSS252 GND SP2701 V_PROC_IO T19
H26 VSS253 1 2 GND VccASW23
VSS254 +VCCP 1mA
H30 +3VSUS_ORG_VCCPAZSUS
H32 VSS255 NB_R0603_25MIL_SMALL SP2714
VSS256
1

RTC
H34 C2720 C2721 C2722 A22 P32 10mA 10mil trace 1 2

HDA
VSS257 VccRTC VccSusHDA +3VSUS_ORG
F3 4.7UF/6.3V 0.1UF/25V 0.1UF/25V
VSS258 NB_R0402_20MIL_SMALL
2

1
COUGAR_POINT_ES1 C2739
1UF/6.3V
COUGAR_POINT_ES1 GND GND GND
HM70: 0200-00PT0TB

2
+VCC_RTC 6uA
GND HM76: 0200-00P20TB GND
1

C2723 C2724 C2725


1UF/6.3V 0.1UF/25V 0.1UF/25V
2

GND GND GND

+3VS_VCC3_3 +3VS_VCC_CLKF33 +VTT_PCH_VCCA_A_DPL +VTT_PCH_ORG


+5VSUS +5VSUS_ORG
CO-LAY @ +1.05VS +1.05VS 26,80,82
L2701 1 2 1kOhm/100Mhz 22.25mA 75mA L2702 1 2 1kOhm/100Mhz JP2702 +3VS +3VS 3,4,16,17,20,21,22,23,24,25,26,28,30,31,32,36,40,45,46,48,50,51,53,57,58,61,62,91,92
2 1 1mA
2 1 +VTT_PCH_ORG +VTT_PCH_ORG 22,26
R2709 1 0Ohm 2 +VCCP +VCCP 3,4,6,7,26,32,57,82
1

C2701 C2702 1MM_OPEN_M1M2 +VTT_PCH_VCCIO +VTT_PCH_VCCIO 20,26


1

10UF/6.3V 1UF/6.3V R2702 C2703 C2741 +3VSUS +3VSUS_ORG


+3VSUS +3VSUS 22,24,28,30,33,34,37,53,62,81,92
vx_c0603_small 0Ohm 1UF/6.3V 22UF/6.3V +VCC_RTC +VCC_RTC 20,22
2

@ JP2703 +5VSUS +5VSUS 22,51,52,62,81,82


2

A 2 1 97mA +5VS A
+5VS 20,30,31,36,37,46,48,50,51,56,57,58,62,66,80,87,91
2

T2703 T2702 T2701 2 1


+3VSUS_ORG +3VSUS_ORG 20,21,22,24,25
GND GND GND GND TPC26T TPC26T TPC26T +3VS 1MM_OPEN_M1M2 +3VS_VCC3_3 +3VA +3VA 6,20,30,33,37,57,60,65,81,88,93
+VTT_PCH_VCCA_B_DPL 75mA L2703 1 2 1kOhm/100Mhz JP2704 +VCCAFDI_VRM +VCCAFDI_VRM 26
1

2 1 266mA +3VS_VCC3_3
2 1 +3VS_VCC3_3 26
1

C2704 C2740 1MM_OPEN_M1M2


+VTT_PCH_VCCA_B_DPL 1UF/6.3V 22UF/6.3V +1.05VS +1.05VM_ORG