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DELL Inspiron 1501 / PP23LA / DA0FX2MBAD7 REV: D


1 1

DDRII-SODIMM1 AMD S1
PG 7,8 Turion 64 Rev.F Dual-Core/ CPU VR CLOCKS Thermal SYSTEM VCCP BATT AC/BATT RUN
533 MHz DDR II Sempron Rev.F Single-Core Monitor DDR II CHARGER Conn. POWER SW
Dual-Core 35W / Single-Core 25W
PG 37 PG 13 PG 35 PG 38 PG 39 PG 36 PG 41 PG 40
DDRII-SODIMM2 (638 S1g1 socket)
PG 7,8
PG 3,4,5,6

HT_LINK
PCI-E(1)
Express Card
USB2.0(P1)
Panel Connector LVDS RS485 A12 PG 25
PG 18 PCI-E(2)
2 Mini Card (WLAN) 2
USB2.0(P5)
465 FCBGA PG 24
VGA Conn. VGA
PG 19
USB2.0(P0,P2)
PG 9,10,11,12 USB Conn. Right Side x2
PG 28 VGA Conn. LAN with Power
USB-3 USB-2 Modem trancformet Jack
USB2.0(P4,P6)
SATA - HDD SATA II USB Conn. Back side x2 BCM4401
A_LINK
PG 23 PG 28
Dash Conn.
LCD Conn.

USB-0,1
LID SW
Fixed PATA ODD IDE Conn
Mini Card Latch R5C832
BCM4401
PG 23 SB600 A13 RJ45/Magnetics
(B0)

Phone Jack/MIC
PG 33 PG 34
549 BGA ATI RS485M

3 AC97/Azalia 3
33MHz PCI 3 in 1 Card
PG 14,15,16,17 3 in 1 Conn. ATI SB600 3 in 1 Conn.
R5C832 AMD S1 Socket
PG 20,21 PG 22 Mini Card Conn.
AUDIO MDC
Fan K/B Conn.
PG 31 PG 26 LPC Conn
DDR II PCB1
Mini PCI(for debug) FX2 MB
TP Conn.

SATA Conn.
ODD Conn.
Tip PG 42
Audio Jacks KBC
Ring

Express Conn.
PG 32
PG 26 NS97551/87541
R-BATT Conn.
PG 27

X-Bus

KB Touch Flash SPK Conn.


Conn. Pad ROM Battery Conn.
4 4

PG 35 PG 30 PG 27

QUANTA
Title
COMPUTER
BLOCK DIAGRAM

Size Document Number Rev


FX2 1A

Date:
Date: Friday, May 05, 2006 Sheet
Sheet 1 of 47
A B C D E
A B C D E

,1'(;
1 3DJH 'HVFULSWLRQ 1

1 BLOCK DIAGRAM
2 FRONT PAGE
3 ATHLON64 HT I/F
4 ATHLON64 DDRII MEMORY
5 ATHLON64 CTRL & DEBUG
6 ATHLON64 PWR & GND
7 DDRII SODIMMX2
8 DDRII TERMINATION
9 RS485-HT LINK0 I/F
10 RS485-PCIE LINK I/F
11 RS485-LVDS
12 RS485-POWER
13 CLOCK GENERATOR
14 SB600M-PCIE/PCI/LPC
15 SB600M ACPI/USB/AC97
2 16 SB600M HDD/POWER 2

17 SB600M STRAPS
18 LCD CONN
19 CRT
20 5C832/PCI
21 CARD READER
22 CARD READER CONN
23 SATA HDD & PATA ODD
24 MINI Card
25 MINI Card
26 MDC CONN
27 PC97551 & FLASH
28 USB
29 EMI & Screw hole
30 SWITCH & TP & LED
31 Azelia CODEC
3 32 AUDIO CONN 3

33 LAN(BCM4401)
34 LAN JACK
35 KB & THERMAL & FAN
36 CHARGER (MAX8731)
37 VHCORE (MAX8774)
38 SYSTEM (MAX8734)
39 VCCP & DDR2 (MAX8743)
40 RUN POWER SW
41 DCIN,Batt
42 MINI PCI(for debug)
43 Power On Sequence
44 Power On Diagram
45 SMBUS BLOCK

4 4

QUANTA
Title
COMPUTER
FRONT PAGE

Size Document Number Rev


FX2 1A

Date: Thursday, May 04, 2006 Sheet 2 of 47


A B C D E
5 4 3 2 1

D D
352&(6625+<3(575$163257,17(5)$&(
9/'7B$[$1'9/'7B%[$5(&211(&7('727+(/'7B58132:(5
6833/<7+528*+7+(3$&.$*(25217+(',(,7,621/<&211(&7('
217+(%2$5'72'(&283/,1*1($57+(&383$&.$*(

VLDT_RUN U1A
C1
D4 VLDT_A3 VLDT_B3 AE5
D3 VLDT_A2 VLDT_B2 AE4
D2 VLDT_A1 VLDT_B1 AE3
D1 VLDT_A0 VLDT_B0 AE2
4.7U_6.3V_0603

(9) HT_CADIN15_P N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CADOUT15_P (9)


(9) HT_CADIN15_N P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CADOUT15_N (9)
(9) HT_CADIN14_P M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CADOUT14_P (9)
(9) HT_CADIN14_N M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CADOUT14_N (9)
(9) HT_CADIN13_P L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CADOUT13_P (9)
M5 V3 +1.2V_VCCP VLDT_RUN
(9) HT_CADIN13_N L0_CADIN_L13 L0_CADOUT_L13 HT_CADOUT13_N (9)
C (9) HT_CADIN12_P K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CADOUT12_P (9) C
K4 W5 L1
(9) HT_CADIN12_N L0_CADIN_L12 L0_CADOUT_L12 HT_CADOUT12_N (9)
H3 AB5 FBJ3216HS800_1206
(9) HT_CADIN11_P L0_CADIN_H11 L0_CADOUT_H11 HT_CADOUT11_P (9)
(9) HT_CADIN11_N H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CADOUT11_N (9)
(9) HT_CADIN10_P G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CADOUT10_P (9)
(9) HT_CADIN10_N H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CADOUT10_N (9)
(9) HT_CADIN9_P F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CADOUT9_P (9) changed from 10p to
(9) HT_CADIN9_N F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CADOUT9_N (9) 180p as AMD suggestion
E5 AD4 L2
(9) HT_CADIN8_P L0_CADIN_H8 L0_CADOUT_H8 HT_CADOUT8_P (9)
F5 AD3 FBJ3216HS800_1206
(9) HT_CADIN8_N L0_CADIN_L8 L0_CADOUT_L8 HT_CADOUT8_N (9)
(9) HT_CADIN7_P N3 L0_CADIN_H7 L0_CADOUT_H7 T1 HT_CADOUT7_P (9) RKP $

1
N2 R1 C2 C3 C4 C5 C6 C7
(9) HT_CADIN7_N L0_CADIN_L7 L0_CADOUT_L7 HT_CADOUT7_N (9)
(9) HT_CADIN6_P L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CADOUT6_P (9)
M1 U3 4.7U_6.3V_0603 4.7U_6.3V_0603 .22U_6.3V .22U_6.3V 180P_50V 180P_50V
HT_CADOUT6_N (9)

2
(9) HT_CADIN6_N L0_CADIN_L6 L0_CADOUT_L6
(9) HT_CADIN5_P L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CADOUT5_P (9)
(9) HT_CADIN5_N L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CADOUT5_N (9)
(9) HT_CADIN4_P J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CADOUT4_P (9)
(9) HT_CADIN4_N K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CADOUT4_N (9)
(9) HT_CADIN3_P G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CADOUT3_P (9)
(9) HT_CADIN3_N H1
G3
L0_CADIN_L3 L0_CADOUT_L3 AA3
AB1
HT_CADOUT3_N (9) /$<2873ODFHE\SDVVFDSRQWRSVLGHRIERDUG
(9) HT_CADIN2_P L0_CADIN_H2 L0_CADOUT_H2 HT_CADOUT2_P (9)
(9) HT_CADIN2_N G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CADOUT2_N (9) 1($5+732:(53,167+$7$5(127&211(&7('',5(&7/<
(9) HT_CADIN1_P E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CADOUT1_P (9) 72'2:1675($0+7'(9,&(%87&211(&7(',17(51$//<
(9) HT_CADIN1_N F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CADOUT1_N (9) 7227+(5+732:(53,16
B
(9) HT_CADIN0_P E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CADOUT0_P (9) 3/$&(&/26(729/'732:(53,16 B
(9) HT_CADIN0_N E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CADOUT0_N (9)

(9) HT_CLKIN1_P J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CLKOUT1_P (9)


(9) HT_CLKIN1_N K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CLKOUT1_N (9)
(9) HT_CLKIN0_P J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CLKOUT0_P (9)
VLDT_RUN J2 W1
(9) HT_CLKIN0_N L0_CLKIN_L0 L0_CLKOUT_L0 HT_CLKOUT0_N (9)

R2 49.9/F HT_CTLIN1_P P3 T5 HT_CPU_CTLOUT1_P


L0_CTLIN_H1 L0_CTLOUT_H1 T1
HT_CTLIN1_N P4 R5 HT_CPU_CTLOUT1_N
49.9/F L0_CTLIN_L1 L0_CTLOUT_L1 T2
R1
(9) HT_CTLIN0_P N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CTLOUT0_P (9)
(9) HT_CTLIN0_N P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CTLOUT0_N (9)

Athlon 64 S1
Processor Socket

A A
QUANTA
Title
COMPUTER
ATHLON64 HT I/F

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 3 of 47


5 4 3 2 1
A B C D E

9''B977B686B&38,6&211(&7('727+(9''B977B68632:(5 +1.8V_SUS
6833/<7+528*+7+(3$&.$*(25217+(',(,7,621/<&211(&7('
217+(%2$5'72'(&283/,1*1($57+(&383$&.$*( 3URFHVVRU''50HPRU\,QWHUIDFH
R3
2K/F U1C
M_B_DQ63 AD11 AA12 M_A_DQ63
(7) M_B_DQ[0..63] MB_DATA63 MA_DATA63 M_A_DQ[0..63] (7)
CPU_M_VREF M_B_DQ62 AF11 AB12 M_A_DQ62
M_B_DQ61 MB_DATA62 MA_DATA62 M_A_DQ61
AF14 MB_DATA61 MA_DATA61 AA14
4 M_B_DQ60 AE14 AB14 M_A_DQ60 4
M_B_DQ59 MB_DATA60 MA_DATA60 M_A_DQ59
for +0.9V_DDR_VTT Y11 MB_DATA59 MA_DATA59 W11
C8 C9 R4 M_B_DQ58 AB11 Y12 M_A_DQ58
feedback MB_DATA58 MA_DATA58
.1U_10V 1000p_50V 2K/F M_B_DQ57 AC12 AD13 M_A_DQ57
M_B_DQ56 MB_DATA57 MA_DATA57 M_A_DQ56
AF13 MB_DATA56 MA_DATA56 AB13
VTT_SENSE M_B_DQ55 AF15 AD15 M_A_DQ55
(39) VTT_SENSE MB_DATA55 MA_DATA55
M_B_DQ54 AF16 AB15 M_A_DQ54
M_B_DQ53 MB_DATA54 MA_DATA54 M_A_DQ53
AC18 MB_DATA53 MA_DATA53 AB17
C677 1 M_B_DQ52 AF19 MB_DATA52 MA_DATA52 Y17 M_A_DQ52
+1.8V_SUS 470P_50V M_B_DQ51 AD14 Y14 M_A_DQ51
U1B +0.9V_DDR_VTT M_B_DQ50 MB_DATA51 MA_DATA51 M_A_DQ50
AC14 W14
2

M_B_DQ49 MB_DATA50 MA_DATA50 M_A_DQ49


AE18 MB_DATA49 MA_DATA49 W16
2

W17 D10 M_B_DQ48 AD18 AD17 M_A_DQ48


R6 MEMVREF VTT1 M_B_DQ47 MB_DATA48 MA_DATA48 M_A_DQ47
VTT2 C10 AD20 MB_DATA47 MA_DATA47 Y18
39.2/F Y10 B10 M_B_DQ46 AC20 AD19 M_A_DQ46
R566 0 VTT_SENSE VTT3 M_B_DQ45 MB_DATA46 MA_DATA46 M_A_DQ45
VTT4 AD10 AF23 MB_DATA45 MA_DATA45 AD21
W10 M_B_DQ44 AF24 AB21 M_A_DQ44
1

M_ZN VTT5 M_B_DQ43 MB_DATA44 MA_DATA44 M_A_DQ43


AE10 MEMZN VTT6 AC10 AF20 MB_DATA43 MA_DATA43 AB18
M_ZP AF10 AB10 M_B_DQ42 AE20 AA18 M_A_DQ42
MEMZP VTT7 M_B_DQ41 MB_DATA42 MA_DATA42 M_A_DQ41
VTT8 AA10 AD22 MB_DATA41 MA_DATA41 AA20
2

A10 M_B_DQ40 AC22 Y20 M_A_DQ40


R5 VTT9 M_B_DQ39 MB_DATA40 MA_DATA40 M_A_DQ39
AE25 MB_DATA39 MA_DATA39 AA22
39.2/F V19 Y16 M_B_DQ38 AD26 Y22 M_A_DQ38
(7,8) M_A_CS#3 MA0_CS_L3 MA0_CLK_H2 M_CLKOUT1 (7) MB_DATA38 MA_DATA38
J22 AA16 M_B_DQ37 AA25 W21 M_A_DQ37
(7,8) M_A_CS#2 MA0_CS_L2 MA0_CLK_L2 M_CLKOUT1# (7) MB_DATA37 MA_DATA37
V22 E16 M_B_DQ36 AA26 W22 M_A_DQ36
(7,8) M_A_CS#1 M_CLKOUT0 (7)
1

MA0_CS_L1 MA0_CLK_H1 M_B_DQ35 MB_DATA36 MA_DATA36 M_A_DQ35


(7,8) M_A_CS#0 T19 MA0_CS_L0 MA0_CLK_L1 F16 M_CLKOUT0# (7) AE24 MB_DATA35 MA_DATA35 AA21
M_B_DQ34 AD24 AB22 M_A_DQ34
M_B_DQ33 MB_DATA34 MA_DATA34 M_A_DQ33
(7,8) M_B_CS#3 Y26 MB0_CS_L3 MB0_CLK_H2 AF18 M_CLKOUT4 (7) AA23 MB_DATA33 MA_DATA33 AB24
J24 AF17 M_B_DQ32 AA24 Y24 M_A_DQ32
(7,8) M_B_CS#2 MB0_CS_L2 MB0_CLK_L2 M_CLKOUT4# (7) MB_DATA32 MA_DATA32
W24 A17 M_B_DQ31 G24 H22 M_A_DQ31
(7,8) M_B_CS#1 MB0_CS_L1 MB0_CLK_H1 M_CLKOUT3 (7) MB_DATA31 MA_DATA31
U23 A18 M_B_DQ30 G23 H20 M_A_DQ30
(7,8) M_B_CS#0 MB0_CS_L0 MB0_CLK_L1 M_CLKOUT3# (7) MB_DATA30 MA_DATA30
M_B_DQ29 D26 E22 M_A_DQ29
M_B_DQ28 MB_DATA29 MA_DATA29 M_A_DQ28
3/$&(7+(0&/26(72 (7,8) M_CKE3 H26 MB_CKE1 MB0_ODT1 W23 M_ODT3 (7,8) C26 MB_DATA28 MA_DATA28 E21
J23 W26 M_B_DQ27 G26 J19 M_A_DQ27
&38:,7+,1 (7,8) M_CKE2 MB_CKE0 MB0_ODT0 M_ODT2 (7,8)
M_B_DQ26 MB_DATA27 MA_DATA27 M_A_DQ26
3 (7,8) M_CKE1 J20 MA_CKE1 MA0_ODT1 V20 M_ODT1 (7,8) G25 MB_DATA26 MA_DATA26 H24 3
M_B_DQ25 M_A_DQ25

7R62',00VRFNHW$ QHDU
7R62',00VRFNHW% )DU
(7,8) M_CKE0 J21 MA_CKE0 MA0_ODT0 U19 M_ODT0 (7,8) E24 MB_DATA25 MA_DATA25 F22
M_B_DQ24 E23 F20 M_A_DQ24
(7,8) M_A_A[0..15] MB_DATA24 MA_DATA24
M_A_A15 K19 J25 M_B_A15 M_B_DQ23 C24 C23 M_A_DQ23
MA_ADD15 MB_ADD15 M_B_A[0..15] (7,8) MB_DATA23 MA_DATA23
M_A_A14 K20 J26 M_B_A14 M_B_DQ22 B24 B22 M_A_DQ22
M_A_A13 MA_ADD14 MB_ADD14 M_B_A13 M_B_DQ21 MB_DATA22 MA_DATA22 M_A_DQ21
V24 MA_ADD13 MB_ADD13 W25 C20 MB_DATA21 MA_DATA21 F18
M_A_A12 K24 L23 M_B_A12 M_B_DQ20 B20 E18 M_A_DQ20
M_A_A11 MA_ADD12 MB_ADD12 M_B_A11 M_B_DQ19 MB_DATA20 MA_DATA20 M_A_DQ19
L20 MA_ADD11 MB_ADD11 L25 C25 MB_DATA19 MA_DATA19 E20
M_A_A10 R19 U25 M_B_A10 M_B_DQ18 D24 D22 M_A_DQ18
M_A_A9 MA_ADD10 MB_ADD10 M_B_A9 M_B_DQ17 MB_DATA18 MA_DATA18 M_A_DQ17
L19 MA_ADD9 MB_ADD9 L24 A21 MB_DATA17 MA_DATA17 C19
M_A_A8 L22 M26 M_B_A8 M_B_DQ16 D20 G18 M_A_DQ16
M_A_A7 MA_ADD8 MB_ADD8 M_B_A7 M_B_DQ15 MB_DATA16 MA_DATA16 M_A_DQ15
L21 MA_ADD7 MB_ADD7 L26 D18 MB_DATA15 MA_DATA15 G17
M_A_A6 M19 N23 M_B_A6 M_B_DQ14 C18 C17 M_A_DQ14
M_A_A5 MA_ADD6 MB_ADD6 M_B_A5 M_B_DQ13 MB_DATA14 MA_DATA14 M_A_DQ13
M20 MA_ADD5 MB_ADD5 N24 D14 MB_DATA13 MA_DATA13 F14
M_A_A4 M24 N25 M_B_A4 M_B_DQ12 C14 E14 M_A_DQ12
M_A_A3 MA_ADD4 MB_ADD4 M_B_A3 M_B_DQ11 MB_DATA12 MA_DATA12 M_A_DQ11
M22 MA_ADD3 MB_ADD3 N26 A20 MB_DATA11 MA_DATA11 H17
M_A_A2 N22 P24 M_B_A2 M_B_DQ10 A19 E17 M_A_DQ10
M_A_A1 MA_ADD2 MB_ADD2 M_B_A1 M_B_DQ9 MB_DATA10 MA_DATA10 M_A_DQ9
N21 MA_ADD1 MB_ADD1 P26 A16 MB_DATA9 MA_DATA9 E15
M_A_A0 R21 T24 M_B_A0 M_B_DQ8 A15 H15 M_A_DQ8
MA_ADD0 MB_ADD0 M_B_DQ7 MB_DATA8 MA_DATA8 M_A_DQ7
A13 MB_DATA7 MA_DATA7 E13
K22 K26 M_B_BS#2 (7,8) M_B_DQ6 D12 C13 M_A_DQ6
(7,8) M_A_BS#2 MA_BANK2 MB_BANK2 MB_DATA6 MA_DATA6
R20 T26 M_B_BS#1 (7,8) M_B_DQ5 E11 H12 M_A_DQ5
(7,8) M_A_BS#1 MA_BANK1 MB_BANK1 MB_DATA5 MA_DATA5
T22 U26 M_B_BS#0 (7,8) M_B_DQ4 G11 H11 M_A_DQ4
(7,8) M_A_BS#0 MA_BANK0 MB_BANK0 MB_DATA4 MA_DATA4
M_B_DQ3 B14 G14 M_A_DQ3
M_B_DQ2 MB_DATA3 MA_DATA3 M_A_DQ2
(7,8) M_A_RAS# T20 MA_RAS_L MB_RAS_L U24 M_B_RAS# (7,8) A14 MB_DATA2 MA_DATA2 H14
U20 V26 M_B_DQ1 A11 F12 M_A_DQ1
(7,8) M_A_CAS# MA_CAS_L MB_CAS_L M_B_CAS# (7,8) MB_DATA1 MA_DATA1
U21 U22 M_B_DQ0 C11 G12 M_A_DQ0
(7,8) M_A_WE# MA_WE_L MB_WE_L M_B_WE# (7,8) MB_DATA0 MA_DATA0
M_B_DM7 AD12 Y13 M_A_DM7
DDR II: CMD/CTRL/CLK M_B_DM6 MB_DM7 MA_DM7 M_A_DM6
AC16 MB_DM6 MA_DM6 AB16
M_B_DM5 AE22 Y19 M_A_DM5
M_B_DM4 MB_DM5 MA_DM5 M_A_DM4
Athlon 64 S1 AB26 MB_DM4 MA_DM4 AC24
M_B_DM3 E25 F24 M_A_DM3
Processor Socket M_B_DM2 MB_DM3 MA_DM3 M_A_DM2
A22 MB_DM2 MA_DM2 E19
M_B_DM1 B16 C15 M_A_DM1
M_B_DM0 MB_DM1 MA_DM1 M_A_DM0
2
(7) M_B_DM[0..7] A12 MB_DM0 MA_DM0 E12 M_A_DM[0..7] (7) 2

M_B_DQS7 AF12 W12 M_A_DQS7


M_B_DQS#7 MB_DQS_H7 MA_DQS_H7 M_A_DQS#7
AE12 MB_DQS_L7 MA_DQS_L7 W13
M_B_DQS6 AE16 Y15 M_A_DQS6
M_B_DQS#6 MB_DQS_H6 MA_DQS_H6 M_A_DQS#6
AD16 MB_DQS_L6 MA_DQS_L6 W15
M_B_DQS5 AF21 AB19 M_A_DQS5
M_B_DQS#5 MB_DQS_H5 MA_DQS_H5 M_A_DQS#5
AF22 MB_DQS_L5 MA_DQS_L5 AB20
M_B_DQS4 AC25 AD23 M_A_DQS4
M_B_DQS#4 MB_DQS_H4 MA_DQS_H4 M_A_DQS#4
AC26 MB_DQS_L4 MA_DQS_L4 AC23
M_B_DQS3 F26 G22 M_A_DQS3
M_B_DQS#3 MB_DQS_H3 MA_DQS_H3 M_A_DQS#3
E26 MB_DQS_L3 MA_DQS_L3 G21
M_B_DQS2 A24 C22 M_A_DQS2
M_B_DQS#2 MB_DQS_H2 MA_DQS_H2 M_A_DQS#2
A23 MB_DQS_L2 MA_DQS_L2 C21
M_B_DQS1 D16 G16 M_A_DQS1
M_B_DQS#1 MB_DQS_H1 MA_DQS_H1 M_A_DQS#1
C16 MB_DQS_L1 MA_DQS_L1 G15
M_B_DQS0 C12 G13 M_A_DQS0
M_B_DQS#0 MB_DQS_H0 MA_DQS_H0 M_A_DQS#0
B12 MB_DQS_L0 MA_DQS_L0 H13

M_A_DQS0
M_B_DQS0 M_A_DQS1
M_B_DQS1 DDR: DATA M_A_DQS2
+0.9V_DDR_VTT M_B_DQS2 Athlon 64 S1 M_A_DQS3
M_B_DQS3 M_A_DQS4
Processor Socket
M_B_DQS4 M_A_DQS5
M_B_DQS5 M_A_DQS6
C10 C11 C12 C13 C14 C15 C16 C17 M_B_DQS6 M_A_DQS7
(7) M_A_DQS[0..7]
M_B_DQS7
(7) M_B_DQS[0..7]
4.7U_6.3V_0603 4.7U_6.3V_0603 4.7U_6.3V_0603 4.7U_6.3V_0603 .22U_6.3V .22U_6.3V .22U_6.3V .22U_6.3V M_A_DQS#0
M_B_DQS#0 M_A_DQS#1
M_B_DQS#1 M_A_DQS#2
M_B_DQS#2 M_A_DQS#3
M_B_DQS#3 M_A_DQS#4
M_B_DQS#4 M_A_DQS#5
+0.9V_DDR_VTT M_B_DQS#5 M_A_DQS#6
1 1
M_B_DQS#6 M_A_DQS#7
(7) M_A_DQS#[0..7]
M_B_DQS#7
(7) M_B_DQS#[0..7]
C18 C19 C20 C21 C22 C23 C24 C25

1000p_50V 1000p_50V 1000p_50V 1000p_50V 180P_50V 180P_50V 180P_50V 180P_50V


QUANTA
Title
COMPUTER
ATHLON64 DDRII MEMORY

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 4 of 47


A B C D E
5 4 3 2 1

/$<2875287(9''$75$&($3352; $7+/21&RQWURODQG'HEXJ
PLOV:,'( 86([PLO75$&(672
(;,7%$//),(/' $1'PLOV/21* +1.8V_SUS +1.8V_SUS

If AMD SI is not used, the SID pin can be left unconnected


and SIC should have a 300-ȍ (±5%) pulldown to VSS.
R551 R8
&38B9''$B581 +1.8V_SUS R7
R9
*300_NC
*300_NC
300 300

+2.5V_RUN U1D
BLM18PG330SN1D_0603 R10 300 CPU_SIC_R CPU_VDDA_RUN F8 AF6 H_THERMTRIP#
VDDA2 THERMTRIP_L H_THERMTRIP# (35)
CPU_VDDA_RUN CPU_SID_R F9 AC7 H_PROCHOT#
L3 VDDA1 PROCHOT_L

(14) CPU_SIC R523 *0_NC CPU_HT_RESET# B7


T6 RESET_L
C26 C27 C28 C29 CPU_ALL_PWROK A7
(14) CPU_SID T5 PWROK
R524 *0_NC CPU_LDTSTOP# F10
D T7 LDTSTOP_L D
4.7U_6.3V_0603 .22U_6.3V 3900p_25V 100U_6.3V_3528 A5
VID5 VID5 (37)
CPU_SIC_R AF4 C6
VLDT_RUN SIC VID4 VID4 (37)
CPU_SID_R AF5 A6
SID VID3 VID3 (37)
for CPU rev.F , if for rev.G , populate VID2 A4 VID2 (37)
R7,R9,R523,R524 and depopulate R10 SODFHWKHPWR&38ZLWKLQ R13 44.2/F CPU_HTREF1 P6 C5
HT_REF1 VID1 VID1 (37)
CPU_HTREF0 R6 B5
HT_REF0 VID0 VID0 (37)
R12 44.2/F
AC6 CPU_PRESENT#
T8 CPU_PRESENT_L
C30 3900p_25V CPU_CLKIN_SC_P F6
(13) CPUCLK (37) COREFB+V VDD_FB_H
CPU_CLKIN_SC_N E6 A3
To Power (37) COREFB- VDD_FB_L PSI_L PSI# (37)
T4
VDDIO_FB_H W9
(39) VDDIO_FB_H VDDIO_FB_H T11
R14 R567 0 Y9 VDDIO_FB_L

1
C678 PSI_L is a Power Status Indicator signal. This signal is asserted when the
169/F_0603 CPU_CLKIN_SC_P A9 processor is in a low powerstate. PSI_L should be connected to the power
470P_50V CPU_CLKIN_SC_N CLKIN_H
A8
supply controller, if the controller supports “skipmode, or diode emulation

2
CLKIN_L
(13) CPUCLK# for +1.8V_SUS feedback
mode”. PSI_L is asserted by the processor during the C3 and S1 states.
C31 3900p_25V

R14 close U1 within 600 mil , C30 CPU_DBRDY G10 DBRDY


& C31 close U1 within 1250 mil
CPU_TMS AA9 E10 CPU_DBREQ#
CPU_TCK TMS DBREQ_L
AC9 TCK
CPU_TRST# AD9
CPU_TDI TRST_L CPU_TDO
AF9 TDI TDO AE9

C9 CPU_TEST29_H_FBCLKOUT_P R16 80.6/F


CPU_TEST25_H_BYPASSCLK_H TEST29_H CPU_TEST29_L_FBCLKOUT_N
E9 TEST25_H TEST29_L C8
CPU_TEST25_L_BYPASSCLK_L E8 5287($62KP',))(5(17,$/3$,5
CPU_TEST19_PLLTEST0 TEST25_L
G9 TEST19 3/$&(,7&/26(72&38:,7+,1
CPU_TEST18_PLLTEST1 H10 TEST18
AA7 TEST13
C2 TEST9 TEST24 AE7
CPU_TEST17_BP3 D7 AD7 CPU_TEST23_TSTUPD
T13 TEST17 TEST23 T14
CPU_TEST16_BP2 E7 AE8
C T12 TEST16 TEST22 C
R19 0 CPU_ALL_PWROK F7 AB8 CPU_TEST21_SCANEN
(14,15) CPU_PWRGD TEST15 TEST21
C7 TEST14 TEST20 AF7
1

AC8 TEST12
R525 J7 CPU_TEST28_H_PLLCHRZ_P
TEST28_H T18
10K CPU_TEST07_ANALOG_T C3 H8 CPU_TEST28_L_PLLCHRZ_N
T15 TEST7 TEST28_L T17
CPU_TEST6_DIECRACKMON AA6 AF8
T16 TEST6 TEST27
change for SB600 from SB460 CPU_TEST5_THERMDC W7 AE6 CPU_TEST26_BURNIN#
(35) CPU_TEST5_THERMDC
2

CPU_TEST4_THERMDA TEST5 TEST26 CPU_TEST10_ANALOGOUT


(35) CPU_TEST4_THERMDA W8 TEST4 TEST10 K8 T20
CPU_TEST3_GATE0 Y6 C4 CPU_TEST08_DIG_T
T19 TEST3 TEST8 T22
CPU_TEST2_DRAIN0 AB6
T21 TEST2
R20 0 CPU_LDTSTOP# add port to Page 35 U36 Thermal IC
(11,14) LDT_STOP#
1

R526
10K CPU_RSVD_MA0_CLK3_P P20 H16 CPU_MA_RESET#
T24 RSVD0 RSVD8 T25
CPU_RSVD_MA0_CLK3_N P19 B18 CPU_MB_RESET#
T23 RSVD1 RSVD9 T27
CPU_RSVD_MA0_CLK0_P N20
T26
2

CPU_RSVD_MA0_CLK0_N RSVD2 CPU_RSVD_VIDSTRB1


T28 N19 RSVD3 RSVD10 B3 T30
C1 CPU_RSVD_VIDSTRB0
RSVD11 T29
R527 0 CPU_HT_RESET# H6 CPU_RSVD_VDDNB_FB_P
(14) LDT_RST# RSVD12 T31
G6 CPU_RSVD_VDDNB_FB_N
RSVD13 T32
1

D5 CPU_RSVD_CORE_TYPE
RSVD14 T33
R528 R527 can be used for EMI MISC
10K verifing, place close to CPU RSVD15 R24
RSVD16 W18
CPU_RSVD_MB0_CLK3_P R26 R23
T34
2

CPU_RSVD_MB0_CLK3_N RSVD4 RSVD17


T36 R25 RSVD5 RSVD18 AA8
CPU_RSVD_MB0_CLK0_P P22 H18
T35 RSVD6 RSVD19
CPU_RSVD_MB0_CLK0_N R22 H19
T37 RSVD7 RSVD20

AMD NPT S1 SOCKET


Processor Socket

B B
change TEST 12/14/15/20/22/24/27 to be
NC pin without pull up or pull down

+1.8V_RUN
0428 : depopulate R24 & Q2 , because
AMD Errata 141 "PROCHOT_L should not add HDT connector for debug convenience
+1.8V_SUS R24 be used as an output from the processor"
delete ED5 H_THERMTRIP# circuit
*10K_NC
+'7&211(&725
+1.8V_SUS
R27
JHDT1
300 Q2 CPU_TEST26_BURNIN# R22 300 1 2 +3.3V_SUS +1.8V_SUS
GND GND
2

*MMBT3904_NC CPU_PRESENT# R25 1K/F 3 4


CPU_TEST25_H_BYPASSCLK_H R26 510/F Resreved GND
5 Resreved GND 6
H_PROCHOT# 1 3 CPU_DBREQ# 7 8
CPU_EC_PROCHOT# (27) DBREQ_L GND
CPU_TEST21_SCANEN R32 300 CPU_DBRDY 9 10 R581
CPU_TEST25_L_BYPASSCLK_L R44 510/F CPU_TCK DBRDY GND R580
11 TCK GND 12
CPU_TEST19_PLLTEST0 R45 300 CPU_TMS 13 14 *10K_NC
CPU_TEST18_PLLTEST1 R46 300 CPU_TDI TMS GND *10K_NC
15 TDI GND 16
1 3 CPU_TRST# 17 18 Q55
CPU_PROCHOT# (15) TRST_L GND

2
If no use which Net CPU_TDO 19 20 *MMBT3904_NC
TDO GND
need pull-up or down 21 VDDIO GND 22
*MMBT3904_NC 23 24 CPU_RESET# 3 1 CPU_HT_RESET#
+1.8V_SUS
2

Q49 VDDIO RESET_L


GND 25

*HDT conn_NC

SB this pin is 3.3V,need it level-shift.

A A

delete ED5 thermal sensor

QUANTA
Title
COMPUTER
ATHLON64 CTRL & DEBUG

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 5 of 47


5 4 3 2 1
5 4 3 2 1

U1F
+VCC_CORE +VCC_CORE AA4 J6
U1E VSS1 VSS66
AA11 J8
D AC4
AD2
VDD1 VDD43 V12
V14
AA13
AA15
VSS2
VSS3
VSS67
VSS68 J10
J12
%277206,'('(&283/,1* D
VDD2 VDD44 VSS4 VSS69
G4 VDD3 VDD45 W4 AA17 VSS5 VSS70 J14
H2 Y2 AA19 J16 +VCC_CORE
VDD4 VDD46 VSS6 VSS71
J9 VDD5 VDD47 J15 AB2 VSS7 VSS72 J18
J11 VDD6 VDD48 K16 AB7 VSS8 VSS73 K2
J13 VDD7 VDD49 L15 AB9 VSS9 VSS74 K7
K6 VDD8 VDD50 M16 AB23 VSS10 VSS75 K9
K10 P16 AB25 K11 C37 C38 C39 C40 C41 C42 C43
VDD9 VDD51 VSS11 VSS76
K12 VDD10 VDD52 T16 AC11 VSS12 VSS77 K13
K14 U15 AC13 K15 22U_10V_0805 22U_10V_0805 22U_10V_0805 22U_10V_0805 22U_10V_0805 22U_10V_0805 22U_10V_0805
VDD11 VDD53 VSS13 VSS78
L4 VDD12 VDD54 V16 AC15 VSS14 VSS79 K17
L7 +1.8V_SUS AC17 L6
VDD13 VSS15 VSS80
L9 VDD14 AC19 VSS16 VSS81 L8
L11 VDD15 VDDIO1 H25 AC21 VSS17 VSS82 L10
L13 J17 AD6 L12 +VCC_CORE
VDD16 VDDIO2 VSS18 VSS83
M2 VDD17 VDDIO3 K18 AD8 VSS19 VSS84 L14
M6 VDD18 VDDIO4 K21 AD25 VSS20 VSS85 L16
M8 VDD19 VDDIO5 K23 AE11 VSS21 VSS86 L18
M10 K25 AE13 M7 C44 C45 C46 C47 C48 C49
VDD20 VDDIO6 VSS22 VSS87
N7 VDD21 VDDIO7 L17 AE15 VSS23 VSS88 M9
N9 M18 AE17 M11 22U_10V_0805 22U_10V_0805 .22U_6.3V .22U_6.3V .01U_16V 180P_50V
VDD22 VDDIO8 VSS24 VSS89
N11 VDD23 VDDIO9 M21 AE19 VSS25 VSS90 M17
P8 VDD24 VDDIO10 M23 AE21 VSS26 VSS91 N4
P10 VDD25 VDDIO11 M25 AE23 VSS27 VSS92 N8
R4 VDD26 VDDIO12 N17 B4 VSS28 VSS93 N10
R7 P18 B6 N16 +1.8V_SUS
VDD27 VDDIO13 VSS29 VSS94
C R9 VDD28 VDDIO14 P21 B8 VSS30 VSS95 N18 C
R11 VDD29 VDDIO15 P23 B9 VSS31 VSS96 P2
T2 VDD30 VDDIO16 P25 B11 VSS32 VSS97 P7
T6 R17 B13 P9 C50 C51 C52 C53
VDD31 VDDIO17 VSS33 VSS98
T8 VDD32 VDDIO18 T18 B15 VSS34 VSS99 P11
T10 T21 B17 P17 22U_10V_0805 22U_10V_0805 .22U_6.3V .22U_6.3V
VDD33 VDDIO19 VSS35 VSS100
T12 VDD34 VDDIO20 T23 B19 VSS36 VSS101 R8
T14 VDD35 VDDIO21 T25 B21 VSS37 VSS102 R10
U7 VDD36 VDDIO22 U17 B23 VSS38 VSS103 R16
U9 VDD37 VDDIO23 V18 B25 VSS39 VSS104 R18
U11 VDD38 VDDIO24 V21 D6 VSS40 VSS105 T7
U13 VDD39 VDDIO25 V23 D8 VSS41 VSS106 T9
V6 VDD40 VDDIO26 V25 D9 VSS42 VSS107 T11
V8 Y25 D11 T13
V10
VDD41
VDD42
VDDIO27
D13
D15
VSS43
VSS44
VSS108
VSS109 T15
T17
'(&283/,1*%(7:((1352&(6625$1'',00V
POWER D17
D19
VSS45
VSS46
VSS110
VSS111 U4
U6
3/$&(&/26(72352&(6625$63266,%/(
VSS47 VSS112
Athlon 64 S1 D21 VSS48 VSS113 U8
Processor Socket D23 VSS49 VSS114 U10
D25 U12 +1.8V_SUS
VSS50 VSS115
E4 VSS51 VSS116 U14
F2 VSS52 VSS117 U16
F11 VSS53 VSS118 U18
F13 V2 C54 C55 C56 C57 C58 C59 C60 C61
VSS54 VSS119
F15 VSS55 VSS120 V7
F17 V9 4.7U_6.3V_0603 4.7U_6.3V_0603 4.7U_6.3V_0603 4.7U_6.3V_0603 .22U_6.3V .22U_6.3V .22U_6.3V .22U_6.3V
VSS56 VSS121
B F19 VSS57 VSS122 V11 B
F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15
F25 VSS60 VSS125 V17
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21 add more two 180p
H21 Y23 +1.8V_SUS Cap as AMD suggestion
VSS63 VSS128
H23 VSS64 VSS129 N6
J4 VSS65

1
GROUND C62 C63 C64 C65 C66 C647 C648

Athlon 64 S1 .01U_25V .01U_25V 10P_50V 180P_50V 180P_50V 180P_50V 180P_50V

2
Processor Socket
A1 A26

Athlon 64 S1g1
uPGA638
352&(662532:(5$1'*5281'
A
Top View A

QUANTA
AF1
Title
COMPUTER
ATHLON64 PWR & GND

Size Document Number Rev


FX2 1A

Date: Thursday, May 04, 2006 Sheet 6 of 47


5 4 3 2 1
A B C D E

1.Change DDR2 socket(P/N, Description, footprint, part reference, value)


2.swap DDR2 trace as "fx2_swap-0412 & "e0788.1104a_swap-0422"
+1.8V_SUS +1.8V_SUS

103
104
111
112
117
118

103
104
111
112
117
118
JDIM1 JDIM2

81
82
87
88
95
96

81
82
87
88
95
96
(4,8) M_A_A[0..15] M_A_DQ[0..63] (4) (4,8) M_B_A[0..15] M_B_DQ[0..63] (4)
M_A_A0 102 5 M_A_DQ0 M_B_A0 102 5 M_B_DQ5

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
M_A_A1 A0 DQ0 M_A_DQ4 M_B_A1 A0 DQ0 M_B_DQ1
101 A1 DQ1 7 101 A1 DQ1 7
M_A_A2 100 17 M_A_DQ6 M_B_A2 100 17 M_B_DQ2
M_A_A3 A2 DQ2 M_A_DQ3 M_B_A3 A2 DQ2 M_B_DQ3
99 A3 DQ3 19 99 A3 DQ3 19
4 M_A_A4 98 4 M_A_DQ1 M_B_A4 98 4 M_B_DQ0 4
M_A_A5 A4 DQ4 M_A_DQ5 M_B_A5 A4 DQ4 M_B_DQ4
97 A5 DQ5 6 97 A5 DQ5 6
M_A_A6 94 14 M_A_DQ2 M_B_A6 94 14 M_B_DQ6
M_A_A7 A6 DQ6 M_A_DQ7 M_B_A7 A6 DQ6 M_B_DQ7
92 A7 DQ7 16 92 A7 DQ7 16
M_A_A8 93 23 M_A_DQ8 M_B_A8 93 23 M_B_DQ9
M_A_A9 A8 DQ8 M_A_DQ9 M_B_A9 A8 DQ8 M_B_DQ13
91 A9 DQ9 25 91 A9 DQ9 25
M_A_A10 105 35 M_A_DQ15 M_B_A10 105 35 M_B_DQ11
M_A_A11 A10 DQ10 M_A_DQ11 M_B_A11 A10 DQ10 M_B_DQ14
90 A11 DQ11 37 90 A11 DQ11 37
M_A_A12 89 20 M_A_DQ12 M_B_A12 89 20 M_B_DQ8
M_A_A13 A12 DQ12 M_A_DQ13 M_B_A13 A12 DQ12 M_B_DQ12
116 A13 DQ13 22 116 A13 DQ13 22
M_A_A14 86 36 M_A_DQ10 M_B_A14 86 36 M_B_DQ15
M_A_A15 A14 DQ14 M_A_DQ14 M_B_A15 A14 DQ14 M_B_DQ10
84 A15 DQ15 38 84 A15 DQ15 38
43 M_A_DQ22 43 M_B_DQ16
DQ16 M_A_DQ19 DQ16 M_B_DQ21
(4,8) M_A_BS#0 107 BA0 DQ17 45 (4,8) M_B_BS#0 107 BA0 DQ17 45
106 55 M_A_DQ18 106 55 M_B_DQ23
(4,8) M_A_BS#1 BA1 DQ18 (4,8) M_B_BS#1 BA1 DQ18
85 57 M_A_DQ16 85 57 M_B_DQ19
(4,8) M_A_BS#2 BA2 DQ19 (4,8) M_B_BS#2 BA2 DQ19
44 M_A_DQ17 44 M_B_DQ20
M_A_DM0 DQ20 M_A_DQ20 M_B_DM0 DQ20 M_B_DQ17
10 DM0 DQ21 46 10 DM0 DQ21 46
M_A_DM1 26 56 M_A_DQ21 M_B_DM1 26 56 M_B_DQ18
M_A_DM2 DM1 DQ22 M_A_DQ23 M_B_DM2 DM1 DQ22 M_B_DQ22
52 DM2 DQ23 58 52 DM2 DQ23 58
M_A_DM3 67 61 M_A_DQ25 M_B_DM3 67 61 M_B_DQ29
M_A_DM5 DM3 DQ24 M_A_DQ24 M_B_DM7 DM3 DQ24 M_B_DQ25
130 DM4 DQ25 63 130 DM4 DQ25 63
M_A_DM4 147 73 M_A_DQ30 M_B_DM4 147 73 M_B_DQ27
M_A_DM6 DM5 DQ26 M_A_DQ27 M_B_DM5 DM5 DQ26 M_B_DQ26
170 DM6 DQ27 75 170 DM6 DQ27 75
M_A_DM7 185 62 M_A_DQ29 M_B_DM6 185 62 M_B_DQ24
(4) M_A_DM[0..7] DM7 DQ28 (4) M_B_DM[0..7] DM7 DQ28
64 M_A_DQ28 64 M_B_DQ28
M_A_DQS0 DQ29 M_A_DQ26 M_B_DQS0 DQ29 M_B_DQ31
13 DQS0 DQ30 74 13 DQS0 DQ30 74
M_A_DQS1 M_A_DQ31 M_B_DQS1 M_B_DQ30

PC4800 DDR2 SDRAM


31 76 31 76
PC4800 DDR2 SDRAM
M_A_DQS2 DQS1 DQ31 M_A_DQ46 M_B_DQS2 DQS1 DQ31 M_B_DQ58
51 DQS2 DQ32 123 51 DQS2 DQ32 123
3 M_A_DQS3 70 125 M_A_DQ43 M_B_DQS3 70 125 M_B_DQ57 +1.8V_SUS 3
M_A_DQS5 DQS3 DQ33 M_A_DQ44 M_B_DQS7 DQS3 DQ33 M_B_DQ61
131 DQS4 DQ34 135 131 DQS4 DQ34 135
M_A_DQS4 148 137 M_A_DQ45 M_B_DQS4 148 137 M_B_DQ60
M_A_DQS6 DQS5 DQ35 M_A_DQ42 M_B_DQS5 DQS5 DQ35 M_B_DQ59 C67 *10U_6.3V_0805_NC
169 DQS6 DQ36 124 169 DQS6 DQ36 124
M_A_DQS7 188 126 M_A_DQ47 M_B_DQS6 188 126 M_B_DQ63
(4) M_A_DQS[0..7] DQS7 DQ37 (4) M_B_DQS[0..7] DQS7 DQ37
134 M_A_DQ41 134 M_B_DQ62 C68 *10U_6.3V_0805_NC
DQ38 DQ38

SO-DIMM (200P)
M_A_DQS#0 M_A_DQ40 M_B_DQS#0 M_B_DQ56
SO-DIMM (200P)

11 DQS0 DQ39 136 11 DQS0 DQ39 136


M_A_DQS#1 29 141 M_A_DQ32 M_B_DQS#1 29 141 M_B_DQ34 C69 10U_10V_0805
M_A_DQS#2 DQS1 DQ40 M_A_DQ38 M_B_DQS#2 DQS1 DQ40 M_B_DQ37
49 DQS2 DQ41 143 49 DQS2 DQ41 143
M_A_DQS#3 68 151 M_A_DQ34 M_B_DQS#3 68 151 M_B_DQ38 C70 10U_10V_0805
M_A_DQS#5 DQS3 DQ42 M_A_DQ39 M_B_DQS#7 DQS3 DQ42 M_B_DQ39
129 DQS4 DQ43 153 129 DQS4 DQ43 153
M_A_DQS#4 146 140 M_A_DQ37 M_B_DQS#4 146 140 M_B_DQ33
M_A_DQS#6 DQS5 DQ44 M_A_DQ36 M_B_DQS#5 DQS5 DQ44 M_B_DQ32 C71 .1U_10V
167 DQS6 DQ45 142 167 DQS6 DQ45 142
M_A_DQS#7 186 152 M_A_DQ35 M_B_DQS#6 186 152 M_B_DQ36
(4) M_A_DQS#[0..7] DQS7 DQ46 (4) M_B_DQS#[0..7] DQS7 DQ46
154 M_A_DQ33 154 M_B_DQ35 C72 .1U_10V
DQ47 M_A_DQ48 DQ47 M_B_DQ45
DQ48 157 DQ48 157
30 159 M_A_DQ49 M_CLKOUT3 30 159 M_B_DQ44 C73 .1U_10V
(4) M_CLKOUT0 CK0 DQ49 (4) M_CLKOUT3 CK0 DQ49
32 173 M_A_DQ54 M_CLKOUT3# 32 173 M_B_DQ46
(4) M_CLKOUT0# CK0 DQ50 (4) M_CLKOUT3# CK0 DQ50
164 175 M_A_DQ55 M_CLKOUT4 164 175 M_B_DQ42 C74 .1U_10V
(4) M_CLKOUT1 CK1 DQ51 (4) M_CLKOUT4 CK1 DQ51
166 158 M_A_DQ53 M_CLKOUT4# 166 158 M_B_DQ41
(4) M_CLKOUT1# CK1 DQ52 (4) M_CLKOUT4# CK1 DQ52
160 M_A_DQ52 160 M_B_DQ40 C75 .1U_10V
DQ53 M_A_DQ51 DQ53 M_B_DQ47
(4,8) M_CKE0 79 CKE0 DQ54 174 (4,8) M_CKE2 79 CKE0 DQ54 174
M_CLKOUT0 80 176 M_A_DQ50 M_CLKOUT3 80 176 M_B_DQ43 C77 .1U_10V
(4,8) M_CKE1 CKE1 DQ55 (4,8) M_CKE3 CKE1 DQ55
179 M_A_DQ56 179 M_B_DQ52
DQ56 M_A_DQ57 DQ56 M_B_DQ49 C79 .1U_10V
(4,8) M_A_RAS# 108 RAS DQ57 181 (4,8) M_B_RAS# 108 RAS DQ57 181
C78 113 189 M_A_DQ59 C76 113 189 M_B_DQ50
(4,8) M_A_CAS# CAS DQ58 (4,8) M_B_CAS# CAS DQ58
1.5P_50V 109 191 M_A_DQ58 1.5P_50V 109 191 M_B_DQ51 C80 .1U_10V
(4,8) M_A_WE# WE DQ59 (4,8) M_B_WE# WE DQ59
M_CLKOUT0# 110 180 M_A_DQ60 M_CLKOUT3# 110 180 M_B_DQ48
(4,8) M_A_CS#0 S0 DQ60 (4,8) M_B_CS#0 S0 DQ60
115 182 M_A_DQ61 115 182 M_B_DQ54 C81 .1U_10V
2 (4,8) M_A_CS#1 S1 DQ61 (4,8) M_B_CS#1 S1 DQ61 2
M_CLKOUT1 192 M_A_DQ63 M_CLKOUT4 192 M_B_DQ55
DQ62 M_A_DQ62 DQ62 M_B_DQ53 C84 .1U_10V
(4,8) M_ODT0 114 ODT0 DQ63 194 (4,8) M_ODT2 114 ODT0 DQ63 194
(4,8) M_ODT1 119 ODT1 (4,8) M_ODT3 119 ODT1
C82 50 C83 50 C85 .1U_10V
1.5P_50V NC1 1.5P_50V R53 0 NC1
198 SA0 NC2 69 198 SA0 NC2 69
M_CLKOUT1# 200 83 M_CLKOUT4# +3.3V_RUN R52 10K 200 83 C86 .1U_10V
SA1 NC3 M_A_CS#2 (4,8) SA1 NC3 M_B_CS#2 (4,8)
NC4 120 M_A_CS#3 (4,8) NC4 120 M_B_CS#3 (4,8)
195 163 SMBDT 195 163 C88 .1U_10V
(13) SMBDT SDA NC/TEST SDA NC/TEST
197 SMBCK 197
(13) SMBCK SCL SCL C91 .1U_10V
+3.3V_RUN C89 .1U_10V 199 +3.3V_RUN C87 .1U_10V 199
VDDspd VDDspd C93 .1U_10V
+1.8V_SUS C92 .1U_10V MVREF_DIM 1 196 +1.8V_SUS C90 .1U_10V MVREF_DIM 1 196
VREF VSS56 VREF VSS56 C97 .1U_10V
VSS55 193 VSS55 193
2

2 VSS0 VSS54 190 2 VSS0 VSS54 190


C94 C98 3 187 C95 C96 3 187 C99 .1U_10V
2.2U_10V_0805 .1U_10V VSS1 VSS53 2.2U_10V_0805 .1U_10V VSS1 VSS53
8 184 8 184
1

VSS2 VSS52 VSS2 VSS52 C100 .1U_10V


9 VSS3 VSS51 183 9 VSS3 VSS51 183
12 VSS4 VSS50 178 12 VSS4 VSS50 178
15 177 15 177 C101 .1U_10V
VSS5 VSS49 VSS5 VSS49
18 VSS6 VSS48 172 18 VSS6 VSS48 172
21 171 +0.9V_REF +1.8V_SUS 21 171 C102 .1U_10V
VSS7 VSS47 VSS7 VSS47
24 VSS8 VSS46 168 24 VSS8 VSS46 168
27 VSS9 VSS45 165 27 VSS9 VSS45 165
28 VSS10 VSS44 162 28 VSS10 VSS44 162
33 161 R54 R55 33 161
VSS11 VSS43 *0_NC 1K/F VSS11 VSS43
34 VSS12 VSS42 156 34 VSS12 VSS42 156
39 VSS13 VSS41 155 39 VSS13 VSS41 155
40 150 MVREF_DIM 40 150
1 VSS14 VSS40 VSS14 VSS40 1
41 VSS15 VSS39 149 41 VSS15 VSS39 149
42 VSS16 VSS38 145 42 VSS16 VSS38 145
47 144 C103 R56 47 144
48
VSS17 VSS37
139 1K/F 48
VSS17 VSS37
139 QUANTA
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS18 VSS36 1U_10V VSS18 VSS36
53 VSS19 VSS35 138 53 VSS19 VSS35 138
54 VSS20 VSS34 133 54 VSS20 VSS34 133

Title
COMPUTER
59
60
65
66
71
72
77
78
121
122
127
128
132

59
60
65
66
71
72
77
78
121
122
127
128
132
FOXCONN_AS0A426-N4SN-7F FOXCONN_AS0A426-N4RN-7F DDRII SODIMMX2

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 7 of 47


A B C D E
1 2 3 4 5 6 7 8

+0.9V_DDR_VTT

R57 47
(4,7) M_CKE0
R59 47
(4,7) M_CKE1
R58 47
(4,7) M_CKE2
R60 47
(4,7) M_CKE3
R61 47
(4,7) M_ODT0
R62 47
(4,7) M_ODT1
R64 47
A (4,7) M_ODT2 A
R63 47
(4,7) M_ODT3
M_A_BS#0 R66 47
(4,7) M_A_BS#0
M_A_BS#1 R65 47
(4,7) M_A_BS#1
M_A_BS#2 R67 47
(4,7) M_A_BS#2
M_A_WE# R68 47 RTT termination changed from 56
(4,7) M_A_WE#
M_A_CAS# R70 47
(4,7) M_A_CAS# ohm to 47 ohm as AMD suggestion
M_A_RAS# R69 47
(4,7) M_A_RAS#
M_B_BS#0 R71 47
(4,7) M_B_BS#0
M_B_BS#1 R73 47
(4,7) M_B_BS#1
M_B_BS#2 R72 47
(4,7) M_B_BS#2
M_B_WE# R75 47
(4,7) M_B_WE#
M_B_CAS# R74 47
(4,7) M_B_CAS#
M_B_RAS# R76 47
(4,7) M_B_RAS#
R77 47
(4,7) M_A_CS#0
R79 47
(4,7) M_A_CS#1
R78 47
(4,7) M_A_CS#2
R80 47
(4,7) M_A_CS#3
R81 47
B (4,7) M_B_CS#0 B
R83 47
(4,7) M_B_CS#1
R82 47
(4,7) M_B_CS#2
R84 47
(4,7) M_B_CS#3

(4,7) M_A_A[0..15]
M_A_A13 R85 47
+0.9V_DDR_VTT M_A_A10 R86 47
M_A_A0 RP1 1 2 4P2R-47
C104 *10U_6.3V_0805_NC M_A_A2 3 4
M_A_A4 RP2 1 2 4P2R-47
C105 *10U_6.3V_0805_NC M_A_A6 3 4
M_A_A7 RP3 1 2 4P2R-47
C106 .1U_10V M_A_A11 3 4
C108 .1U_10V M_A_A12 RP4 1 2 4P2R-47
C107 .1U_10V M_A_A9 3 4
C109 .1U_10V M_A_A3 RP5 1 2 4P2R-47
C111 .1U_10V M_A_A1 3 4
C110 .1U_10V M_A_A8 RP6 1 2 4P2R-47
C112 .1U_10V M_A_A5 3 4
C114 .1U_10V M_A_A14 RP7 1 2 4P2R-47
C113 .1U_10V M_A_A15 3 4
C116 *.1U_10V_NC
C C115 *.1U_10V_NC C
C118 .1U_10V
C117 .1U_10V
(4,7) M_B_A[0..15]
C119 .1U_10V M_B_A0 RP8 1 2 4P2R-47
C120 .1U_10V M_B_A2 3 4
C122 .1U_10V M_B_A4 RP9 1 2 4P2R-47
C121 *.1U_10V_NC M_B_A6 3 4
C123 .1U_10V M_B_A7 RP10 1 2 4P2R-47
C125 .1U_10V M_B_A11 3 4
C124 .1U_10V M_B_A3 RP11 1 2 4P2R-47
C126 *.1U_10V_NC M_B_A1 3 4
C128 .1U_10V M_B_A8 RP12 1 2 4P2R-47
C127 .1U_10V M_B_A5 3 4
C129 .1U_10V M_B_A12 RP13 1 2 4P2R-47
C131 *.1U_10V_NC M_B_A9 3 4
C130 .1U_10V M_B_A10 R87 47
M_B_A13 R88 47
M_B_A14 RP14 1 2 4P2R-47
M_B_A15 3 4

D D
QUANTA
Title
COMPUTER
DDRII TERMINATION

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 8 of 47


1 2 3 4 5 6 7 8
5 4 3 2 1

D D

U6A

(3) HT_CADOUT15_P R19 HT_RXCAD15P HT_TXCAD15P P21 HT_CADIN15_P (3)


(3) HT_CADOUT15_N R18 HT_RXCAD15N 3$572) HT_TXCAD15N P22 HT_CADIN15_N (3)
(3) HT_CADOUT14_P R21 HT_RXCAD14P HT_TXCAD14P P18 HT_CADIN14_P (3)
(3) HT_CADOUT14_N R22 HT_RXCAD14N HT_TXCAD14N P19 HT_CADIN14_N (3)
(3) HT_CADOUT13_P U22 HT_RXCAD13P HT_TXCAD13P M22 HT_CADIN13_P (3)
(3) HT_CADOUT13_N U21 HT_RXCAD13N HT_TXCAD13N M21 HT_CADIN13_N (3)
(3) HT_CADOUT12_P U18 HT_RXCAD12P HT_TXCAD12P M18 HT_CADIN12_P (3)
(3) HT_CADOUT12_N U19 HT_RXCAD12N HT_TXCAD12N M19 HT_CADIN12_N (3)
(3) HT_CADOUT11_P W19 HT_RXCAD11P HT_TXCAD11P L18 HT_CADIN11_P (3)
(3) HT_CADOUT11_N W20 HT_RXCAD11N HT_TXCAD11N L19 HT_CADIN11_N (3)
(3) HT_CADOUT10_P AC21 HT_RXCAD10P HT_TXCAD10P G22 HT_CADIN10_P (3)
(3) HT_CADOUT10_N AB22 HT_RXCAD10N HT_TXCAD10N G21 HT_CADIN10_N (3)
(3) HT_CADOUT9_P AB20 HT_RXCAD9P HT_TXCAD9P J20 HT_CADIN9_P (3)
(3) HT_CADOUT9_N AA20 HT_RXCAD9N HT_TXCAD9N J21 HT_CADIN9_N (3)

+<3(575$163257&38,)
(3) HT_CADOUT8_P AA19 HT_RXCAD8P HT_TXCAD8P F21 HT_CADIN8_P (3)
(3) HT_CADOUT8_N Y19 HT_RXCAD8N HT_TXCAD8N F22 HT_CADIN8_N (3)
C C
(3) HT_CADOUT7_P T24 HT_RXCAD7P HT_TXCAD7P N24 HT_CADIN7_P (3)
(3) HT_CADOUT7_N R25 HT_RXCAD7N HT_TXCAD7N N25 HT_CADIN7_N (3)
(3) HT_CADOUT6_P U25 HT_RXCAD6P HT_TXCAD6P L25 HT_CADIN6_P (3)
(3) HT_CADOUT6_N U24 HT_RXCAD6N HT_TXCAD6N M24 HT_CADIN6_N (3)
(3) HT_CADOUT5_P V23 HT_RXCAD5P HT_TXCAD5P K25 HT_CADIN5_P (3)
(3) HT_CADOUT5_N U23 HT_RXCAD5N HT_TXCAD5N K24 HT_CADIN5_N (3)
(3) HT_CADOUT4_P V24 HT_RXCAD4P HT_TXCAD4P J23 HT_CADIN4_P (3)
(3) HT_CADOUT4_N V25 HT_RXCAD4N HT_TXCAD4N K23 HT_CADIN4_N (3)
(3) HT_CADOUT3_P AA25 HT_RXCAD3P HT_TXCAD3P G25 HT_CADIN3_P (3)
(3) HT_CADOUT3_N AA24 HT_RXCAD3N HT_TXCAD3N H24 HT_CADIN3_N (3)
(3) HT_CADOUT2_P AB23 HT_RXCAD2P HT_TXCAD2P F25 HT_CADIN2_P (3)
(3) HT_CADOUT2_N AA23 HT_RXCAD2N HT_TXCAD2N F24 HT_CADIN2_N (3)
(3) HT_CADOUT1_P AB24 HT_RXCAD1P HT_TXCAD1P E23 HT_CADIN1_P (3)
(3) HT_CADOUT1_N AB25 HT_RXCAD1N HT_TXCAD1N F23 HT_CADIN1_N (3)
(3) HT_CADOUT0_P AC24 HT_RXCAD0P HT_TXCAD0P E24 HT_CADIN0_P (3)
(3) HT_CADOUT0_N AC25 HT_RXCAD0N HT_TXCAD0N E25 HT_CADIN0_N (3)

(3) HT_CLKOUT1_P W21 HT_RXCLK1P HT_TXCLK1P L21 HT_CLKIN1_P (3)


(3) HT_CLKOUT1_N W22 HT_RXCLK1N HT_TXCLK1N L22 HT_CLKIN1_N (3)

(3) HT_CLKOUT0_P Y24 HT_RXCLK0P HT_TXCLK0P J24 HT_CLKIN0_P (3)


(3) HT_CLKOUT0_N W25 HT_RXCLK0N HT_TXCLK0N J25 HT_CLKIN0_N (3)
B
(3) HT_CTLOUT0_P P24 HT_RXCTLP HT_TXCTLP N23 HT_CTLIN0_P (3) B
(3) HT_CTLOUT0_N P25 HT_RXCTLN HT_TXCTLN P23 HT_CTLIN0_N (3)
R89 49.9/F HT_RXCALP A24 C25 HT_TXCALP R91 100/F
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
VDDHT_PKG C24 HT_RXCALN HT_TXCALN D24
R90 49.9/F

RS485M A12 HT

A A
QUANTA
Title
COMPUTER
RS485-HT LINK0 I/F

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 9 of 47


5 4 3 2 1
5 4 3 2 1

+DC_IN +DC_IN +3.3V_LAN +PWR_SRC +PWR_SRC +5V_SUS +PWR_SRC +3.3V_RUN +1.8V_RUN

D D
C132 C133 C134 C135 C136 C137 C138 C139 C140

*.1U_25V_NC *.1U_25V_NC *.1U_25V_NC *.1U_25V_NC *.1U_25V_NC *.1U_10V_NC *.1U_25V_NC *.1U_10V_NC *.1U_10V_NC

+PWR_SRC +3.3V_LAN +PWR_SRC +1.2V_VCCP +1.8V_RUN +3.3V_RUN +3.3V_RUN +1.8V_RUN +1.2V_VCCP


U6B

VLDT_RUN VLDT_RUN +PWR_SRC +1.8V_SUS +1.8V_SUS +5V_RUN +5V_RUN +1.8V_SUS G5 GFX_RX0P 3$572) GFX_TX0P J1
G4 GFX_RX0N GFX_TX0N H2
J8 GFX_RX1P GFX_TX1P K2
J7 GFX_RX1N GFX_TX1N K1
C141 C142 C143 C144 C145 C146 C147 C148 J4 K3
GFX_RX2P GFX_TX2P
J5 GFX_RX2N GFX_TX2N L3
*.1U_10V_NC *.1U_10V_NC *.1U_25V_NC *.1U_10V_NC *.1U_25V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC L8 L1
GFX_RX3P GFX_TX3P
L7 GFX_RX3N GFX_TX3N L2
L4 GFX_RX4P GFX_TX4P N2
L5 GFX_RX4N GFX_TX4N N1
+1.2V_VCCP +VCC_CORE +VCC_CORE +VCC_CORE +PWR_SRC +3.3V_RUN GND +0.9V_DDR_VTT M8 P2
GFX_RX5P GFX_TX5P
M7 GFX_RX5N GFX_TX5N P1
M4 GFX_RX6P GFX_TX6P P3
+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS M5 R3
GFX_RX6N GFX_TX6N
P8 GFX_RX7P GFX_TX7P R1
P7 GFX_RX7N GFX_TX7N R2
P4 GFX_RX8P GFX_TX8P T2
C392 C393 C394 C395 C396 C397 C398 P5 U1

3&,(,)*);
GFX_RX8N GFX_TX8N
R4 GFX_RX9P GFX_TX9P V2
*.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC R5 V1
C GFX_RX9N GFX_TX9N C
R7 GFX_RX10P GFX_TX10P V3
R8 GFX_RX10N GFX_TX10N W3
U4 GFX_RX11P GFX_TX11P W1
+0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT U5 W2
GFX_RX11N GFX_TX11N
W4 GFX_RX12P GFX_TX12P Y2
W5 GFX_RX12N GFX_TX12N AA1
+1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS Y4 AA2
GFX_RX13P GFX_TX13P
Y5 GFX_RX13N GFX_TX13N AB2
V9 GFX_RX14P GFX_TX14P AB1
W9 GFX_RX14N GFX_TX14N AC1
C399 C400 C420 C421 C422 C426 C427 AB7 AE3 3ODFHWKHVHFDSV
GFX_RX15P GFX_TX15P
AB6 GFX_RX15N GFX_TX15N AE4 FORVHWRFRQQHFWRU
*.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC *.1U_10V_NC delete PCIE signal , original
LAN & Mini Card of ED5 W11 GPP_RX0P GPP_TX0P AD8
W12 GPP_RX0N GPP_TX0N AE8
+0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT AA11 AD7 GPP_TX1P_C C151 .1U_10V
(25) PCIE_RXP1 GPP_RX1P GPP_TX1P PCIE_TXP1 (25)
AB11 AE7 GPP_TX1N_C C152 .1U_10V
(25) PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 (25)
3&,(,)*33 GPP_TX2P_C C153 .1U_10V
(24) MINI_PCIE_RXP2 Y7 GPP_RX2P GPP_TX2P AD4 MINI_PCIE_TXP2 (24)
AA7 AE5 GPP_TX2N_C C154 .1U_10V
(24) MINI_PCIE_RXN2 GPP_RX2N GPP_TX2N MINI_PCIE_TXN2 (24)
reserve more 14 Cap. between +0.9V_DDR_VTT & +1.8V_SUS
AB9 GPP_RX3P GPP_TX3P AD5
AA9 GPP_RX3N GPP_TX3N AD6

W14 AE9 A_TX0P_C C157 .1U_10V


(14) A_RX0P SB_RX0P SB_TX0P A_TX0P (14)
W15 3&,(,)6% AD10 A_TX0N_C C158 .1U_10V
(14) A_RX0N SB_RX0N SB_TX0N A_TX0N (14)
AB12 AC8 A_TX1P_C C159 .1U_10V
(14) A_RX1P SB_RX1P SB_TX1P A_TX1P (14)
AA12 AD9 A_TX1N_C C160 .1U_10V
B (14) A_RX1N SB_RX1N SB_TX1N A_TX1N (14) B
R93 10K AA14 AD11 R95 150/F VDDA12_PKG2
R92 8.25K/F_0603 AB14 PCE_ISET(PCE_CALI) PCE_PCAL(PCE_CALRP) R94 100/F
PCE_TXISET(NC) PCE_NCAL(PCE_CALRN) AE11

RS485M A12 HT
5 .2KP)2556 5 2KP)2556
.2KP)2556 2KP)2556
5 .2KP)2556 5 :DUGXSGDWHWR2KP)2556
'1,)2556 .2KP)2556

A A

QUANTA
Title
COMPUTER
RS485-PCIE LINK I/F

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 10 of 47


5 4 3 2 1
5 4 3 2 1

+1.8V_RUN L4 HTPVDD +1.8V_RUN L5 AVDDQ +3.3V_RUN L6 AVDD_NB +1.8V_RUN AVDD1


R96 0_0603

2
BK1608HS600 BK1608HS600 BK1608HS600 C165

2
C162 C166 C167
C161 C163 C164 4.7U_6.3V .1U_10V 2.2U_10V

1
10U_10V 4.7U_6.3V 10U_10V 2.2U_10V

1
D +1.8V_RUN L7 PLLVDD D

BK1608HS600
C168 C169 U6C
10U_10V deleted caused by AVDD_NB
4.7U_6.3V Svideo defeature B22 B14 TXLOUT0+ (18)
AVDD1 TXOUT_L0P
C22 AVDD2 3$572) TXOUT_L0N B15 TXLOUT0- (18)
G17 AVSSN1 TXOUT_L1P B13 TXLOUT1+ (18)
AVDD1 H17 A13
AVSSN2 TXOUT_L1N TXLOUT1- (18)
A20 AVDDDI TXOUT_L2P H14 TXLOUT2+ (18)
AVDDQ B20 G14
AVSSDI TXOUT_L2N TXLOUT2- (18)
added as FM1 application for ED5 TXOUT_L3P D17 T47
A21 AVDDQ TXOUT_L3N E17 T48 ED5 is single ch , change
A22 AVSSQ to dual ch as FM1
TXOUT_U0P A15 TXUOUT0+ (18)

&5779287
+3.3V_RUN close to NB C171 T139 C21 B16
C_R TXOUT_U0N TXUOUT0- (18)
.1U_10V T140 C20 C17 TXUOUT1+ (18)
T141 Y_G TXOUT_U1P
D19 COMP_B TXOUT_U1N C18 TXUOUT1- (18)
+3.3V_RUN B17 TXUOUT2+ (18)
TXOUT_U2P
1
3

(19) VGA_RED E19 RED TXOUT_U2N A17 TXUOUT2- (18)


(19) VGA_GRN F19 GREEN TXOUT_U3P A18 T49
RP15 G19 B18
(19) VGA_BLU BLUE TXOUT_U3N T46
4P2R-2.2K C6
(19) VSYNC DACVSYNC
2

Q7 A5 E15 56/9''5$ 9


(19) HSYNC DACHSYNC TXCLK_LP TXLCLKOUT+ (18)
2N7002W-7-F R104 R105 R106 D15 TXLCLKOUT- (18)
2
4

DDCDAT R107 715/F TXCLK_LN +1.8V_RUN


1 3 DAT_DDC2 (19)
150/F 150/F 150/F
B21 RSET TXCLK_UP H15
G15
TXUCLKOUT+ (18) CHECK
L8 BK1608HS600
TXCLK_UN TXUCLKOUT- (18)
+3.3V_RUN DDCCLK R108 0 B6 DACSCL TO

/9'6
DDCDAT R101 0 A6 D14 C170
C DACSDA LPVDD
LPVSS E14 C172 220OHM +1.8V_RUN C
2

Q8 PLLVDD A10 .1U_10V4.7U_6.3V L9


2N7002W-7-F PLLVDD(PLLVDD18) L10
external trace become B10 PLLVSS LVDDR18D_1 A12

BK1608HS600
DDCCLK 1 3 B12
CLK_DDC2 (19) to internal trace B24
LVDDR18D_2
C12 BK1608HS600
HTPVDD

3//3:5
HTPVDD LVDDR18A_1
B25 HTPVSS LVDDR18A_2 C13

R109 0 NB_RST# C10 A16


(14,23,24,25,33) ALINK_RST# SYSRESET# LVSSR1
(27) NB_PWRGD C11 POWERGOOD LVSSR3 A14

30
+1.8V_RUN +3.3V_RUN R102 0 LDT_STOP#_NB C5 D12 C173 C174
LDTSTOP# LVSSR5 C175
(14) ALLOW_LDTSTOP B5 ALLOW_LDTSTOP LVSSR6 C19
C15 .1U_10V 4.7U_6.3V .1U_10V C176
R112 10K LVSSR7
C23 HTTSTCLK LVSSR8 C16
R110 R111 B23 4.7U_6.3V
(13) HTREFCLK HTREFCLK
10K 10K TV_SWITCH C2 F14
R124 10K TVCLKIN LVSSR12
LVSSR13 F15
LDT_STOP#_NB

&/2&.V
(13) NB_OSC B11 OSCIN
2

T50 PLLVDD12 A11 OSCOUT(PLLVDD12)

(5,14) LDT_STOP# 1 3 (13) NBSRC_CLKP F2 GFX_CLKP


E1 E12 LCD_PON R114 0 LCD_POWER_ON (18)
Q9 (13) NBSRC_CLKN GFX_CLKN LVDS_DIGON LVDS_BLON
LVDS_BLON G12
MMBT3904 G1 F12 LVDS_BLEN
(13) SBLINK_CLKP SB_CLKP LVDS_BLEN T146
(13) SBLINK_CLKN G2 SB_CLKN
/2$'B520/2$'520675$3(1$%/( DVO_D0(GPP_TX4P) AD14 T51
R115 *2.7K_NC DFT_GPIO0 D6 AD15
DFT_GPIO0 DVO_D1(GPP_TX4N) T52
R116 *3K_NC LOAD_ROM# D7 AE15
DFT_GPIO1 DVO_D2(NC) T54
High, LOAD ROM STRAP DISABLE R118 *2.7K_NC DFT_GPIO2 C8 AD16
DFT_GPIO2 DVO_D3(GPP_RX4P) T53
by default R120 *2.7K_NC DFT_GPIO3 C7 AE16
B DFT_GPIO3 DVO_D4(GPP_RX4N) T55 B
Low, LOAD ROM STRAP ENABLE R119 *2.7K_NC DFT_GPIO4 B8 AC17
DFT_GPIO4 DVO_D5(NC) T57
R121 *2.7K_NC DFT_GPIO5 A8 AD18
DFT_GPIO5 DVO_D6(NC) T56

'92
D1 RB751 AE19

0,6
DVO_D7(GPP_TX5N) T58
(14) BMREQ# 2 1 B2 BMREQb DVO_D8(GPP_TX5P) AD19 T59
(18) PHL_CLK A2 I2C_CLK DVO_D9(GPP_RX5N) AE20 T60
(18) PHL_DATA B4 I2C_DATA DVO_D10(GPP_RX5P) AD20 T64
R583 *0_NC AA15 AE21
(16) SB_NB_THRMDA THERMALDIODE_P DVO_D11(NC) T63
R584 *0_NC AB15
(16) SB_NB_THRMDC THERMALDIODE_N
DVO_VSYNC(NC) AD13 T67
0428 : reserve for NB thermal Diode T65 C14 TMDS_HPD DVO_DE(NC) AC13 T66
T68 B3 DDC_DATA DVO_HSYNC(NC) AE13 T69
C3 TESTMODE DVO_IDCKP(NC) AE17 T71
+3.3V_RUN STRP_DATA A3 AD17 R125 2K/F
STRP_DATA DVO_IDCKN(NC) T70
R123 2K/F LCD_PON
R127 2K/F
RS485M A12 HT LVDS_BLON
R128 2K/F
reserve 0 ohm to LVDS_BLEN
R126 connect "LVDS_BLON"
4.7K/F
R129 *0_NC to LCD conn directly
2 1

56 56 +3.3V_RUN +3.3V_RUN

26&287 $ 26&287 3//9'' U40

5
LVDS_BLON 1 NC7SZ08P5X_NL

5
'92B' $' '92B' *33B7;3 4 1 R130 0
(27) FPBACK_EN 2 4 BLON (18)
A NB_PWRGD A
'92B' $' '92B' *33B7;1 2

3
2

3
'92B' $' '92B' *33B5;3 R591 U7
100K NC7SZ08P5X_NL
'92B' $( '92B' *33B5;1
0504 : change "FPBACK_EN" from
QUANTA
1
'92B' $(
'92B' $'
'92B'
'92B'
*33B7;1
*33B7;3
connected with "LVDS_BLEN"
directly to connected with Title
COMPUTER
"LVDS_BLON" by a AND gate RS485-LVDS
'92B' $( '92B' *33B5;1
Size Document Number Rev
'92B' $' '92B' *33B5;3 FX2 1A

Date: Friday, May 05, 2006 Sheet 11 of 47


5 4 3 2 1
5 4 3 2 1

AC10
AE10

AC4

AC2

AD1
AC5
AC6
AC7
AD3
AC9
AE6

AA3
V12
V11
V14

V15

Y15

Y11

Y12
Y14
W6
M3

M2
M6
G3

G6
H1

H3

N3

R6
U2

U3
U6

R9
A1

P6

P9

Y1

Y3
Y9
F3

F1

T1

T3
L6
J2

J6

J3
U6E

VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
RS485M A12 HT
D D

3$52)
*5281'

VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
SUGGEST REMOVE L11 BEAD SAME AS CPU
1.2 PLAN FSB UNDER THIS PLAN

A25
F11
D23
E9
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14
B7
L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14
H12
AC22
R23
C4
AE22
T23
T25
AE14
R17
H23
M17
A23
AC15
F17
D4
AC16
M13
+1.2V_VCCP
VLDT_RUN
80 ohm(4A)
80 ohm(4A)
L11
FBJ3216HS800

VDDA12

C177 C178 U6D


C179 C180 C181 C182 C183
10U_10V 10U_10V 1U_10V 1U_10V 1U_10V 1U_10V 1U_10V
AE24 VDD_HT1 3$572) VDDA12_1 D1
AD24 VDD_HT2 VDDA12_2 G7
C AD22 E2 C193 C194 C185 C
VDD_HT3 VDDA12_3 C191 C184 C192 100U_6.3V_3528
AB17 VDD_HT4 VDDA12_4 C1
D4 D2 D3 AE23 E3 1U_10V 1U_10V 1U_10V 10U_10V_0805 10U_10V_0805
VDD_HT5 VDDA12_5
+3.3V_RUN 2 1 2 1 2 1 Y17 VDD_HT6 VDDA12_6 D2
W17 VDD_HT7 VDDA12_7 M9
SW1010C SW1010C SW1010C AC18 F4

32:(5
VDD_HT8 VDDA12_8
AD21 VDD_HT9 VDDA12_9 B1
+1.8V_RUN VDD18 AC19 D3
L13 TI201209G121 VDD_HT10 VDDA12_10 VCC_NB
AC20 VDD_HT11 VDDA12_11 L9
AB19 E6 +1.2V_VCCP
VDD_HT12 VDDA12_12
2

JP1
AD23 VDD_HT13
C195 C196 AA17 L11 1 2
2.2U_10V 2.2U_10V VDD_HT14 VDDC_1
AE25 L13
1

VDD_HT15 VDDC_2 C186 C197 SHORT PAD


VDDC_3 L15
J14 M12 C198 C199 C187 C200 C188
VDD18_1 VDDC_4 10U_10V_080510U_10V_0805 1U_10V 1U_10V 1U_10V 1U_10V 100U_6.3V_3528
569''$ 9 J15 VDD18_2 VDDC_5 R15
+1.8V_RUN VDDA18 M14
L12 BLM18PG330SN1D VDDC_6
AE2 VDDA18_1(VDDA12_13) VDDC_7 N11
AB3 VDDA18_2(VDDA12_14) VDDC_8 N13
33 ohm (3000mA) C189 C201 U7 N15
C202 C190 C203 C204 C205 VDDA18_3(VDDA12_15) VDDC_9
W7 VDDA18_4(VDDA12_16) VDDC_10 J11
10U_10V_0805 10U_10V_0805 1U_10V 1U_10V 1U_10V 1U_10V 1U_10V AB4 H11 C206 C207 C208
VDDA18_5(VDDA12_17) VDDC_11 1U_10V 1U_10V 1U_10V
AC3 VDDA18_6(VDDA12_18) VDDC_12 P12
AD2 VDDA18_7(VDDA12_19) VDDC_13 P14
AE1 VDDA18_8(VDDA12_20) VDDC_14 R11
VDDR3 R13
L14 TI201209G121 VDDC_15
+3.3V_RUN E11 VDDR3_1 VDDC_16 A19
D11 VDDR3_2 VDDC_17 B19
C209 U11
VDDC_18
AC12 U14
B 4.7U_6.3V_6 AD12
VDD_DVO1(VDDR_1)
VDD_DVO2(VDDR_2)
VDDC_19
VDDC_20 P17 NB RS485 POWER STATES B
AE12 VDD_DVO3(VDDR_3) VDDC_21 L17 Power Signal S0 S1 S3 S4/S5 G3
VDDC_22 J19
VDDDVO E7 D20 VDDHT ON ON OFF OFF OFF
+1.8V_RUN VDDA12_13(VDDPLL_1) VDDC_23
F7 VDDA12_14(VDDPLL_2) VDDC_24 G20
L15 TI201209G121 F9 A9 VDDR ON ON OFF OFF OFF
VSSA49(VSSPLL_1) VDDC_25
G9 VSSA50(VSSPLL_2) VDDC_26 B9
VDDC_27 C9 VDD18 ON ON OFF OFF OFF
C210 C211 C212 VDDHT_PKG D22 D9
1U_10V 1U_10V 1U_10V VDDHT_PKG VDDC_28
VDDA12_PKG1 M1 VDDA12_PKG1 VDDC_29 A7 VDDC ON ON OFF OFF OFF
VDDA12_PKG2 AC11 VDDA12_PKG2 VDDC_30 A4
VDDC_31 U12 VDDA18 ON ON OFF OFF OFF
VDDC_32 U15
VDDA12 ON ON OFF OFF OFF
VDDA12 VDDPLL RS485M A12 HT
AVDD ON ON OFF OFF OFF
R131 0 VDDA12_PKG1
AVDDDI ON ON OFF OFF OFF
C213
562KP5(6,6725 C214 C215 PLLVDD ON ON OFF OFF OFF
4.7U_6.3V_0603 1U_10V
10U_10V_0805 HTPVDD ON ON OFF OFF OFF
VDDR3 ON ON OFF OFF OFF
LPVDD ON ON OFF OFF OFF
LVDDR18D ON ON OFF OFF OFF
LVDDR18A ON ON OFF OFF OFF
A A

QUANTA
Title
COMPUTER
RS485-POWER

Size Document Number Rev


FX2 1A

Date: Thursday, May 04, 2006 Sheet 12 of 47


5 4 3 2 1
5 4 3 2 1

+3.3V_RUN CLK_VDD +3.3V_RUN


L16 BK1608HS600 L17 BK1608HS600
CLK_VDDA

33 ohm/500 mA
C216 C217 C218 C219 C220 C221 C222 C223 C224 C225 C226
22U_10V_0805 .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V 22U_10V_0805

D D

1- PLACE ALL SERIAL TERMINATION +3.3V_RUN


L18 BK1608HS600 CLK_VDD
RESISTORS CLOSE TO U800
CLK_VDD_USB U8
2- PUT DECOUPLING CAPS CLOSE TO
Clock Gen.POWER PIN 33 ohm/500 mA 54 50 CLK_VDDA
C227 C228 VDDCPU VDDA R132 261/F
14 VDD_SRC1 GNDA 49
1U_10V .1U_10V 23 VDD_SRC2 CPUCLK_EXT_R R133 47/F
28 VDD_SRC3 CPUCLK8T0 56 CPUCLK (5)
44 55 CPUCLK#_EXT_R R134 47/F
VDD_SRC4 CPUCLK8C0 CPUCLK# (5)
+3.3V_RUN 5 52
L19 BK1608HS600 VDD_48 CPUCLK8T1
39 VDD_ATIG CPUCLK8C1 51
CLK_VDD_REF 2 VDD_REF SBLINK_CLKP_R R135 33/F
60 VDDHTT SRCCLKT6 16 SBLINK_CLKP (11)
33 ohm/500 mA 17 SBLINK_CLKN_R R137 33/F
SRCCLKC6 SBLINK_CLKN (11)
C229 C230 53 41 NBSRC_CLKP_R R136 33/F
GND_CPU ATIGCLKT0 NBSRC_CLKP (11)
1U_10V .1U_10V 15 40 NBSRC_CLKN_R R138 33/F
GND_SRC1 ATIGCLKC0 NBSRC_CLKN (11)
22 GND_SRC2 ATIGCLKT1 37 T144
29 GND_SRC3 ATIGCLKC1 36 T145
Parallel Resonance Crystal 45
8
GND_SRC4 ATIGCLKT2 35
34
C231 33P GND_48 ATIGCLKC2
38 GND_ATIG ATIGCLKT3 30
1 GND_REF ATIGCLKC3 31

2
CLK_VDD 58 18 SBSRC_CLKP_R R141 33/F
GNDHTT SRCCLKT5 SBSRCCLK (14)
R140 19 SBSRC_CLKN_R R142 33/F
SRCCLKC5 SBSRCCLK# (14)
*1M_NC CLK_XIN 3 20
R139 C232 33P XIN SRCCLKT4
21 become to no used as

1
C CLK_XOUT_R R144 0 CLK_XOUT SRCCLKC4 C
4 XOUT SRCCLKT3 24 FM1 application
10K Y1 25
14.31818MHZ SRCCLKC3 GPP_CLK2P_R R147 33/F
SRCCLKT2 26 CLK_PCIE_NEW (25)
27 GPP_CLK2N_R R149 33/F
SRCCLKC2 CLK_PCIE_NEW# (25)
1 2 11 47 GPP_CLK3P_R R151 33/F
(27) CLK_RESET_IN# RESET_IN# SRCCLKT0 CLK_PCIE_MINI_A (24)
R585 0 61 46 GPP_CLK3N_R R150 33/F
NC SRCCLKC0 CLK_PCIE_MINI_A# (24)
43 R152 2.2K
+3.3V_RUN SRCCLKT1 CLK_VDD
0428 : add "CLK_RESET_IN#" connected to SRCCLKC1 42

R158

R159

R160

R161

R166

R167

R168

R169

R170

R171
EC GPIO for CLK enable as ATI suggestion 12 R155 2.2K
SRCCLKT7
SRCCLKC7 13

SMBCK 9 57
(7) SMBCK SMBCLK CLKREQA# T72
R153 SMBDT 10 32 R157 0
(7) SMBDT SMBDAT CLKREQB# NEW_CLKREQ# (25)

49.9/F

49.9/F

49.9/F

49.9/F

49.9/F

49.9/F

49.9/F

49.9/F

49.9/F

49.9/F
Q10 *10K_NC R154 33 R156 0
CLKREQC# MINI_CLKREQ3# (24)
2

*2N7002E-LF_NC *10K_NC
48 IREF 48MHz_1 7 on ED5 for PCMCIA , for FM1 no used
3 1 SMBDT ,RK  ,UHI 6 CLK_48M_2_R
(15,24,25) PDAT_SMB 48MHz_0
P$ R173
R172 0 9RK 9#RKP 475/F 63 R174 33/F
FS1/REF1 USBCLK (15)
FS0/REF0 64
+3.3V_RUN 62 CLK_VDD
FS2/REF2
HTTCLK0 59
Q11
2

*2N7002E-LF_NC R176 R177 R178


ICS951462 2.2K 2.2K 2.2K
3 1 SMBCK
(15,24,25) PCLK_SMB
R179 0 R181 8.2K R184 *0_NC
R180 8.2K R183 *0_NC
B R182 8.2K R185 *0_NC B
(;7&/.)5(48(1&<6(/(&77$%/( 0+=
SB_OSCIN_R R186 33/F
SB_OSCIN (15)
)6 )6 )6 &38 65&&/. +77 3&, 86% &200(17 CLKREQA# CONTROL SRC5,6,7
>@ NB_OSCIN_R R187 33/F
CLKREQB# CONTROL SRC2,3,4, ATIG3 NB_OSC (11)
CLKREQC# CONTROL SRC0,1,ATIG0/1/2 HTREFCLK_R R188 33/F
HTREFCLK (11)
0 0 0 +L=  +L= +L=  5HVHUYHG
0 0 1 ;  ; ;  5HVHUYHG
R189
0 1 0      5HVHUYHG
49.9/F
0 1 1      5HVHUYHG
1 0 0      5HVHUYHG
1 0 1      5HVHUYHG
1 1 1      1RUPDO$7+/21RSHUDWLRQ
Check AMD clock

A A

QUANTA
Title
COMPUTER
CLOCK GENERATOR

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 13 of 47


5 4 3 2 1
5 4 3 2 1

+3.3V_SUS

U9 C233 .1U_10V R190 8.2K

5
NC7SZ08P5X_NL 1 EC_PWRGD U10A Reserved For EMI
(11,23,24,25,33) ALINK_RST# 4
2
16mA AG10
6%6%[PP U2 PCI_MINI R191 22 PCLK_MINI PCLK_MINI C248 *33P_NC
A_RST# PCICLK0 PCLK_MINI (17,42)
Part 1 of 4 T2 PCI_591 R201 22 PCLK_591 PCLK_591 C234 *33P_NC
PCLK_591 (17,27)

3
PCICLK1 PCI_PCM R192 22 PCLK_PCM PCLK_PCM C235 *33P_NC
(13) SBSRCCLK J24 PCIE_RCLKP PCICLK2 U1 PCLK_PCM (20)
(13) SBSRCCLK# J25 PCIE_RCLKN PCICLK3 V2 T143
W3 PCI_CLK4 R195 22 PCICLK4 PCICLK4 C236 *33P_NC
PCICLK4 PCICLK4 (17)
R194 *0_NC C250 .1U_10V A_RX0P_C P29 U3 PCI_LAN R196 22 PCLK_LAN PCLK_LAN C238 *33P_NC

PCI CLKS
(10) A_RX0P PCIE_TX0P PCICLK5 PCLK_LAN (33)
C237 .1U_10V A_RX0N_C P28 V1 PCI_CLK6 R202 22 PCICLK6 PCICLK6 C252 *33P_NC
(10) A_RX0N PCIE_TX0N PCICLK6 PCICLK6 (17)
6%&$/,%5$7,215(6,6,7259$/8( C251 .1U_10V A_RX1P_C M29 T1 T142
D (10) A_RX1P PCIE_TX1P SPDIF_OUT/PCICLK7/GPIO41 D
C253 .1U_10V A_RX1N_C M28
(10) A_RX1N PCIE_TX1N
SB600 SB460 K29 AJ9 PCIRST#_C
BALL T73 PCIE_TX2P PCIRST#
T76 K28 PCIE_TX2N
562 OHM 1% 150 OHM 1% H29 AD[0..31]
CALRP T75 PCIE_TX3P AD0
AD[0..31] (17,20,33,42)
T74 H28 PCIE_TX3N AD0/ROMA18 W7
2.05K 1% 150 OHM 1% Y1 AD1
CALRN AD1/ROMA17 AD2 +3.3V_RUN C254
(10) A_TX0P T25 PCIE_RX0P AD2/ROMA16 W8
0 ohm 4.12K 1% T26 W5 AD3 .1U_10V
CALI (10) A_TX0N PCIE_RX0N AD3/ROMA15 AD4
(10) A_TX1P T22 PCIE_RX1P AD4/ROMA14 AA5
T23 Y3 AD5
(10) A_TX1N PCIE_RX1N AD5/ROMA13
M25 AA6 AD6 U11
T78 PCIE_RX2P AD6/ROMA12 (15,27,35) EC_PWRGD
M26 AC5 AD7 NC7SZ08P5X_NL
T77 PCIE_RX2N AD7/ROMA11

5
M22 AA7 AD8 PCIRST#_C 1
T79 PCIE_RX3P AD8/ROMA9
M23 AC3 AD9 4 PCIRST#
T80 PCIE_RX3N AD9/ROMA8 PCIRST# (20,33,42)
AC7 AD10 2
R203 562/F_0603 PCIE_CALRP AD10/ROMA7 AD11
E29 AJ7

3
PCIE_CALRN PCIE_CALRP AD11/ROMA6

3&,(;35(66,17(5)$&(
R204 2.05K/F_0603 E28 AD4 AD12 C255 R205 C239
PCIE_VDDR PCIE_CALRN AD12/ROMA5
AB11 AD13 *82P_NC 8.2K 82P
+1.2V_VCCP L20 R206 0 PCIE_CALI AD13/ROMA4 AD14
E27 PCIE_CALI AD14/ROMA3 AE6
SBK160808T-301Y-S AC9 AD15
PCIE_PVDD AD15/ROMA2 AD16
U29 PCIE_PVDD AD16/ROMD0 AA3
AJ4 AD17 R198 *0_NC
AD17/ROMD1
PCIE Power
C256 C240 C241 U28 AB1 AD18
PCIE_PVSS AD18/ROMD2 AD19 +3.3V_RUN
AD19/ROMD3 AH4
10U_10V_0805 1U_10V .1U_10V F27 AB2 AD20
PCIE_VDDR_1 AD20/ROMD4 AD21 PCI_LOCK# R199 *8.2K_NC
F28 PCIE_VDDR_2 AD21/ROMD5 AJ3
F29 AB3 AD22 INTE# R207 *8.2K_NC
PCIE_VDDR_3 AD22/ROMD6 AD23 INTF# R209 *8.2K_NC
G26 PCIE_VDDR_4 AD23/ROMD7 AH3
G27 AC1 AD24 INTG# R208 *8.2K_NC C257
PCIE_VDDR_5 AD24

3&,,17(5)$&(
G28 AH2 AD25 INTH# R200 *8.2K_NC *.1U_NC
C +1.2V_VCCP PCIE_VDDR_6 AD25 AD26 C
G29 PCIE_VDDR_7 AD26 AC2
PCIE_VDDR J27 AH1 AD27
L21 PCIE_VDDR_8 AD27 AD28
J29 PCIE_VDDR_9 AD28 AD2
L25 AG2 AD29
TI201209G121 PCIE_VDDR_10 AD29 AD30
L26 PCIE_VDDR_11 AD30 AD1
C242 C258 C243 C259 C244 C260 C245 C246 C261 C247 L29 AG1 AD31 +3.3V_RUN
PCIE_VDDR_12 AD31
N29 PCIE_VDDR_13 CBE0#/ROMA10 AB9 CBE0# (20,33,42)
22U_10V_0805 1U_10V 1U_10V 1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V .1U_10V AF9
CBE1#/ROMA1 CBE1# (20,33,42)
CBE2#/ROMWE# AJ5 CBE2# (20,33,42)
AG3 SERIRQ R210 *10K_NC
CBE3# CBE3# (20,33,42)
AA2 FRAME#
FRAME# FRAME# (20,33,42)
AH6 DEVSEL# RN1 *8.2KX4_NC
DEVSEL#/ROMA0 DEVSEL# (20,33,42)
AG5 IRDY# PERR# 2 1 C262
IRDY# IRDY# (20,33,42)
ATi Recommend AA1 TRDY# FRAME# 4 3 *.1U_NC
TRDY#/ROMOE# TRDY# (20,33,42)
AF7 PAR TRDY# 6 5
Vendor: NSK PAR/ROMA19 STOP#
PAR (20,33,42)
STOP#
Y2 STOP# (20,33,42) 8 7
Part Number: NXG 32.768KAE12FUD 16 PPM. STOP#
AG8 PERR#
PERR# PERR# (20,33,42)
32K_X1 AC11 SERR# RN2 *8.2KX4_NC
SERR# SERR# (20,33,42)
AJ8 REQ0# REQ4# 2 1
Y2 32.768KHZ REQ0# REQ1# DEVSEL#
REQ1# AE2 4 3
1 4 32K_X2 AG9 REQ2# REQ2# : Media Card REQ3# 6 5
REQ2# REQ2# (20) REQ3# : LAN
add +3.3V LDO circuit for VCCRTC 2 3 AH8 REQ3# REQ0# 8 7
REQ3#/GPIO70 REQ3# (33) REQ4# : Mini PCI
AH5 REQ4#
57& +3.3V_RTC_LDO
R533
10K
+PWR_SRC R211
20M
R212 20M
REQ4#/GPIO71
GNT0#
GNT1#
AD11
AF2
GNT0#
GNT1#
GNT2#
REQ4# (42)

GNT2# : Media Card


IRDY#
REQ1#
RN3
2
*8.2KX4_NC
1
GNT2# AH7 GNT2# (20) 4 3
2 1 C263 C264 AB12 GNT3# GNT3# : LAN REQ2# 6 5
GNT3#/GPIO72 GNT3# (33) GNT4# : Mini PCI
U37 18P 18P AG4 GNT4# SERR# 8 7
GNT4#/GPIO73 GNT4# (42)
5 1 AG7 CLKRUN#
OUT IN CLKRUN# CLKRUN# (20,27,33,42)
4 AF6 PCI_LOCK# RN4 *8.2KX4_NC
FB LOCK#
1

B GNT1# 2 1 B
1

C650 2 3 ATI recommand have internal pull-up AD3 INTE# INTE# : Media Card GNT2# 4 3
GND EN CPU_PWR_SB INTE#/GPIO33 INTE# (20) INTF# : LAN
2.2U_6.3V_0603 C649 C651 AF1 INTF# GNT3# 6 5
INTF# (33)
2

MIC5235-3.3 1U_25V_0805 .1U_50V_0603 INTF#/GPIO34 INTG# INTG# : Mini PCI GNT0#


AF4 INTG# (42) 8 7
2

32K_X1 INTG#/GPIO35 INTH# INTH# : Mini PCI


D2 X1 INTH#/GPIO36 AF3 INTH# (42)
R214 C267
D38 RB751 FOR SB600, CONNECT TO CPU_PG/LDT_PG
FOR SB460, CONNECT TO
10K
32K_X2
;7$/ $GGIRUGHEXJ GNT4# R215 *8.2K_NC *.1U_NC
2 1 C1 X2
SSMUXSEL/GPIO0 AG24 LAD0 PAR R218 *8.2K_NC
LAD0 LAD0/FWH0 (27)
D5 *RB751_NC VCCRTC (5,15) CPU_PWRGD R217 0 AC26 AG25 LAD1
CPU_PG/LDT_PG LAD1 LAD1/FWH1 (27)
+3.3V_SRC 2 1 W26 AH24 LAD2 LAD3 R219 *100K/F_NC
T81 INTR/LINT0 LAD2 LAD2/FWH2 (27)
R213 W24 AH25 LAD3
T82 NMI/LINT1 LAD3 LAD3/FWH3 (27)

/3&
1K/F D6 RB751 W25 AF24 LFRAME#/FWH4 LAD2 R220 *100K/F_NC
T83 INIT# LFRAME# LFRAME#/FWH4 (27)
RTC_N02 2 1 AA24 AJ24 LDRQ#0
T84 SMI# LDRQ0#
(5,11) LDT_STOP# AA23 AH26 LDRQ#1 LAD1 R223 *100K/F_NC
SLP#/LDT_STP# LDRQ1#/GNT5#/GPIO68
2

(5) CPU_SIC AA22 W22 BMREQ#


IGNNE#/SIC BMREQ#/REQ5#/GPIO65 BMREQ# (11)
JP2 AA26 AF23 SERIRQ LAD0 R224 *100K/F_NC
(5) CPU_SID A20M#/SID SERIRQ SERIRQ (20,27,42)
C265 C266
&38

T86 Y27 FERR#


1U_10V .1U_10V *Clear PAD_NC (11) ALLOW_LDTSTOP AA25 D3 BMREQ# R228 10K
RTC_CLK (17)
1

STPCLK#/ALLOW_LDTSTP RTCCLK
T88 AH9 CPU_STP#/DPSLP_3V# RTC_IRQ#/GPIO69 F5 AUTO_ON# (17)
H_DPSLP# B24 RN5 *10KX4_NC
57&

R216 DPSLP_OD#/GPIO37 C268 CLKRUN#


T89 W23 DPRSLPVR VBAT E1 VCCRTC 2 1
100/F LDT_RST# AC25 D1 18P LDRQ#1 4 3
(5) LDT_RST# LDT_RST#/DPRSTP#/PROCHOT# RTC_GND
BT1 LDRQ#0 6 5
1 R570 0 C270 8 7
2 SB600 A13
C269 1U_10V
reserve R570 for EMI
.1U_10V SUYIN_060016MA002G200NL RTC-BATTERY verifing, place close to SB SB600
+3.3V_RUN
A A
change as FM1 BAT

R229
*10K_NC QUANTA
H_DPSLP#

0503 : pull down for SB600 , reserve H_DPSLP# should be put down , Title
COMPUTER
R229 connected to +3.3V_RUN R588 reserve R229 for verifing SB600M-PCIE/PCI/LPC
10K
Size Document Number Rev
FX2 1A

Date: Friday, May 05, 2006 Sheet 14 of 47


5 4 3 2 1
5 4 3 2 1

R230 *22_4_NC C271 *10P_4_NC R231 *22_4_NC C272 *10P_4_NC


SB_OSCIN USB power use S3 power,But
Over current signal datasheet
U10D
R232 0_6 is S5 only,But ATI FAE say use
6%6%[PP USBCLK (13)
S3 is ok

(20,24,33) PME# PME# A3 Part 4 of 4 A17 SB_48M_X1 R233 *0_6_NC


+3V_S5 RI# PCI_PME#/GEVENT4# USBCLK +3V_S5
PU/PD B2 RI#/EXTEVNT0#
SUSB# F7 A14 USB_RCOMP R249 11.8K/F_4
(27) SUSB# SLP_S3# USB_RCOMP
SUSC# A5
(27) SUSC# SLP_S5#
DNBSWON# E3 A11 ECN 2A
(27) DNBSWON# PWR_BTN# USB_ATEST1 T93
CPU_PROCHOT# R531 4.7K/F_4 CHANGE R414'S FOOTPRINT TO 0402 AZ_RST# R234 *10K_4_NC

$&3,:$.(83
(14,27,35) EC_PWRGD B5 PWR_GOOD USB_ATEST0 A10 T90
D SUS_STAT# B3 KBSMI# R235 *4.7K/F_4_NC D
R529 10K_4 SUS_STAT#
F9 TEST2 USB_HSDP9+ H12 T95
R250 10K_4 E9 G12 RP17 *10KX2_4_NC
TEST1 USB_HSDM9- T94
R236 10K_4 G9 USB_OCP2# 1 2 C273
GATEA20 TEST0 USB0: USB CNN SCI#
(27) GATEA20 AF26 GA20IN USB_HSDP8+ E12 T91 3 4 *.1U_4_NC

(9(176
86%,17(5)$&(
RCIN# AG26 D12 T92 USB1: Card reader
(27) RCIN# KBRST# USB_HSDM8-
SUS_STAT# R251 10K_4 SWI# D7 USB2: USB CNN
(27) SWI# LPC_PME#/GEVENT3#
EXTEVNT1# C25 E14 delete Bluetooth USB3:
SUSB# R252 *4.7K/F_4_NC GEVENT5# LPC_SMI#/EXTEVNT1# USB_HSDP7+ USB4: USB CNN +3V_S5
D9 S3_STATE/GEVENT5# USB_HSDM7- D14 for defeature
SUSC# R237 *4.7K/F_4_NC GPM7# F4 USB5: MINI CARD RP16 *10KX2_4_NC
DNBSWON# R238 *10K_4_NC PCIE_WAKE# SYS_RESET#/GPM7# USB_OCP9#
(24,25) PCIE_WAKE# E7 G14 USBP6+ (28) USB6: USB CNN 1 2
CPU_PROCHOT# WAKE#/GEVENT8# USB_HSDP6+ USB_OCP8#
(5) CPU_PROCHOT# C2 H14 USBP6- (28) USB7: 3 4
PME# R254 *4.7K/F_4_NC SB_THERMTRIP# BLINK/GPM6# USB_HSDM6-
G7 SMBALERT#/THRMTRIP#/GEVENT2#
SWI# R253 *10K_4_NC D16 USBP5+ (24) RN6 *10KX4_4_NC 0505 : change
USB_HSDP5+ USB_OCP3#
'HOD\PVDIWHU6SRZHU2. RSMRST# USB_HSDM5- E16 USBP5- (24)
USB_OCP7#
2 1 from +3.3V_SUS
(27) RSMRST# E2 4 3
C274 RSMRST# USB_OCP6# to +3V_S5
26&567 USB_HSDP4+ D18 USBP4+ (28) 86%SRZHU USB_OCP4#
6 5
*.1U_4_NC (13) SB_OSCIN B23 14M_OSC USB_HSDM4- E18 USBP4- (28) 8 7
RI# R239 *10K_4_NC
GPIO10 C28 G16 delete cause no AVDD_USB L22 +3V_S5
GPM7# R241 *10K_4_NC GPIO1 SATA_IS0#/GPIO10 USB_HSDP3+ TI201209G121
A26 ROM_CS#/GPIO1 USB_HSDM3- H16 TV Mini Card
GEVENT5# R243 *10K_4_NC GPIO6 B29
PCIE_WAKE# R242 *4.7K/F_4_NC BID1 GHI#/SATA_IS1#/GPIO6
A23 WD_PWRGD/GPIO7 USB_HSDP2+ G18 USBP2+ (28)
(23) RST_HDD# RST_HDD# B27 H18 USBP2- (28)
BID0 SMARTVOLT/SATA_IS2#/GPIO4 USB_HSDM2- C275 C279 C280 C276
D23 SHUTDOWN#/GPIO5
(31) PCSPK PCSPK B26 D19 USBP1+ (25) 1U/10V_4 1U/10V_4 1U/10V_4
PCLK_SMB SPKR/GPIO2 USB_HSDP1+
(13,24,25) PCLK_SMB C27 SCL0/GPOC0# USB_HSDM1- E19 USBP1- (25)
+3.3V_RUN PDAT_SMB B28 22U/10V_8

*3,2
C
(13,24,25) PDAT_SMB SDA0/GPOC1# C
R589 10K_4 C3 G19 USBP0+ (28)
SB_THERMTRIP# R245 *10K_4_NC R590 10K_4 SCL1/GPOC2# USB_HSDP0+
0503 : pull down F3 SDA1/GPOC3# USB_HSDM0- H19 USBP0- (28)
for SB600 BID3 D26
BID2 DDC1_SCL/GPIO9
C26 DDC1_SDA/GPIO8
EXTEVNT1# R256 *10K_4_NC R246 *0_4_NC GPIO0 A27 B9
(5,14) CPU_PWRGD SSMUXSEL/SATA_IS3#/GPIO0 AVDDTX_0 AVDD_USB
C277 SB_LLB# A4 B11
LLB#/GPIO66 AVDDTX_1
.1U_4 AVDDTX_2 B13
PCLK_SMB R247 2.2K_4 B16 C281 C278 C282
PDAT_SMB R257 2.2K_4 USB_OCP9# AVDDTX_3 .1U_4 .1U_4 .1U_4
For SB600 NC C6 USB_OC9#/SLP_S2/GPM9# AVDDTX_4 B18
USB_OCP8# C5 A9
SB_LLB# R248 *10K_4_NC USB_OCP7# USB_OC8#/AZ_DOCK_RST#/GPM8# AVDDRX_0
C4 USB_OC7#/GEVENT7# AVDDRX_1 B10
USB_OCP6# B4 B12
GPIO6 R532 10K_4 AZ_RST# R259 *0_4_NC USB_OC6#/GEVENT6# AVDDRX_2
B6 USB_OC5#/DDR3_RST#/GPM5# AVDDRX_3 B14
USB_OCP4# A6 B17 +3.3V_AVDDC L23
(28) USB_OCP4# USB_OC4#/GPM4# AVDDRX_4
USB_OCP3# SBK160808T-301Y-S

86%2&
(28) USB_OCP3# C8 USB_OC3#/GPM3#
RCIN# R261 *10K_4_NC USB_OCP2# C7 A12
T96 SCI# USB_OC2#/GPM2# AVDDC
(27) SCI# B8 USB_OC1#/GPM1#

2
GPIO10 R262 *10K_4_NC (27) KBSMI# KBSMI# A8 A13
USB_OC0#/GPM0# AVSSC C283 C284 C285
A16 2.2U/10V/X5R 1U/10V_4 .1U_4

1
AZ_BITCLK AVSS_USB_1
N2 AZ_BITCLK AVSS_USB_2 C9

$=$/,$
AZ_SDOUT M2 C10
AZ_SDOUT AVSS_USB_3
T97 K2 AZ_SDIN3/GPIO46 AVSS_USB_4 C11
AZ_SYNC L3 C12
AZ_RST# AZ_SYNC AVSS_USB_5
K3 C13

86%3:5
AZ_RST# AVSS_USB_6
AVSS_USB_7 C14
AC_BITCLK_R L1 C16
RST_HDD# R265 *10K_4_NC T99 AC_SDOUT AC_BITCLK/GPIO38 AVSS_USB_8
(17) AC_SDOUT L2 AC_SDOUT/GPIO39 AVSS_USB_9 C17
B GPIO1 R267 *10K_4_NC R282 (26) CD_SDIN0 CD_SDIN0 L4 C18 B
AZ_SDIN1 ACZ_SDIN0/GPIO42 AVSS_USB_10
(31) AZ_SDIN1 J2 ACZ_SDIN1/GPIO43 AVSS_USB_11 C19
GPIO0 R268 *10K_4_NC 10K_4 AC_SDIN2

$&
T101 J4 ACZ_SDIN2/GPIO44 AVSS_USB_12 C20
PCSPK R271 10K_4 AC_SYNC_R M3 D11 +3.3V_RUN
T100 AC_RST# AC_SYNC/GPIO40 AVSS_USB_13
T102 L5 AC_RST#/GPIO45 AVSS_USB_14 D21
E11 R276 *10K_0402_NC BID3 R277 10K_0402
R272 *10K_4_NC AVSS_USB_15
+3V_S5 AVSS_USB_16 E21
F11 R273 *10K_0402_NC BID2 R274 10K_0402
AVSS_USB_17
E23 NC1 AVSS_USB_18 F12
AC_SDIN2 R275 *10K_4_NC For SB600 A12 , depopulate R282 AC21 F14 R260 *10K_0402_NC BID1 R264 10K_0402
AZ_SDIN1 R278 *10K_4_NC NC2 AVSS_USB_19
For SB600 A13 , populatet R282 AD7 NC3 AVSS_USB_20 F16
CD_SDIN0 R280 *10K_4_NC AE7 F18 R258 *10K_0402_NC BID0 R263 10K_0402
AC_BITCLK_R R279 *10K_4_NC NC4 AVSS_USB_21
AA4 NC5 AVSS_USB_22 F19
T4 NC6 AVSS_USB_23 F21
AZ_SYNC R281 *10K_4_NC D4 G11
AZ_SDOUT R283 *10K_4_NC NC7 AVSS_USB_24 BID3 BID2 BID1 BID0 Board Revision
AB19 NC8 AVSS_USB_25 G21
AZ_BITCLK R285 *10K_4_NC H11 (GPIO9) (GPIO8) (GPIO7) (GPIO5)
AVSS_USB_26 0 0 0 0 SST
AVSS_USB_27 H21
For SB600 ball is NC J11 0 0 0 1
AVSS_USB_28 0 0 1 0
AVSS_USB_29 J12
J14 0 0 1 1
AVSS_USB_30 0 1 0 0
AVSS_USB_31 J16
J18 0 1 0 1
AVSS_USB_32 0 1 1 0
AVSS_USB_33 J19
R286 39_4 0 1 1 1
(26) CD_BITCLKA_MDC 1 0 0 0
C286
*22P_4_NC SB600 A13
A A
R287 39_4 AZ_BITCLK
(31) AZ_BITCLKA
C287
*22P_4_NC (26) CD_SDOUTA_MDC
R288 39_4
(26) CD_SYNC_MDC
R289 39_4
(26) CD_RESET#_MDC
R290 39_4 QUANTA
C288 *22P_4_NC C289 *22P_4_NC C290 *22P_4_NC
Title
COMPUTER
R291 39_4 AZ_SDOUT R292 39_4 AZ_SYNC R293 39_4 AZ_RST# SB600M ACPI/USB/AC97
(31) AZ_SDOUTA (31) AZ_SYNCA (31) AZ_RESET#
Size Document Number Rev
C291 *22P_4_NC C292 *22P_4_NC C293 *22P_4_NC FX2 1A

Date: Friday, May 05, 2006 Sheet 15 of 47


5 4 3 2 1
5 4 3 2 1

L24
U10B FBJ3216HS800 U10C
+3.3V_RUN VDDQ_3V
C295 .01U_4 SATA_TX0+_C AH21 80ohm/4A
(23) SATA_TXP0
C294 .01U_4 SATA_TX0-_C AJ21 SATA_TX0+ 6%6%[PP AB29 C296
A25
A28
VDDQ_16%6%[PPVSS_1 A1
A20
(23) SATA_TXN0 SATA_TX0- IDE_IORDY PHDRDY (23) VDDQ_2 VSS_2
Part 2 of 4 AA28 C297 C298 C299 C300 C301 C29 Part 3 of 4 A21
IDE_IRQ IRQ14 (23) VDDQ_3 VSS_3
(23) SATA_RXN0 AH20 AA29 100U/6.3V_3528 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 D24 A29
SATA_RX0- IDE_A0 PDA0 (23) VDDQ_4 VSS_4
(23) SATA_RXP0 AJ20 SATA_RX0+ IDE_A1 AB27 PDA1 (23) L9 VDDQ_5 VSS_5 B1
IDE_A2 Y28 PDA2 (23) L21 VDDQ_6 VSS_6 B7
T108 AH18 SATA_TX1+ IDE_DACK# AB28 PDDACK# (23) M5 VDDQ_7 VSS_7 B25
T107 AJ18 SATA_TX1- IDE_DRQ AC27 PDDREQ (23) P3 VDDQ_8 VSS_8 C21
D AC29 C302 C303 C304 C305 C332 C333 P9 C22 D
IDE_IOR# PDIOR# (23) VDDQ_9 VSS_9
AH17 AC28 1U/10V_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 T5 C24
T116 SATA_RX1- IDE_IOW# PDIOW# (23) VDDQ_10 VSS_10
T109 AJ17 SATA_RX1+ IDE_CS1# W28 PDCS1# (23) V9 VDDQ_11 VSS_11 D6
IDE_CS3# W27 PDCS3# (23) W2 VDDQ_12 VSS_12 E24

$7$
T111 AH13 SATA_TX2+ PDD[0..15] (23) W6 VDDQ_13 VSS_13 F2
AH14 AD28 PDD0 W21 F23
T105 SATA_TX2- IDE_D0/GPIO15 VDDQ_14 VSS_14
AD26 PDD1 C334 C306 C307 C308 C309 C310 W29 G1
IDE_D1/GPIO16 PDD2 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 VDDQ_15 VSS_15
T110 AH16 SATA_RX2- IDE_D2/GPIO17 AE29 AA12 VDDQ_16 VSS_16 J1

6(5,$/$7$
AJ16 AF27 PDD3 AA16 J8
T112 SATA_RX2+ IDE_D3/GPIO18 VDDQ_17 VSS_17
AG29 PDD4 AA19 L6
+5V_RUN +3.3V_RUN IDE_D4/GPIO19 PDD5 L25 VDDQ_18 VSS_18
T113 AJ11 SATA_TX3+ IDE_D5/GPIO20 AH28 AC4 VDDQ_19 VSS_19 L8
AH11 AJ28 PDD6 FBJ3216HS800 AC23 M9
T114 SATA_TX3- IDE_D6/GPIO21 VDDQ_20 VSS_20
AJ27 PDD7 +1.2V_VCCP VDD_1.2V AD27 M12
IDE_D7/GPIO22 PDD8 VDDQ_21 VSS_21
T115 AH12 SATA_RX3- IDE_D8/GPIO23 AH27 80ohm/4A AE1 VDDQ_22 VSS_22 M15
AJ13 AG27 PDD9 AE9 M18
T106 SATA_RX3+ IDE_D9/GPIO24 VDDQ_23 VSS_23
R294 R295 AG28 PDD10 C311 C312 C313 C314 C315 C316 AE23 N13
4.7K/F_4 4.7K/F_4 R296 1K/F_4 SATA_CAL IDE_D10/GPIO25 PDD11 22U/10V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 VDDQ_24 VSS_24
AF12 SATA_CAL IDE_D11/GPIO26 AF28 AH29 VDDQ_25 VSS_25 N17
AF29 PDD12 100U/6.3V_3528 AJ2 P1
SATA_X1 IDE_D12/GPIO27 PDD13 VDDQ_26 VSS_26
AD16 SATA_X1 IDE_D13/GPIO28 AE28 AJ6 VDDQ_27 VSS_27 P6
AD25 PDD14 AJ26 P21
IDE_D14/GPIO29 VDDQ_28 VSS_28
2

Q13 SATA_X2 AD18 AD29 PDD15 R12


MMBT3904 SATA_X2 IDE_D15/GPIO30 C317 C318 C319 C320 C335 C321 VSS_29
M13 VDD_1 VSS_30 R15
(30) SATA_LED# 3 1 AC12 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 M17 R18
SATA_ACT#/GPIO67 VDD_2 VSS_31
N12 VDD_3 VSS_32 T6
PLLVDD_ATA AD14 PLLVDD_SATA_1 N15 VDD_4 VSS_33 T9
AJ10 J3 N18 U13
SATA Power PLLVDD_SATA_2 SPI_DI/GPIO12
J6 R13
VDD_5 VSS_34
U17

63,520
SPI_DO/GPIO11 C322 C323 VDD_6 VSS_35
XTLVDD_ATA AC16 XTLVDD_SATA SPI_CLK/GPIO47 G3 R17 VDD_7 VSS_36 V3
G2 .1U_4 .1U_4 U12 V8
SPI_HOLD#/GPIO31 VDD_8 VSS_37
+1.2V_ATA AE14 AVDD_SATA_1 SPI_CS#/GPIO32 G6 U15 VDD_9 VSS_38 V12
C +3.3V_RUN XTLVDD_ATA AE16 U18 V15 C
SBK160808T-301Y-S AVDD_SATA_2 VDD_10 VSS_39
AE18 AVDD_SATA_3 LAN_RST#/GPIO13 C23 V13 VDD_11 VSS_40 V18
AE19 G5 L27 V17 V21
L26 AVDD_SATA_4 ROM_RST#/GPIO14 SB_S5_3V VDD_12 VSS_41
AF19 AVDD_SATA_5 +3V_S5 VSS_42 W1
AF21 AVDD_SATA_6 FANOUT0/GPIO3 M4 A2 S5_3.3V_1 VSS_43 W9
C324 C325 AG22 T3 SBK160808T-301Y-S A7 Y29

32:(5
22U/10V_8 1U/10V_4 AVDD_SATA_7 FANOUT1/GPIO48 C326 C327 C328 C329 C330 C331 S5_3.3V_2 VSS_44
AG23 AVDD_SATA_8 FANOUT2/GPIO49 V4 +3.3V_RUN F1 S5_3.3V_3 VSS_45 AA11
AH22 R568 10K_4 22U/10V_8 1U/10V_4 1U/10V_4 .1U_4 .1U_4 .1U_4 J5 AA14
AVDD_SATA_9 S5_3.3V_4 VSS_46
AH23 AVDD_SATA_10 FANIN0/GPIO50 N3 LCD_TST (18) J7 S5_3.3V_5 VSS_47 AA18
AJ12 AVDD_SATA_11 FANIN1/GPIO51 P2 LAMP_STAT# (18) K1 S5_3.3V_6 VSS_48 AC6
AJ14 W4 +1.2V_S5 L28 +1.2V_S5_R AC24
+1.2V_VCCP AVDD_SATA_12 FANIN2/GPIO52 HDDC_EN# (23) VSS_49
PLLVDD_ATA AJ19 SBK160808T-301Y-S G4 AD9
SBK160808T-301Y-S AVDD_SATA_13 C336 C646 C337 C338 C339 S5_1.2V_1 VSS_50
AJ22 AVDD_SATA_14 TEMP_COMM P5 H1 S5_1.2V_2 VSS_51 AD23
AJ23 P7 R586 *0_0402_NC .1U_4 .1U_4 .1U_4 H2 AE3
AVDD_SATA_15 TEMPIN0/GPIO61 SB_NB_THRMDA (11) S5_1.2V_3 VSS_52

1
L29 P8 C679 10U/10V/X5R_8 .1U_4 H3 AE27

6(5,$/$7$32:(5
TEMPIN1/GPIO62 *.01U/25V/0402_NC S5_1.2V_4 VSS_53
AB14 AVSS_SATA_1 TEMPIN2/GPIO63 T8 VSS_54 AG6
C340 C341 AB16 T7 A18 AJ1
SB_NB_THRMDC (11)

2
22U/10V_8 1U/10V_4 AVSS_SATA_2 TEMPIN3/TALERT#/GPIO64 R587 *0_0402_NC USB_PHY_1.2V_1 VSS_55
AB18 AVSS_SATA_3 +1.2VUSB_PHY A19 USB_PHY_1.2V_2 VSS_56 AJ25
AC14 AVSS_SATA_4 VIN0/GPIO53 V5 0428 : reserve for B19 USB_PHY_1.2V_3 VSS_57 AJ29
AC18 AVSS_SATA_5 VIN1/GPIO54 L7 +3.3V_RUN NB thermal Diode B20 USB_PHY_1.2V_4
AC19 M8 R569 10K_4 C345 .1U_4 B21
AVSS_SATA_6 VIN2/GPIO55 USB_PHY_1.2V_5

+:021,725
+1.2V_VCCP +1.2V_ATA AD12 V6 D27
TI201209G121_8 AVSS_SATA_7 VIN3/GPIO56 R297 0_4 CPU_PWR_SB PCIE_VSS_1
AD19 AVSS_SATA_8 VIN4/GPIO57 M6 +1.8V_RUN PCIE_VSS_2 D28
AD21 AVSS_SATA_9 VIN5/GPIO58 P4 CPU_PWR=1.8V WHEN SB600 AA27 CPU_PWR PCIE_VSS_3 D29
L30 AE12 M7 CPU_PWR=1.2V WHEN SB460 F26
AVSS_SATA_10 VIN6/GPIO59 R298 *0_4_NC V5_VREF PCIE_VSS_4
AE21 AVSS_SATA_11 VIN7/GPIO60 V7 +1.2V_VCCP AE11 V5_VREF PCIE_VSS_5 G23
C346 C347 C348 C349 C350 C351 C352 AF11 G24
22U/10V_8 1U/10V_4 1U/10V_4 .1U_4 .1U_4 .1U_4 .1U_4 AVSS_SATA_12 L61 L60 PCIE_VSS_6
AF14 AVSS_SATA_13 A24 AVDDCK_3.3V PCIE_VSS_7 G25
AF16 SBK160808T-301Y-S SBK160808T-301Y-S H27
AVSS_SATA_14 PCIE_VSS_8
AF18 AVSS_SATA_15 AVDD N1 +3.3V_RUN +1.2V_VCCP A22 AVDDCK_1.2V PCIE_VSS_9 J23

2
B AG11 C645 J26 B
AVSS_SATA_16 PCIE_VSS_10

2
AG12 M1 2.2U/10V/X5R B22 J28
AVSS_SATA_17 AVSS C675 AVSSCK PCIE_VSS_11
AG13 K27

1
R299 *0_6_NC AVSS_SATA_18 2.2U/10V/X5R AVDDCK_3.3V PCIE_VSS_12
XTLVDD_ATA AG14 V29 L22

1
AVSS_SATA_19 L31 PCIE_VSS_42 PCIE_VSS_13
AG16 AVSS_SATA_20 V28 PCIE_VSS_41 PCIE_VSS_14 L23
R300 *0_6_NC PLLVDD_ATA AG17 +3.3V_RUN V27 L24
AVSS_SATA_21 PCIE_VSS_40 PCIE_VSS_15
AG18 AVSS_SATA_22 V26 PCIE_VSS_39 PCIE_VSS_16 L27

2
R301 *0_6_NC +1.2V_ATA AG19 SBK160808T-301Y-S V25 L28
AVSS_SATA_23 C353 C354 C355 PCIE_VSS_38 PCIE_VSS_17
AG20 AVSS_SATA_24 V24 PCIE_VSS_37 PCIE_VSS_18 M21
AG21 2.2U/10V/X5R 1U/10V_4 .1U_4 V23 M24

1
AVSS_SATA_25 PCIE_VSS_36 PCIE_VSS_19
AH10 AVSS_SATA_26 V22 PCIE_VSS_35 PCIE_VSS_20 M27
populate L26,L29,L30; AH19 AVSS_SATA_27 U27 PCIE_VSS_34 PCIE_VSS_21 N27
depopulate R299,R300,R301 T29 PCIE_VSS_33 PCIE_VSS_22 N28
+5V_RUN R302 1K/F_4 T28 P22
V5_VREF PCIE_VSS_32 PCIE_VSS_23
T27 PCIE_VSS_31 PCIE_VSS_24 P23
SB600 A13 T24 P24
C356 C357 PCIE_VSS_30 PCIE_VSS_25
+3.3V_RUN 2 1 T21 PCIE_VSS_29 PCIE_VSS_26 P25
1U/10V_4 .1U_4 P27 P26
D7 SW1010C PCIE_VSS_28 PCIE_VSS_27
SATA clock Option
SB600 A13
For First build ,If next build no use remove from BOM.

+3.3V_RUN
C358 L33
*27P_4_NC R303 33/F_4 Y4 BLM11A121S_6
SATA_X1 R_3COM_25ML 3 4 VCC_Y6 0503 : add one more
OUT VCC +1.2V_S5 +1.2VUSB_PHY
Cap. for SB600
1

R305 49.9/F

1 2 C360 C361 L32


A Y3 R304 OE VSS .1U_4 .1U_4 A
C359 *10M_4_NC 25MHZ_OSC
*27P_4_NC *25MHZ_SATA_NC SBK160808T-301Y-S C362
2

SATA_X2 C342 C343 C344 C701


QUANTA
22U/10V_8
.1U_4 .1U_4 .1U_4 .1U_4

Modify Resistor Title


COMPUTER
SB600M HDD/POWER

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 16 of 47


5 4 3 2 1
5 4 3 2 1

SB600 has 15K internal PD for AC_SDOUT


+3.3V_RUN +3V_S5 +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN
15K internal PU for RTC_CLK +3V_S5
,External PU/PD is not required.
R306 R307 R308 R309 R310 R311
*10K_4_NC *10K_4_NC *10K_4_NC 10K_4 *10K_4_NC 10K_4 R312
*10K_4_NC
(15) AC_SDOUT
(14) AUTO_ON# delete SB460 setting
D (14) RTC_CLK D

(14) PCICLK4

(14) PCICLK6

(14,42) PCLK_MINI

(14,27) PCLK_591

R318 R319 R320 R321 R322 R323


*10K_4_NC *10K_4_NC 10K_4 *10K_4_NC 10K_4 *10K_4_NC

3&/.B0,1, 3&/.B

$&B6'287 57&B&/. 3&,B&/. 3&,B&/. 3&,B&/. 3&,B&/.


C
5(48,5(' 38//
+,*+
86(
'(%8*
,17(51$/
57&
86(,17
3//
&38,) .
++ 3&,520
C

675$36 675$36
'()$8/7 '()$8/7 '()$8/7
+/ 63,520

/+ /3&520 '()$8/7


38// ,*125( (;7(51$/ 86((;7 &38,) 3
/2: '(%8* 57& 0+=
// ):+520
675$36
'()$8/7

+3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN

R331 R332 R333 R334 R335 R336


*10K_4_NC *10K_4_NC *10K_4_NC *10K_4_NC *10K_4_NC *10K_4_NC

B B
(14,20,33,42) AD28
SB600 HAS 15K INTERNAL
(14,20,33,42) AD27
PU FOR PCI_AD[28:23]
(14,20,33,42) AD26

(14,20,33,42) AD25

(14,20,33,42) AD24

(14,20,33,42) AD23

R338 R339 R340 R341 R342 R343


*2.2K_4_NC *2.2K_4_NC *2.2K_4_NC *2.2K_4_NC *2.2K_4_NC *2.2K_4_NC

'(%8*
675$36 3'$&. 3&,B$' 3&,B$' 3&,B$' 3&,B$' 3&,B$' 3&,B$'
8VH ERRWIDLO
38// 86( /RQJ 86(3&, 86($&3, 86(,'( 86('()$8/7 WLPH
+,*+ /21* 5HVHW 3// %&/. 3// 3&,(675$36 GLVDEOHG
A 5(6(7 A

'()$8/7 '()$8/7 '()$8/7 '()$8/7 '()$8/7 '()$8/7 '()$8/7

8VH
QUANTA
38//
/2:
86(
6+257
6KRUW
5HVHW
%<3$66
3&,3//
%<3$66$&3,
%&/.
%<3$66,'(
3//
86(((3520
3&,(675$36
ERRWIDLO
WLPH Title
COMPUTER
5(6(7 HQDEOHG SB600M STRAPS

Size Document Number Rev


SB460 SB600 SB600 FX2 1A
Only Only Only
Date: Friday, May 05, 2006 Sheet 17 of 47
5 4 3 2 1
E D C B A

+15V_SUS change name as ED5 SB.


+3.3V_RUN +LCDVCC +5V_ALW
Q14 J1

2
FDC653N_NL 44 D8
44 TXUCLKOUT- (11)
R344 6 43 1
43 TXUCLKOUT+ (11)
100K_0402 5 4 42
42 MBCLK
2 41 41 TXUOUT2- (11) 3
1 40 TXUOUT2+ (11)

1
40

2
+3.3V_RUN +15V_SUS 1 2 39 2
C363 .1U/10V/0402 R346 39
38 TXUOUT1- (11)

3
470_0402 38 *DA204U_NC
37 37 TXUOUT1+ (11)

1
LCDVCC_ON 36 as Tom suggestion , connect
R345 R347 36
35 TXUOUT0- (11) to EC "MBCLK" & "MBDATA".

1
35

1
4 *47K_NC 100K_0402 +5V_ALW 4
34 34 TXUOUT0+ (11)

2
33 +LCDVCC
33

3
Q16 R348 C364 32 D9
TXLCLKOUT- (11)

2
100K_0402 .1U/10V/0402 32
2 31 TXLCLKOUT+ (11) 1

1
31

3
change name as ED5 SB. 30

2
30
3
2N7002W-7-F 2 Q17 29 3 MBDATA
TXLOUT2- (11)

1
29

1
2N7002W-7-F 28
28 TXLOUT2+ (11)
27 C365 C366 2

1
27 .1U/10V/0402 .1U/10V/0402
(11) LCD_POWER_ON 2 26 TXLOUT1- (11)

2
26 *DA204U_NC
25 25 TXLOUT1+ (11)
24 +3.3V_RUN
24
23 23 TXLOUT0- (11) LDOC_CLK/DATA change to PHL_CLK/DATA
22
Q15 22
21
TXLOUT0+ (11) that connected to ATI NB R349 2.2K_4 PHL_DATA
1

DTC124EUA 21 +3.3V_RUN
20 20 PHL_CLK (11)
19 19 PHL_DATA (11)
18 R350 2.2K_4 PHL_CLK
18

1
17 17 +3.3V_RUN
16 C367
16 .1U/10V/0402
15

2
15 +LCDVCC
14 14
13 +G_PWR_SRC $GUHVV$+&RQWUDVW
13 LCD_TST (16)
+3.3V_ALW 12
12
11
$$+%DFNOLJKW
11 +G_PWR_SRC
10 10
9 9 change name as ED5

1
8 8 BLON (11)
2

7 C368 C369
7 .1U/50V/0603 .1U/50V/0603
6 1 2 MBCLK (27,35)

2
R351 6 R514 0_0402
5 5 1 2 MBDATA (27,35)
100K_0402 4 R515 0_0402
4
3 +5V_ALW SMBUS Address 58
1

3 3 3
LID_CL_PRES# need to connected to EC. 2 2 1 2 LAMP_STAT# (16) M'07 inverter support - De-populate D16.
SW1 1 D10 D'05 inverter support - Populate D16
1

1
*CH751H-40HPT_NC
1 JAE_FI-TD44SB-VF93-R750 C370 C371 C372
(27) LID_CL_PRES# GPIO
2 .1U/10V/0402 47P/50V/0402 47P/50V/0402
(27) LID_CL#

2
3 SIG
GND
as Tom suggestion , connect
LID_CL# is connected to pull high On FM1,LCD_TST & LAMP_STAT to EC "MBCLK" & "MBDATA".
53398-0371 For Discrete:
circuit , then EC , as Page of EC. De-populate J1,R230,C311,C331,C332,
connect to SB ; on FX2 ??.
D16,C333,C329,C341,C324,C326
+PWR_SRC
80 mil
80 mil 6
4 5
2

1
1

2
R352 C373 Q18
100K_0402 .1U/50V/0603 SI3457DV-T1-E3

3
2
INV_PWR_SRC_ON

1
R353
100K_0402

2
2 INV_PWR_SRC_ON_R change name as ED5 2

3
2 MAINON (27,39,40)
Q19

1
2N7002W-7-F

1 1

QUANTA
Title
COMPUTER
LCD CONN

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 18 of 47


E D C B A
A B C D E

+5V_RUN

VGA is kept as FM1's solution. Place All of those


Page 6 has some change for DDCCLK & DDCDAT. Inductors Caps close

2
to JVGA1 <200 mils
D11
CH501H-40PT
+3.3V_RUN

1
1 2 RED 2 1
(11) VGA_RED
L34 C374 .01U/25V/0402 1
BLM21PG220SN1D
3 RED
1 GREEN CRT_VCC D12 1
(11) VGA_GRN 1 2
L35 JVGA1 2
BLM21PG220SN1D 6
11 *DA204U_NC
1 2 BLUE 1
(11) VGA_BLU
L36 7

1
BLM21PG220SN1D 12 Place D4,D5,D6 close

1
2 to JVGA1 <200 mils
R354 R355 R356 C375 C376 C377 C378 C379 C380 8 +3.3V_RUN
+5V_RUN 150/F_0402 150/F_0402 150/F_0402 *22P_NC *22P_NC *22P_NC *10P_NC *10P_NC *10P_NC 13

2
3

2
9 1

2
14
D13 M_ID2# 4 3 GREEN
CH501H-40PT T117 PAD 10
D14

1
CRT_VCC 15 2
C381 5
1

.1U/10V/0402
*DA204U_NC

2
DZ11A91-ND200-7F

3
1
2 1
C382
5

.1U/10V/0402 RP18
4P2R-2.2K

1 2 2 4 HSYNC_B +3.3V_RUN
(11) HSYNC

4
2
R357 39_0402
(11) DAT_DDC2
U12
74AHCT1G125GW 1
(11) CLK_DDC2
3

1 2 HSYNC_R 1 2 JVGA_HS 3 BLUE


2

R358 0_0402 L37 D15

1
R359 BLM11A121S 2
2 1K_0402 Place near U12 <200mil C383 C384 2
10P/50V/0402 10P/50V/0402
*DA204U_NC

2
5

1 2 2 4 VSYNC_B 1 2 VSYNC_R 1 2 JVGA_VS


(11) VSYNC
R360 39_0402 R361 0_0402 L38
U13 BLM11A121S

1
74AHCT1G125GW Place near U13 <200mil
3

C385 C386 C387 C388


*10P_NC *10P_NC *22P_NC *22P_NC

2
delete Svideo for defeature

3 3

4 4

QUANTA
Title
COMPUTER
CRT

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 19 of 47


A B C D E
A B C D E

+3.3V_R5C832

+3.3V_R5C832

change name for ED5


1 +3.3V_R5C832 1
C401 C402 C403 C404 C405 C406
10U/10V/0805 .01U/25V/0402 .01U/25V/0402 .01U/25V/0402 .01U/25V/0402 .01U/25V/0402 copy ED5 to FX2
Waiting to check
Place the power caps close
U15B to the relation pins.
10 VCC_PCI1 VCC_3V 67
C407 C408 C409 C410 Place the power caps close 20
10U/10V/0805 .01U/25V/0402 .1U/10V/0402 .01U/25V/0402 VCC_PCI2
to the relation pins. 27 VCC_PCI3
32 VCC_PCI4
41 C411 C412
VCC_PCI5 .01U/25V/0402 10U/10V/0805
128 VCC_PCI6
61 VCC_RIN
16 VCC_ROUT1
34 VCC_ROUT2
64 +3.3V_RUN +3.3V_R5C832
C413 C414 C415 C416 VCC_ROUT3
114 VCC_ROUT4
.01U/25V/0402 .01U/25V/0402 .47U/10V/0603 .47U/10V/0603 120 VCC_ROUT5

VCC_MD 86 1 2
R371 0_0805

(14,17,33,42) AD[0..31] GND1 4


GND2 13
PCI Bus AD31 125 22
AD30 AD31 GND3
126 AD30 GND4 28
AD29 127 54
2 AD28 AD29 GND5 2
PowerOnReset for VccCore 1 AD28 GND6 62
AD27 2 63
Route GBRST# to GPIOG3 (pin 91) of the SIO companion AD26 AD27 GND7
3 AD26 GND8 68
chip ECE5011, and name the signal CBUS_GRST#. AD25 5 118
AD24 AD25 GND9
If CBUS_GRST# is controlled by the sysem, then C850 6 AD24 GND10 122
AD23 9
does not need to apply. AD22 AD23
11 AD22
+3.3V_R5C832 AD21 12 99
AD20 AD21 AGND1 +3.3V_R5C832
14 AD20 AGND2 102
If R374 is populated, both AD19 15 103
AD19 AGND3
1

AD18 17 107
C417 and R372 can be depop. AD17 AD18 AGND4
18 AD17 AGND5 111

2
R372 AD16 19
100K_0402 AD15 AD16 R373 +3.3V_R5C832 +3.3V_R5C832
36 AD15
Route to GPIOG6 (pin 94) on the
AD14 37 10K_0402 SIO companion chip ECE5011, with
2

AD13 AD14
(27) CBUS_GRST# 1 2 38 AD13 the signal named CB_HWSPND#
R374 *0_NC AD12 39

1
AD12

1
AD11

PCI / OTHER
40 AD11
GBRST# should be asserted only C417 AD10 42 69 2 1
AD10 HWSPND# CB_HWSPND# (27)
1U/10V/0603 AD9 43 R375 *0_NC R376 R377
when system power supply is on. AD8 44
AD9 10K_0402 100K_0402
AD7 AD8 R517 10K_0402
46

2
AD6 AD7
47 58 pull down to Memory Stick disable
AD5 AD6 MSEN
48 AD5 disable MS & XD
AD4 49 55 XD Card disable
AD3 AD4 XDEN
50 AD3
PCI Bus AD2 51
AD1 AD2 Serial ROM disable
Waiting to check LINK AD0
52
53
AD1 UDIO5 57
AD0
SB460 PCI CLKS PIN (14,33,42) PAR 33 PAR
SD Card Enable
(14,33,42) CBE3# 7 C/BE3# UDIO3 65 MMC Card Enable
3
PCLK_PCM (14,33,42) CBE2# 21 C/BE2# UDIO4 59
3
(14,33,42) CBE1# 35 C/BE1#
(14,33,42) CBE0# 45 C/BE0# UDIO2 56
AD17 1 2 8
R378 100_0402 IDSEL
60
(14)
(14)
REQ2#
GNT2#
124
123
REQ#
GNT#
UDIO1

UDIO0/SRIRQ# 72 SERIRQ (14,27,42)


Waiting to check
23
(14,33,42) FRAME#
(14,33,42) IRDY#
(14,33,42) TRDY#
24
25
FRAME#
IRDY#
TRDY# PCI Bus
LINK SB460
26 R559 10K_0402
(14,33,42) DEVSEL#
(14,33,42) STOP#
(14,33,42) PERR#
29
30
DEVSEL#
STOP#
PERR#
INTA# 115 +3.3V_R5C832 1394 Interrupt SERIRQ PIN
as ED5 application +3.3V_RUN 31 116 Media card Interrupt
(14,33,42) SERR# INTE# (14)
71
SERR#

GBRST#
INTB#
PCLK_PCM
2

(14,33,42) PCIRST# 119 PCIRST#


Q43
*DTC144EUA_NC 121
(14) PCLK_PCM PCICLK

(15,24,33) PME# 3 1 2 1 70 PME# TEST 66 T118 PAD


R379 *0_NC
117 CLKRUN#
2

(14,27,33,42) CLKRUN#
The ICH schematics need to include a
CoreLogic CLOCKRUN# pull-up resistor to implement CLKRUN#, R380
and the ICH schematics must have a 100K_0402
pull-down, or constantly drive thesignal R5C832T_V00
1

low, in order to disable CLKRUN#.

PCLK_PCM
4 Refer to DELL 4
1

M07 schematic
R381 X06
*10_NC
QUANTA
1 2

C418
*10P_NC Title
COMPUTER
2

5C832/PCI

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 20 of 47


A B C D E
A B C D E

deleted 1394 for defeature


3.AVCC_PHY3V, connection with +3.3V_R5C832 power
4.AVCC_PHY3V, Inductor Required between +3.3V_R5C832 and AVCC_PHY
+3.3V_R5C832
80 mils

+3.3V_RUN_PHY
L43
C423 C419 BLM18PG181SN1D
1 10U/10V/0805 .01U/25V/0402 1
U15A C424 C425 modify
.1U/10V/0402 1000P/50V/0402

98 Place these caps as close to the U15 as possible.


AVCC_PHY1
AVCC_PHY2 106
AVCC_PHY3 110
AVCC_PHY4 112

TPBIAS0 113

94 XI

104 5.TPBN1 & TPBP1, Short to GND


TPBN0
if the 1394 Port Is Not Used
95 XO TPBP0 105
IEEE1394/SD

TPAN0 108

96 FIL0 TPAP0 109


2 2

101 REXT

100 VREF

MDIO17 87

MDIO16 92

MDIO15 89

MDIO14 91

90 SD/XD/MS_DATA3
MDIO13 SD/XD/MS_DATA3 (22)
93 SD/XD/MS_DATA2
MDIO12 SD/XD/MS_DATA2 (22)
81 SD/XD/MS_DATA1
MDIO11 SD/XD/MS_DATA1 (22)
82 SD/XD/MS_DATA0
MDIO10 SD/XD/MS_DATA0 (22)

MDIO05 75
3 SD/XD/MS_CMD 3
MDIO08 88 SD/XD/MS_CMD (22)

MDIO19 83

MDIO18 85 changed for SD/MMC/SDIO only


MDIO02 78

77 SD_WP#(XDR/B#)
MDIO03 SD_WP#(XDR/B#) (22)
80 SD_CD#
MDIO00 SD_CD# (22)

MDIO01 79

MDIO09 84 SD/XD/MS_CLK (22)

MDIO04 76 MC_PWR_CTRL_0 (22)

MDIO06 74
T119 PAD
97 RSV
MDIO07 73

R5C832T_V00

4 4

QUANTA
Title
COMPUTER
CARD READER

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 21 of 47


A B C D E
A B C D E

'2127,16(576'00&6,08/7$1(286/<
changed for SD/MMC/SDIO only

+3.3V_RUN_CARD

+3.3V_RUN_CARD

C430 C431 C432 R395


.01U/25V/0402 .01U/25V/0402 .01U/25V/0402 150K_0402
1 CON8 1
SD/XD/MS_DATA3 1 8 SD/XD/MS_DATA1
(21) SD/XD/MS_DATA3 SD-1P(CD/DAT3) SD-8P(DAT1) SD/XD/MS_DATA1 (21)
SD/XD/MS_CMD 2 9 SD/XD/MS_DATA2
(21) SD/XD/MS_CMD SD-2P(CMD) SD-9P(DAT2) SD/XD/MS_DATA2 (21)
3 SD-3P(Vss) SD-SW(GND) 10

4 SD-4P(Vdd) SW(RSV) 11 SD_CD# (21)


SD/XD/MS_CLK 1 2 5 12 SD_WP#(XDR/B#)
(21) SD/XD/MS_CLK SD-5P(CLK) SD-SW(WP) SD_WP#(XDR/B#) (21)
R397 0_0402
6 SD-6P(Vss) SDIOGND 13

SD/XD/MS_DATA0 7
(21) SD/XD/MS_DATA0 SD-7P(DAT0)
FOXCONN_WK21923-R2P-4F
R98
6.150k Ohm Register
Required Between 150K_0402
SD/MMC_VCC and GND

3 IN 1 CARD READER
2 2

For SD/MS power

+3.3V_R5C832

U16
5 1 +3.3V_RUN_CARD
IN OUT
3 NC

(21) MC_PWR_CTRL_0 4 EN GND 2


C434
G5240B1T1U 1U/10V/0603

C435
.1U/10V/0402

3 3

4 4

QUANTA
Title
COMPUTER
CARD READER CONN

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 22 of 47


A B C D E
A B C D E

6$7$+''
TH13 TH14

2
1 H-T169BC315D169PB 1 H-T169BC315D169PB

5 3 5 3
1 Place close to 1
connector side

SATA_RX0-_C 2 1 SATA_RXN0 (16)

4
+5VHDD C436 3900P/25V/0402
+5V_RUN +5VHDD
SATA_RX0+_C 2 1 SATA_RXP0 (16)
1 2 C437 3900P/25V/0402

1
R404 0_0805 HDD BRK STANDOFF
C438 C439 C440 C441 BOT side. Locate caps C558, C559 near HDD Conn.
10U/10V/0805 1U/10V/0603 .1U/10V/0402 1000P/50V/0402 Length match SATA_C_RX0- & SATA_C_RX0+ within 20mils.

2
+5V_SUS +5VHDD

Q25
*SI3456DV_NC +3.3V_RUN SATA drive vendors will use only 5V
6 supply from the system and will derive
5 4 3.3V on the drive. If drive power
2 CON9
goals are not achieved, drive vendors

1
1

1
+3.3V_RUN C443 C444 C445 C446 will use both 5V and 3.3V supplies
C442 *10U/10V/0805_NC *1U/10V/0603_NC *.1U/10V/0402_NC *1000P/50V/0402_NC 1 from the system. Initial power saving
3

2
+15V_SUS *4.7U_NC GND1 using 3.3V from system is less than 5%.
2

2
RXP SATA_TXP0 (16)
RXN 3
1

4 SATA_TXN0 (16)
GND2 Power Estimate:
R405 2 1 5 SATA_RX0-_C
R406 *100K_NC Place closed to TXN SATA_RX0+_C
SATA drive power consumption estimate at
*10K_NC 1 TXP 6
HDD connector 7
MobileMark is 1.1W. An additional 150mW
C447 GND3 can be saved using Intel's IMST driver.
2

*.01U_NC
2

(16) HDDC_EN# 2 3.3V 8 +3.3V_RUN


2 Q26 2
3.3V 9
*MMST3904-7-F_NC 10
1

3.3V
GND 11
GND 12
GND 13
14
5V
5V 15
+5VHDD change name for ED5
5V 16
RST_HDD# R407 *22_0402_NC -RST_HDD0 17
(15) RST_HDD# GND
18
RSVD
GND 19 copy ED5 to FX2
(11,14,24,25,33) ALINK_RST# ALINK_RST# R408 22_0402 20
12V
12V 21
+3.3V_RUN +5V_RUN 22
12V Waiting to check
Q27

2
*DTC144EUA_NC R409 MOLEX_67492-1921
*10K_0402_NC 0502 : reserve L66 for current measurement , can be
3$7$2'' ALINK_RST#
removed and short directly after RTS ; and change
+5V_RUN to +5V_ODD for ODD side power
1 3
TH26 TH27

+5V_ODD 60 ohm/3 A +5V_RUN


ODD Screw ODD Screw
1 2
+5V_ODD +5V_ODD L66 TOP side.
BLM21PG600SN1D
CON4
3 1 2 3
-RST_HDD0 3 4 PDD8
(16) PDD[0..15] PDD7 5 6 PDD9
PDD6 7 8 PDD10
(16) PDIOR# 9 10
+3.3V_RUN PDD5 PDD11
(16) PDIOW# 11 12
PDD4 PDD12
(16) PDDACK# 13 14
PDD3 PDD13
(16) IRQ14 15 16
1

PDD2 PDD14
(16) PHDRDY 17 18
PDD1 PDD15
(16) PDDREQ 19 20
R410 PDD0 PDDREQ
(16) PDA0 21 22
4.7K_0402 PDIOR#
(16) PDA1 23 24
PDIOW#
(16) PDA2
2

PHDRDY 25 26 PDDACK#_R PDDACK# +5V_ODD


(16) PDCS3# 27 28 2 1
IRQ14 R411 22_0402
(16) PDCS1# 29 30
PDA1 2 1
+5V_ODD PDA0 31 32 PDA2 R412 100K_0402
PDCS1# 33 34 PDCS3#
IDELED# 35 36
2 1 37 38
R413 510/F_0402
+5V_ODD 39 40
+5V_ODD 41 42
43 44
45 46
2 1 47 48
1

R414 *470_NC
51
52
C448 C449 C450 C451 C452 49 50
10U/10V/0805 1U/10V/0603 .1U/10V/0402 1000P/50V/0402 .1U/10V/0402
2

51
52

Pin.47 Cable select SUYIN-800032MR050G538ZL


H=Slave,L=Master
Place closed to
2

MOD connector
4 R415 4
470_0402
1

QUANTA
Title
COMPUTER
SATA HDD & PATA ODD

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 23 of 47


A B C D E
A B C D E

0,1,&$5'

1 Mini Card Latch 1


change name for ED5
copy ED5 to FX2
Waiting to check
J6
MOLEX_48099-6700

R416 *0_4_NC
(15,25) PCIE_WAKE#

R417 *0_4_NC WAKE# +3.3V_RUN


(15,20,33) PME#

1
C453 C454 C455 C456 C457
.1U/10V/0402 .047U/10V/0402 .1U/10V/0402 .047U/10V/0402 4.7U/10V/0805

2
+3.3V_RUN +3.3V_RUN

J2
+1.5V_RUN +1.5V_RUN
WAKE# 1 2
2 WAKE# 3.3V_1 2
delete Bluetooth 3 RESERVED_1 GND0 4
for defeature 5 RESERVED_2 1.5V_1 6

1
(13) MINI_CLKREQ3# 7 CLKREQ# UIM_PWR 8
9 10 0427 : move position for direct connection C459 C460
GND1 UIM_DATA .047U/10V/0402 .047U/10V/0402
(13) CLK_PCIE_MINI_A# 11 12

2
REFCLK- UIM_CLK
(13) CLK_PCIE_MINI_A 13 REFCLK+ UIM_RESET 14 deleted for media
15 GND2 UIM_VPP 16 board defeature
1

D22 CH501H-40PT
Added C458 per EMI C458 2 1 WLAN_RADIO_DIS# (27)
requirement. .1U/10V/0402
2

delete pin 17 for media board 17 18 R421 *0_0402_NC +3.3V_LAN


UIM_C8 GND3 WLAN_RADIO_OFF#
defeature ; delete pin 19 & 42 19 UIM_C4 W_DISABLE# 20 2 1
21 22 ALINK_RST# (11,14,23,25,33)
, the 8051 debug signal 23
GND4 PERST#
24
(10) MINI_PCIE_RXN2 PERn0 3.3VAUX1 +3.3V_LAN

1
(10) MINI_PCIE_RXP2 25 PERp0 GND5 26
27 28 C461
GND6 1.5V_2 .1U/10V/0402
29 30 PCLK_SMB (13,15,25)

2
GND7 SMB_CLK
(10) MINI_PCIE_TXN2 31 PETn0 SMB_DATA 32 PDAT_SMB (13,15,25)
(10) MINI_PCIE_TXP2 33 PETp0 GND8 34
35 GND9 USB_D- 36 USBP5- (15)
37 RESERVED_3 USB_D+ 38 USBP5+ (15)
PCI-Express TX and RX direct to connector 39 RESERVED_4 GND10 40
41 RESERVED_5 LED_WWAN# 42
43 RESERVED_6 LED_WLAN# 44 LED_WLAN_OUT# (30)
45 RESERVED_7 LED_WPAN# 46 LED_BT_OUT (30)
47 48 R420 *0_NC
RESERVED_8 1.5V_3
49 RESERVED_9 GND11 50
51 RESERVED_10 3.3V_2 52 depopulat R420 for Bluetooth function disabled

MOLEX_67910-6700
3 3

4 4

QUANTA
Title
COMPUTER
MINI Card

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 24 of 47


A B C D E
A B C D E

Express Card TH23 TH20

2
1 H-C315D154P2-4 1 H-C315D154P2-4

5 3 5 3 change name for ED5


1 1
copy ED5 to FX2
Waiting to check

4
NEW CARD GUIDE POST swap traces as "fx2_swap-0412"
TOP side.
+3.3V_SUS

(15) USBP1+ 3 3 4 4 USBP1-_L CPUSB# 1 2


R422 100K_0402
(15) USBP1- 2 2 1 1 USBP1-_R CPPE# 1 2
R423 100K_0402
L45 2231_SHDN# 1 2
*DLW21HN121SQ2_NC R424 100K_0402

1 2
R425 0_0402
+3V_CARD 1 2
R426 0_0402
2 CON5 2
1 GND_1
USBP1-_R 2
as ED5 application USBP1-_L USB-
3 USB+
+3.3V_SUS CPUSB# 4 CPUSB#
5 RSV_0
6 RSV_1
2

(13,15,24) PCLK_SMB 7 SMBCLK


Q44 8 +1.5V_CARD Max. 650mA, Average 500mA
(13,15,24) PDAT_SMB SMBDATA
*DTC144EUA_NC 9 reserve for pull up +3.3V_SUS +3V_CARD Max. 1300mA, Average 1000mA
+1.5V
+1.5V_CARD 10 +1.5V
3 1 NEWCARD_PCIE_WAKE# 11
(15,24) PCIE_WAKE# WAKE#

2
+3V_CARDAUX 12 +3.3VAUX
1 2 CARD_RESET# 13 R560 as ED5 application U17
R534 0_0402 PERST# *100K_0402_NC
14 +3.3V_1 3.3VIN 2 +3.3V_RUN
15 +3.3V_2 (11,14,23,24,33) ALINK_RST# 6 SYSRST# 3.3VIN 4
16 2231_SHDN# 20
(13) NEW_CLKREQ#

1
CLKREQ# SHDN#
(27) CPPE# 17 CPPE# (27) EXPRCRD_STBY# 1 2 1 STBY# 3.3VOUT 3 +3V_CARD
18 R427 *0_NC CARD_RESET# 8 5
(13) CLK_PCIE_NEW# REFCLK- PERST# 3.3VOUT
19 CPUSB# 9
(13) CLK_PCIE_NEW REFCLK+ CPUSB#
20 CPPE# 10 17
GND_2 CPPE# AUXIN +3.3V_SUS
(10) PCIE_RXN1 21 PERn0 18 RCLKEN AUXOUT 15 +3V_CARDAUX
(10) PCIE_RXP1 22 PERp0 19 OC#
23 GND_3 1.5VIN 12 +1.5V_RUN
(10) PCIE_TXN1 24 PETn0 1.5VIN 14
(10) PCIE_TXP1 25
NC1
NC2
NC3
NC4
PETp0
26 GND_4 1.5VOUT 11 +1.5V_CARD
1.5VOUT 13
JAE_PX14-BB2-S
27
28
29
30

PCI-Express TX and RX direct to connector 16 NC5 GND 7

3
JAE PX10FS16PH-26P 3
R5538D001/TPS2231RGP

+1.5V_CARD Max. 650mA, Average 500mA


+3V_CARD Max. 1300mA, Average 1000mA

0427 : change from only net


name to symbol "power point"

+3.3V_RUN
+1.5V_CARD +1.5V_CARD +1.5V_CARD C462 .1U/10V/0402
+3V_CARD +3V_CARDAUX +1.5V_CARD

+3.3V_SUS
1

C470 C471 C472 C473 .1U/10V/0402


C463 C464 C465 C466 C467 C468 C469 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402
10U/6.3V/0805 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 .1U/10V/0402 *.1U_NC *.1U_NC
2

+1.5V_RUN
C474 .1U/10V/0402

4 4

QUANTA
Title
COMPUTER
Express Card

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 25 of 47


A B C D E
A B C D E

0'&,17(5)$&( MDC Layout Notes


1. Tip and Ring trace width = 25 mils
2. Spacing between Tip and Ring = 25 mils
3. Tip and Ring connector pitch = 25 mils
4. Keep out area from Tip and Ring to other signals = 100 mils
5. Power and Ground minimum trace width to connector = 20 mils
6. Route Tip and Ring on one layer only (top or bottom)
1 7. Modem internal cable wire size = 26 AWG 1
(stranded or twisted pair wire)

change name for ED5


+3.3V_SUS
copy ED5 to FX2

1
TH25
C475 C476
.1U/10V/0402 4.7U/10V/0805 Waiting to check

2
MDC_NUT
MDC STANDOFF
BOT Side

CON1
J5 FOXCONN_JM34613-L002-7F
1 2 EMI requirement on 0812
GND1 Reserved1
(15) CD_SDOUTA_MDC 3 IAC_SDATO Reserved2 4
5 6
(15) CD_SYNC_MDC 7
GND2
IAC_SYNC
0'& 3.3V
GND3 8
+3.3V_SUS CON7
TIP
L46 BLM11A601S
TIP_L
(15) CD_SDIN0 1 2 9 IAC_SDATAIN GND4 10 2 1 2 1
R428 33_0402 11 12 IAC_BITCLK_MDC CD_BITCLKA_MDC (15) RING 1 2 RING_L 2
(15) CD_RESET#_MDC IAC_RESET# IAC_BITCLK 1 L47 BLM11A601S

1
Place R117 close to J5 MOLEX_53261-0271
TYCO_1-1775014-2 C477 C478
2 R429 R430 *300P/3KV/4520_NC *300P/3KV/4520_NC 2

2
*10_NC *10_NC

1 2

1 2

5
6
EMI SOLUTION
C479 C480
*10P_NC *10P_NC
2

2
Place C23,C24 close to CON1

delete Bluetooth
for defeature

3 3

4 4

QUANTA
Title
COMPUTER
MDC CONN

Size Document Number Rev


FX2 1A

Date: Friday, May 05, 2006 Sheet 26 of 47


A B C D E
5 4 3 2 1

EC pin updated as "FX2 KBC GPIO define v14"


+3.3V_97551 +3.3V_SRC +3.3V_ALW add R468 for +3.3_SRC & R516 connected +3.3V_97551 +3.3V_SRC to +3.3V_97551
to +3.3V_ALW as power concern about the
leakage; create +3.3V_97551. ENV1 R434 10K_4

C486 C487 C488 C489 C490 R468 R516


+3.3V_97551 0_6 *0_6_NC VCCRTC BADDR0 R435 *10K_4_NC I/O Address
10U/10V/X5R_8.1U_4 .1U_4 .1U_4 .1U_4 R436
delete pull up circuit of RF_SW#,
C492 C493 BADDR1 R437 *10K_4_NC BADDR1-0 Index Data TV_SENSE#_D, MONITOR_PLUG#
C491 0_6
.1U_4 .1U_4 .1U_4 delete pull up
circuit of BT_PWERON# 0 0 2E 2F
+3.3V_RUN
C494 *10P_4_NC R439 *22_4_NC PCLK_591 C495 SHBM R440 10K_4 0 1 4E 4F

123
136
157
166

161
.1U_4

16

34
45

95
D D
U18 SHBM=1: Enable shared memory with host BIOS (HCFGBAH, (HCFGBAH,
1 0

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VDD

AVCC

VBAT
ADAPT_OC_IINP (36) HCFGBAL) HCFGBAL)+1
C680
0502 : added as 1 1 Reserved
SERIRQ 7 81 .1U_4 Loki's suggestion
+3.3V_97551 (14,20,42) SERIRQ SERIRQ AD0 POUT (37)
8 LDRQ AD1 82
LFRAME#/FWH4 9 83 T123 as FM1
(14) LFRAME#/FWH4 LFRAME AD2 +3.3V_97551
LAD0/FWH0 15 84 T122 VCCRTC
(14) LAD0/FWH0 LAD0 Host interface AD3
R443 LAD1/FWH1 14 87 THERMTRIP_SIO Instant on power
(14) LAD1/FWH1 LAD1 IOPE0AD4 THERMTRIP_SIO (35)
LAD2/FWH2 13 88 LID_CL_SIO# switch input
(14) LAD2/FWH2 LAD2 IOPE1/AD5

1
470K_4 LAD3/FWH3 10 89 SUSC# only
(14) LAD3/FWH3 LAD3 AD Input IOPE2/AD6 SUSC# (15)
PCLK_591 18 90 HWPG_591 R444 R561
(14,17) PCLK_591 LCLK IOPE3/AD7
1 2 19 93 100K_0402 100K_0402
(35,38) THERM_SYS_PWR# LREST DP/AD8
(15) KBSMI# 2 1 BA316 22 SMI DN/AD9 94
1

D23 C652 D24 2 1 23


(15) SWI#

2
*BA316_NC .1U_4 D27 *BA316_NC PWUREQ LID_CL_SIO# INSTANT_ON_SW#
DA0 99 1 2 LID_CL# (18) 1 2 INSTANT_POWER_SW# (30)
D28 100 R445 10_0402 R562
2

DA1

1
2 1BA316 31 DA output 101 10K_0402
(15) SCI# IOPD3/ECSCI DA2
102 C496 C673
D29 BA316 DA3 .047U/10V/0402 1U/10V/0603

2
GATEA202 1 5 32 CLK_RESET_IN# (13)
(15) GATEA20 GA20/IOPB5 IOPA0/PWM0
modify for thermal protect 6 33 NB_PWRGD (11)
RCIN# KBRST/IOPB6 IOPA1/PWM1
(15) RCIN# 2 1 IOPA2/PWM2 36 BEEP (31)
D25 BA316 PWM 37
or PORTA IOPA3/PWM3 NB_MUTE (31,32)
MX0 71 38 BREATH_LED# (30)
(35) MX0 KBSIN0 IOPA4/PWM4
MX1 72 39 VCCRTC
(35) MX1 KBSIN1 IOPA5/PWM5 T147
MX2 73 40 0427 : change from
(35) MX2 KBSIN2 IOPA6/PWM6 MY16 (35)
MX3 74 43 BREATH_LED to BREATH_LED#
(35) MX3 KBSIN3 IOPA7/PWM7 AC_OFF (41)

1
MX4 77
(35) MX4 KBSIN4
MX5 78 153 R563
(35) MX5 KBSIN5 IOPB0/URXD PBAT_PRES# (41)
MX6 79 154 100K_0402
(35) MX6 KBSIN6 Key matrix scan IOPB1/UTXD T126
MX7 80 162
(35) MX7 KBSIN7 IOPB2/USCLK CPU_EC_PROCHOT# (5)
163 MBCLK
MBCLK (18,35)

2
MY0 PORTB IOPB3/SCL1 MBDATA MAIN_PWR_SW#
C (35) MY0 49 KBSOUT0 IOPB4/SDA1 164 MBDATA (18,35) 1 2 POWER_SW# (30,35) C
(35) MY1 MY1 50 165 AUDIO_AVDD_ON R564
KBSOUT1 IOPB7/RING/PFAIL AUDIO_AVDD_ON (31)

1
(35) MY2 MY2 51 10K_0402
MY3 KBSOUT2 591_PME# C674
(35) MY3 52 KBSOUT3 IOPC0 168
(35) MY4 MY4 53 169 PBAT_SMBCLK 1U/10V/0603
PBAT_SMBCLK (36,41)

2
MY5 KBSOUT4 IOPC1/SCL2 PBAT_SMBDAT D26
(35) MY5 56 KBSOUT5 IOPC2/SDA2 170 PBAT_SMBDAT (36,41)
(35) MY6 MY6 57 171 1 2
KBSOUT6 PORTC IOPC3/TA1 DNBSWON# (15)
(35) MY7 MY7 58 172 FAN1_TACH
KBSOUT7 IOPC4/TB1/EXWINT22 FAN1_TACH (35)
(35) MY8 MY8 59 175 FPBACK_EN BA316
KBSOUT8 IOPC5/TA2 FPBACK_EN (11)
(35) MY9 MY9 60 176 LID_CL_PRES#
KBSOUT9 IOPC6/TB2/EXWINT23 LID_CL_PRES# (18)
(35) MY10 MY10 61 1 R448 0_6 PBAT_SMBCLK/DAT : Charger, Battery
KBSOUT10 IOPC7/CLKOUT EC_PWRGD (14,15,35)
(35) MY11 MY11 64 MBCLK/DATA : LCD, Password, CPU internal thermal diode
MY12 KBSOUT11
(35) MY12 65 KBSOUT12 IOPD0/RI1/EXWINT20 26 VLDT_RUN_ON (39)
(35) MY13 MY13 66 PORTD-1 29 ACAV_IN
KBSOUT13 IOPD1/RI2/EXWINT21 ACAV_IN (35,36) +3.3V_97551 +3.3V_97551
(35) MY14 MY14 67 30 INSTANT_ON_SW#
MY15 KBSOUT14 IOPD2/EXWINT24
(35) MY15 68 KBSOUT15
2 MAIN_PWR_SW#
IOPE4/SWIN SUSB#
T124 105 TINT IOPE5/EXWINT40 44 SUSB# (15)
106 PORTE 24 ATF_INT#
T127 TCK IOPE6/LPCPD/EXWIN45 ATF_INT# (35)
107 25 R449 0_4 R450 R452 R446 R451
+3.3V_SUS T128 TDO JTAG debug port IOPE7/CLKRUN/EXWINT46 CLKRUN# (14,20,33,42)
108 10K_4 10K_4 4.7K/F_4 4.7K/F_4
T125 TDI +3.3V_97551
109 124 ENV0
T129 TMS IOPH0/A0/ENV0
R565 10K_4 125 ENV1 PBAT_SMBCLK
IOPH1/A1/ENV1 BADDR0 PBAT_SMBDAT
(41) PS_ID 110 PSCLK1/IOPF0 IOPH2/A2/BADDR0 126
BADDR1 +3.3V_97551 +3.3V_SUS U19
(33) LOM_LOW_PWR# 111 PSDAT1/IOPF1 IOPH3/A3/BADDR1 127
114 128 TRIS MBCLK 6 1
(25) CPPE# PSCLK2/IOPF2 IOPH4/A4/TRIS SCL A0
115 PORTH 131 SHBM MBDATA 5 2
(28) USB_BACK_EN# PSDAT2/IOPF3 PS2 interface IOPH5/A5/SHBM SDA A1
TBCLK 116 132 A6