Sei sulla pagina 1di 55

1 2 3 4 5 6 7 8

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R08/V08 BLOCK DIAGRAM
A
PCIEx16 Nvidia A

DDRIII-SODIMM1 DDRIII 1600 MT/s


CPU N13P-GS (128bit) V08x only
H=4mm
PAGE11 N13P-GL (128bit)
Ivy Bridge 35W / 29mm X 29mm
Sandy Bridge BGA 908
DDRIII 1600 MT/s PGA 988 PAGE 13~17
DDRIII-SODIMM2
H=8mm
PAGE12
PAGE 6~10 DDR3 1GB
64Mx16bitx8
FDI LINK DMI LINK DDR3 2GB
2.7GT /s 5GT /s 128Mx16bitx8
PAGE 18~19 HDMI CONN
INT HDMI
PAGE29

iGFX Interfaces
SATA0 600MB /S INT CRT
SATA -HDD CRT CONN
B
PAGE28 B
PAGE34
INT Dual CHANNEL LVDS
LCD CONN
SATA3 300MB /S PAGE27
ODD
Mobile Intel
PAGE34 Card Reader Fingerprint
Series 7 Chipset PAGE32 PAGE40
USB[10] USB[8]
USB3.0
USB3.0 Ports x2
PAGE31 USB2.0 USB[12]
PCH
Camera
USB3.0 PAGE27
USB PWR SHARE x1
PAGE31 HM77
USB[4] USB[5]
Panther Point
SATA1
SMBUS WLAN/BT WWAN/mSATA USB3.0 Ports x1
3-axis Fall Sensor page3 page3 page4
PAGE33
PCIE[1]
BGA 989 PCI-E PCI-E
C C
LPC SIM CARD
Keyboard Conn. 25 mm X 25 mm PCIE[5]
PAGE40
KBC LAN
ITE 8518 AR8161(1G)
PCB STACK UP
Touch Pad RJ45 10/100 support
PAGE40 AR8162(10/100)
Page2
China Go-Rural
6L DIS
PAGE 20~26 IHDA Page 2
PAGE 38
IO SB LAYER 1 : TOP
25MHz
SPI
LAYER 2 : VCC
IHDA
25MHz 32.768KHz
LAYER 3 : IN1
SPI ROM SPI ROM
PWM FAN LAYER 4 : IN2
&Thermal 8MB 8MB
PAGE42 PAGE39 PAGE39 LAYER 5 : GND
Audio Codec

D PAGE37 LAYER 6 : BOT D

Speaker Jack Digital-MIC Quanta Computer Inc.


MB Side X2
PAGE37 PAGE37 PAGE27 PROJECT : R08
Size Document Number Rev
1A
BLOCK DIAGRAM
Date: Monday, February 13, 2012 Sheet 1 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

202

http://laptopblue.vn
+3.3V_SUS +3.3V_RUN
200
A0
JDIM1A

2.2K 2.2K 2.2K 2.2K 202


+3.3V_RUN
H14 SMBCLK WLAN_SCLK 200 JDIM2A A4
N-MOSFET
C9 SMBDATA WLAN_SDATA
N-MOSFET
A
+3.3V_RUN A

+3.3V_SUS

PCH 2.2K 2.2K


6
FALL SENSOR
4
50
C8 SML0CLK STM LNG3DM

G12 SML0DATA

+3.3V_SUS

2.2K 2.2K
E14 SMB_CLK_ME1

M16 SMB_DATA_ME1

+3.3V_SUS

+3.3V_SUS
+3.3V_ALW

N-MOS

N-MOS
B B
2.2K 2.2K
116 SMBDAT1

115 SMBCLK1

+3.3V_ALW
100
3

4 Battery 16h
2.2K 2.2K
SIO 100 Function IC SMBus Address
110 SMBCLK0 9
JDIM1A A0h
DDR3
ITE8518E 111 SMBDAT0 8 Charger 12 JDIM2A A4h
+3.3V_RUN
EMC1422 1001100xb (98h)
Thermal IC
G781-1P8 1001101xb (9Ah)
Charge IC BQ24707ARGRR 0b0001001x (0x12h)
Battery Battery 16h
2.2K 2.2K Fall Sensor STM LNG3DM 01010000 (50h)
94 SMBCLK3 8
C C

95 SMBDAT3 7 THERMAL(EMC1422) 98

7 THERMAL (G781-1P8) 9A

MB
SCREW PAD
For CPU Use 20120204
H1 H2 H3 H4 H5 H6 H7 H8
O-R08-2 H-C236D118P2 H-C315IC158D118P2 H-C315IC158D118P2 Modify PV1 PV2 subsystem ID to OTH
H-TC236I20BC197D118P2
H-C315IC158D118P2 H-C315IC158D118P2
H-C315IC158D118P2 H11

2
H16 H17 H18 H19 *H-C283D146P2-r08_NC PV1 PV2
h-c154d154n h-c154d154n H-C142D142N H-C142D142N intel-cpu-bkt2-r08
4 3 emipad98x79-3_1h emipad118x79-3_1h
1

1
1

1
H9 H10 H12 H13 H14
H-C315IC158D118P2 H-C315IC158D118P2 H-TC236BC197D118P2 H-C315IC158D118P2-1 H-C276D118P2

20120206
H21 H22 H23
o-r08-1 h-o118x142d118x142n H-C276D276N Modify H11 pin1,2,3,4 no connect to GND
D D
20120209
1

Modify H11 pin3 connect to GND


1

LABEL68X5.5JM5 30X6MM,ON SMT,R07


LABEL1 LABEL2
20120204
Add two label PN HCR07003010 and HCJM5004013

Quanta Computer Inc.


PROJECT : R08
Size Document Number Rev
1A
SMB/SCREW PAD
Date: Monday, February 13, 2012 Sheet 2 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

http://laptopblue.vn
USB Master Port Assignment SATA Master Port Assignment PCIE Master Port Assignment
A A

USB0 External port#1 (USB3.0) SATA0 HDD PCIE 1 WLAN

External port#2 (USB3.0/eSATA/ SATA1 mSATA PCIE 2 WWAN (NC)


USB1
Power share/ debug port)
SATA2 NC PCIE 3 Card reader (NC)
USB2 External port#3 (USB3.0)
SATA3 ODD PCIE 4 NC
USB3 External port#4 (USB3.0)
SATA4 eSATA (NC) PCIE 5 LAN
USB4 MiniCard 1 (WLAN/BT)
SATA5 NC PCIE 6 Express card (NC)
USB5 MiniCard 2 (WWAN/WiMAX)
PCIE 7 NC
B B
USB6 X(FOR HM77)
PCIE 8 NC
USB7 X(FOR HM77)

USB8 Fingerprint

USB9 Touch panel (NC, for debug)

USB10 Card Reader

USB11 Express Card (NC)

USB12 Camera

C USB13 NC C

D D

Quanta Computer Inc.


PROJECT : R08
Size Document Number Rev
1A
PORT ASSIGNMENT
Date: Monday, February 13, 2012 Sheet 3 of 55
1 2 3 4 5 6 7 8
5 4 3 2 1

Adapter 90W http://laptopblue.vn VER : 1A


Charger
PWR_SRC
BQ24707ARGRR
Shapes: 280mil
D
Via: 10 D

Battery 3S2P

+3.3V_EN2 ALW_ON
SIO_SLP_S4# SIO_SLP_S3# 1.5V_SUS_PWRGD VCCSA_EN +3.3V_RUN IMVP_VR_ON

TI (PU1)
TI(PU2) RichTek(PU5) RichTek(PU3) ON(PU7)
TPS51125ARGER NCP6132A
TPS51216RUKR LDO RT8241DGQW RT8240BGQW

+1.5V_SUS
+3.3V_ALW +5V_ALW +15V_ALW
TDC: 3.87A TDC: 18A
+1.5V_SUS +0.75V_DDR_VTT +VCCSA_CORE +1.05V_PCH
Shapes: 155mil Shapes: 720mil TDC: 8.15A TDC: 1A TDC: 4.2A TDC: 10.39A
Via: 6 Via: 26 Shapes: 326mil Shapes: 40mil Shapes: 168mil Shapes: 415.6mil
C C
Via: 12 Via: 2 Via: 6 Via: 15 PQ35 PQ36 PQ37

SUS_ON SUS_ON RUN_ON RUN_ON DGPU_PWR_ON# SIO_SLP_S3# DGFX_VR_PWRGD

+VCC_CORE +VCC_iGFX_CORE
TDC: 42.4A TDC: 23A
Load Switch(PQ17) Load Switch(PQ23) Load Switch(PQ16) Load Switch(PQ25) Load Switch(PQ24) Load Switch(Q4) Load Switch(PQ27) Shapes: 1696mil Shapes: 920mil
FDC655BN FDC655BN TPCC8065-H TPCC8065-H TPCC8065-H FDMS7670 FDMS7670 Via: 61 Via: 33

For dGPU only For dGPU only

+3.3V_SUS +5V_SUS +5V_RUN +1.5V_RUN +1.5V_GFX +1.5V_CPU +1.05V_GFX


TDC: 0.2A TDC: 1.41A TDC: 3.5A TDC: 1A TDC: 1A TDC: 5A TDC: 1A
Shapes: 8mil Shapes: 56.4mil Shapes: 140mil Shapes: 40mil Shapes: 40mil Shapes: 200mil Shapes: 40mil
Via: 1 Via: 2 Via: 5 Via: 2 Via: 2 For dGPU Via: 8 Via: 2
B B

+3V_GFX
DGPU_PWR_EN 1.05V_PCH_PWRGD
RUN_ON

ON(PU11)
Load Switch(PQ22) Load Switch(PQ18) RichTek(PU6)
NCP3218MNR2G
TPCC8065-H FDC655BN RT8068AZQW
For dGPU only
For dGPU only

+VCC_DGFX_CORE
+3.3V_RUN +3V_GFX +1.8V_RUN TDC: 40A
TDC: 3.52A TDC: 0.2A TDC: 1.02A Shapes: 1600mil
Shapes: 140.8mil Shapes: 8mil Shapes: 40.8mil Via: 57
Via: 5 Via: 1 Via: 2

A A

Quanta Computer Inc.


PROJECT : R08
Size Document Number Rev
1A
Power Block Diagram
Date: Monday, February 13, 2012 Sheet 4 of 55
5 4 3 2 1
1 2 3 4 5 6 7 8

Battery Mode http://laptopblue.vn 3


2
+PWR_SRC 1 +PWR_SRC +VCHGR

+5V_ALW2 +3.3V_ALW 5
POWER_SW_IN0#
+5V_ALW 8
3V/5V
+5V_ALW +5V_SUS 11 PWR SW VR CHARGER Battery
+15V_ALW 9
SUS

EN2

EN1
+3.3V_ALW SW +3.3V_SUS 12

SYS_PWR_SW#
A A

4 3.3V_ALW_ON
G

SUS_ON 10
7
+PWR_SRC
6 ALW_ON

DDR/0.75V +1.5V_SUS 20 13 RSMRST#


DPWROK
ME_SUS_PWR_ACK 14
SUSWARN#
+DDR_VTTREF 22 EC AC_PRESENT
15 ACPRESENT
35 SIO_PWRBTN#
HWPG 16 PWRBTN#
+0.75V_DDR_VTT 23 SIO_SLP_S5# 17
SLP_S5#
SIO_SLP_S4#
18 SLP_S3#
SIO_SLP_S3#
1.5V_SUS_PWRGD 24 PCH

SIO_SLP_S3#

SIO_SLP_S4#

SIO_SLP_S5#
PG 19

IMVP_VR_ON
APWROK
S4

S3

EC_PWROK
B PM_DRAM_PWRGD B
VCCSA_PWRGD 38 DRAMPWROK

SUS_ON

RUN_ON
PCH_CLK
RC Delay SIO_SLP_S3# 10 39
19 34 SYS_PWROK

PROCPWRGD
SIO_SLP_S4# SYS_PWROK

PLTRST#
DGPU_PWR_EN
18 25 37 36 48
19 18 17 DGPU_PWROK
+1.5V_SUS +1.5V_CPU 21 Buffer
SLP_S3 53 54
SWITCH SYS_PWROK

DGPU_HOLD_RST#

H_PWRGOOD
31 49

PLTRST#
+5V_ALW +1.8V_RUN +3.3V_ALW +3V_GFX
G

1.8V GPU PWR 44 IMVP_PWRGD


SIO_SLP_S3# 19 VR SWITCH 45
+1.5V_SUS +1.5V_GFX
VCCSA_EN 37 EC_PWROK
PG
EN

+PWR_SRC 52 55 41 46
32
38 PM_DRAM_PWRGD 40
+GFX_PWR_SRC

G
SM_SDRAMPWROK
C RUN PWR +PWR_SRC
U2
C

RESET#
UNCOREPWRGOOD
SWITCH 48 37 EC_PWROK
+5V_ALW +5V_RUN 26 33 DGPU_PWR_EN SVID
+VCCSA_CORE
VCCSA 42
+3.3V_ALW +3.3V_RUN 27 +PWR_SRC
VR 34
VCCSA_PWRGD 50
+1.5V_SUS +1.5V_RUN 28 PG +VCC_DGFX_CORE
EN

GPU CPU
VR 51
VCCSA_EN
G

DGFX_VR_PWRGD
EN PG
RUN_ON +PWR_SRC
25
46
43 +3.3V_GFX
+VCC_CORE PLTRST# 56
+PWR_SRC
IMVP GPU_RST#
VR 47
+VCC_GFX_CORE 53 DGPU_HOLD_RST#
GPU
+1.05V_PCH 29 +1.05V_PCH +1.05V_GFX
D
1.05V GPU PWR 55 D

VR 44 SWITCH
1.05V_PCH_PWRGD IMVP_PWRGD
PG PG
EN

EN

30
G

Quanta Computer Inc.


+3.3V_RUN SVID IMVP_VR_ON 36 DGFX_VR_PWRGD
PROJECT : R08
PCH 42 CPU GPU Size Document Number Rev
1A
POWER SEQUENCE
Date: Monday, February 13, 2012 Sheet 5 of 55
1 2 3 4 5 6 7 8
5 4 3 2 1

Ivy Bridge Processor (RESERVED, CFG)


http://laptopblue.vn DP & PEG Compensation
+1.05V_PCH

D PEG_ICOMPO 12mil eDP_COMP R1 1


D
2 24.9/F_4
PEG_ICOMPI, PEG_RCOMPO 4mil,
U1A eDP_COMPIO and ICOMPO signals should
J22 PEG_COMP be shorted near balls and
PEG_ICOMPI
J21
DMI_TXN0 B27
PEG_ICOMPO
H22
routed within 500 mils
20 DMI_TXN0 DMI_RX#[0] PEG_RCOMPO
DMI_TXN1 B25
20 DMI_TXN1 DMI_RX#[1]
DMI_TXN2 A25
20 DMI_TXN2 DMI_RX#[2]
DMI_TXN3 B24 K33 PEG_RXN0
20 DMI_TXN3 DMI_RX#[3] PEG_RX#[0] PEG_RXN0 13
M35 PEG_RXN1
PEG_RX#[1] PEG_RXN1 13 +1.05V_PCH
DMI_TXP0 B28 L34 PEG_RXN2
20 DMI_TXP0 DMI_RX[0] PEG_RX#[2] PEG_RXN2 13
DMI_TXP1 B26 J35 PEG_RXN3
20 DMI_TXP1 DMI_RX[1] PEG_RX#[3] PEG_RXN3 13

DMI
DMI_TXP2 A24 J32 PEG_RXN4
20 DMI_TXP2 DMI_RX[2] PEG_RX#[4] PEG_RXN4 13
DMI_TXP3 B23 H34 PEG_RXN5
20 DMI_TXP3 DMI_RX[3] PEG_RX#[5] PEG_RXN5 13
H31 PEG_RXN6
PEG_RX#[6] PEG_RXN6 13
DMI_RXN0 G21 G33 PEG_RXN7
20 DMI_RXN0 DMI_TX#[0] PEG_RX#[7] PEG_RXN7 13
DMI_RXN1 E22 G30 PEG_RXN8
20 DMI_RXN1 DMI_TX#[1] PEG_RX#[8] PEG_RXN8 13
DMI_RXN2 F21 F35 PEG_RXN9 PEG_COMP R2 1 2 24.9/F_4
20 DMI_RXN2 DMI_TX#[2] PEG_RX#[9] PEG_RXN9 13
DMI_RXN3 D21 E34 PEG_RXN10
20 DMI_RXN3 DMI_TX#[3] PEG_RX#[10] PEG_RXN10 13
E32 PEG_RXN11 PEG_ICOMPI and RCOMPO signals should
PEG_RX#[11] PEG_RXN11 13
DMI_RXP0 G22 D33 PEG_RXN12 be routed within 500 mils
20 DMI_RXP0 DMI_TX[0] PEG_RX#[12] PEG_RXN12 13
DMI_RXP1 D22 D31 PEG_RXN13
20 DMI_RXP1 DMI_TX[1] PEG_RX#[13] PEG_RXN13 13

PCI EXPRESS* - GRAPHICS


DMI_RXP2 F20 B33 PEG_RXN14
20 DMI_RXP2 DMI_TX[2] PEG_RX#[14] PEG_RXN14 13 PEG_ICOMPO signals should
DMI_RXP3 C21 C32 PEG_RXN15
20 DMI_RXP3 DMI_TX[3] PEG_RX#[15] PEG_RXN15 13
be routed within 500 mils
J33 PEG_RXP0
PEG_RX[0] PEG_RXP0 13
L35 PEG_RXP1
PEG_RX[1] PEG_RXP1 13
K34 PEG_RXP2
PEG_RX[2] PEG_RXP2 13
C FDI_TXN0 A21 H35 PEG_RXP3 C
20 FDI_TXN0 FDI0_TX#[0] PEG_RX[3] PEG_RXP3 13
FDI_TXN1 H19 H32 PEG_RXP4
20 FDI_TXN1 FDI0_TX#[1] PEG_RX[4] PEG_RXP4 13
FDI_TXN2 E19 G34 PEG_RXP5
20 FDI_TXN2 FDI0_TX#[2] PEG_RX[5] PEG_RXP5 13
FDI_TXN3 F18 G31 PEG_RXP6

Intel(R) FDI
20 FDI_TXN3 FDI0_TX#[3] PEG_RX[6] PEG_RXP6 13
FDI_TXN4 B21 F33 PEG_RXP7
20 FDI_TXN4 FDI1_TX#[0] PEG_RX[7] PEG_RXP7 13
FDI_TXN5 C20 F30 PEG_RXP8
20 FDI_TXN5 FDI1_TX#[1] PEG_RX[8] PEG_RXP8 13
FDI_TXN6 D18 E35 PEG_RXP9
20 FDI_TXN6 FDI1_TX#[2] PEG_RX[9] PEG_RXP9 13
FDI_TXN7 E17 E33 PEG_RXP10
20 FDI_TXN7 FDI1_TX#[3] PEG_RX[10]
PEG_RX[11] F32 PEG_RXP11
PEG_RXP12
PEG_RXP10 13
PEG_RXP11 13
eDP Hot-plug (Disable)
PEG_RX[12] D34 PEG_RXP12 13
FDI_TXP0 A22 E31 PEG_RXP13
20 FDI_TXP0 FDI0_TX[0] PEG_RX[13] PEG_RXP13 13
FDI_TXP1 G19 C33 PEG_RXP14
20 FDI_TXP1 FDI0_TX[1] PEG_RX[14] PEG_RXP14 13
FDI_TXP2 E20 B32 PEG_RXP15
20 FDI_TXP2 FDI0_TX[2] PEG_RX[15] PEG_RXP15 13
FDI_TXP3 G18
20 FDI_TXP3 FDI0_TX[3]
FDI_TXP4 B20 M29 PEG_TXN0_C C1 2 1 0.1U/16V_4 PEG_TXN0
20 FDI_TXP4 FDI1_TX[0] PEG_TX#[0] PEG_TXN0 13
FDI_TXP5 C19 M32 PEG_TXN1_C C2 2 1 0.1U/16V_4 PEG_TXN1
20 FDI_TXP5 FDI1_TX[1] PEG_TX#[1] PEG_TXN1 13
FDI_TXP6 D19 M31 PEG_TXN2_C C3 2 1 0.1U/16V_4 PEG_TXN2
20 FDI_TXP6 FDI1_TX[2] PEG_TX#[2] PEG_TXN2 13
FDI_TXP7 F17 L32 PEG_TXN3_C C4 2 1 0.1U/16V_4 PEG_TXN3
20 FDI_TXP7 FDI1_TX[3] PEG_TX#[3] PEG_TXN3 13
L29 PEG_TXN4_C C5 2 1 0.1U/16V_4 PEG_TXN4
PEG_TX#[4] PEG_TXN4 13
FDI_FSYNC0 J18 K31 PEG_TXN5_C C6 2 1 0.1U/16V_4 PEG_TXN5
20 FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5] PEG_TXN5 13
FDI_FSYNC1 J17 K28 PEG_TXN6_C C7 2 1 0.1U/16V_4 PEG_TXN6
20 FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] PEG_TXN6 13
J30 PEG_TXN7_C C8 2 1 0.1U/16V_4 PEG_TXN7
PEG_TX#[7] PEG_TXN7 13
FDI_INT H20 J28 PEG_TXN8_C C9 2 1 0.1U/16V_4 PEG_TXN8
20 FDI_INT FDI_INT PEG_TX#[8] PEG_TXN8 13
H29 PEG_TXN9_C C10 2 1 0.1U/16V_4 PEG_TXN9
PEG_TX#[9] PEG_TXN9 13
FDI_LSYNC0 J19 G27 PEG_TXN10_C C11 2 1 0.1U/16V_4 PEG_TXN10
20 FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] PEG_TXN10 13
FDI_LSYNC1 H17 E29 PEG_TXN11_C C12 2 1 0.1U/16V_4 PEG_TXN11 CAD Note: Place PU resistor within 2 inches
20 FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] PEG_TXN11 13
F27 PEG_TXN12_C C13 2 1 0.1U/16V_4 PEG_TXN12
PEG_TX#[12] PEG_TXN12 13 of CPU
D28 PEG_TXN13_C C14 2 1 0.1U/16V_4 PEG_TXN13
PEG_TX#[13] PEG_TXN13 13
F26 PEG_TXN14_C C15 2 1 0.1U/16V_4 PEG_TXN14
B PEG_TX#[14] PEG_TXN14 13 B
E25 PEG_TXN15_C C16 2 1 0.1U/16V_4 PEG_TXN15 This signal can be left as no connect if
PEG_TX#[15] PEG_TXN15 13
A18 eDP_COMPIO
eDP_ICOMPO 12mil eDP_COMP A17 M28 PEG_TXP0_C C17 2 1 0.1U/16V_4 PEG_TXP0
PEG_TXP0 13
entire eDP interface is disabled.
eDP_ICOMPO PEG_TX[0] PEG_TXP1_C C18 0.1U/16V_4 PEG_TXP1
B16 eDP_HPD PEG_TX[1] M33 2 1 PEG_TXP1 13
eDP_COMPIO 4mil M30 PEG_TXP2_C C19 2 1 0.1U/16V_4 PEG_TXP2
PEG_TXP2 13
PEG_TX[2] PEG_TXP3_C C20 0.1U/16V_4 PEG_TXP3
Programing Disable eDP interface(BIOS) PEG_TX[3] L31
PEG_TXP4_C C21
2 1
0.1U/16V_4 PEG_TXP4
PEG_TXP3 13
C15 eDP_AUX PEG_TX[4] L28 2 1 PEG_TXP4 13
D15 K30 PEG_TXP5_C C22 2 1 0.1U/16V_4 PEG_TXP5
eDP_AUX# PEG_TX[5] PEG_TXP5 13
eDP

K27 PEG_TXP6_C C23 2 1 0.1U/16V_4 PEG_TXP6


PEG_TX[6] PEG_TXP6 13
J29 PEG_TXP7_C C24 2 1 0.1U/16V_4 PEG_TXP7
PEG_TX[7] PEG_TXP7 13
C17 J27 PEG_TXP8_C C25 2 1 0.1U/16V_4 PEG_TXP8
eDP_TX[0] PEG_TX[8] PEG_TXP8 13
F16 H28 PEG_TXP9_C C26 2 1 0.1U/16V_4 PEG_TXP9
eDP_TX[1] PEG_TX[9] PEG_TXP9 13
C16 G28 PEG_TXP10_C C27 2 1 0.1U/16V_4 PEG_TXP10
eDP_TX[2] PEG_TX[10] PEG_TXP10 13
G15 E28 PEG_TXP11_C C28 2 1 0.1U/16V_4 PEG_TXP11
eDP_TX[3] PEG_TX[11] PEG_TXP11 13
F28 PEG_TXP12_C C29 2 1 0.1U/16V_4 PEG_TXP12
PEG_TX[12] PEG_TXP12 13
C18 D27 PEG_TXP13_C C30 2 1 0.1U/16V_4 PEG_TXP13
eDP_TX#[0] PEG_TX[13] PEG_TXP13 13
E16 E26 PEG_TXP14_C C31 2 1 0.1U/16V_4 PEG_TXP14
eDP_TX#[1] PEG_TX[14] PEG_TXP14 13
D16 D25 PEG_TXP15_C C32 2 1 0.1U/16V_4 PEG_TXP15 20120203
eDP_TX#[2] PEG_TX[15] PEG_TXP15 13
F15 eDP_TX#[3] Change C1~C32 to 0.1U/16V_4 (CH4103K1B08)
0.22uF AC coupling Caps for PCIE GEN3
Ivy Bridge_rPGA_2DPC_Rev0p61 0.1uF AC coupling Caps for PCIE GEN1/2

VGA(U3) AC coupling Cap PN TX location RX location(page13)


C144 C145 C147 C149 C150
C152 C154 C156 C157 C158
A C159 C160 C161 C162 C163 A
N13P-GL 0.1uF CH4103K1B08 C1~C32 C164 C165 C166 C167 C168
C169 C171 C173 C175 C176
C177 C178 C179 C180 C182
C184 C185
C144 C145 C147 C149 C150
C152 C154 C156 C157 C158 Quanta Computer Inc.
C159 C160 C161 C162 C163
N13P-GS 0.22uF CH4223K1B00 C1~C32 C164 C165 C166 C167 C168 PROJECT : R08
C169 C171 C173 C175 C176
Size Document Number Rev
C177 C178 C179 C180 C182 1A
C184 C185 Ivy Bridge 1/5
Date: Monday, February 13, 2012 Sheet 6 of 55
5 4 3 2 1
5 4 3 2 1

http://laptopblue.vn
Ivy Bridge Processor (CLK,MISC,JTAG)
U1B

SNB_IVB# N.A at SNB EDS #27637 0.7v1 CLK_CPU_BCLKP


BCLK A28 CLK_CPU_BCLKP 24

MISC

CLOCKS
H_SNB_IVB# C26 A27 CLK_CPU_BCLKN
23 H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_BCLKN 24
R4 1 2 1K_4
D H_CPUDET# AN34 D
38 H_CPUDET# SKTOCC#
DPLL_REF_CLK A16 CLK_DP_P_R
DPLL_REF_CLK# A15 CLK_DP_N_R

R5 1 2 1K_4 +1.05V_PCH
CATERR# AL33
TP1 CATERR#
For eDP

THERMAL
PECI_EC R6 1 2 43_4 PECI_EC_R AN33 R8 CPU_DRAMRST#
38 PECI_EC PECI SM_DRAMRST#

DDR3
MISC
IMVP7_PROCHOT# R7 1 2 56_4 H_PROCHOT# AL32 AK1 SM_RCOMP_0 R8 1 2 140/F_4
38,52,54 IMVP7_PROCHOT# PROCHOT# SM_RCOMP[0]
A5 SM_RCOMP_1 R9 1 2 25.5/F_4
SM_RCOMP[1] SM_RCOMP_2 R10
SM_RCOMP[2] A4 1 2 200/F_4

Over 130 degree C will PM_THRMTRIP# AN32 SM_RCOMP_0, SM_RCOMP_1 20mil / SM_RCOMP_2 15mil.
25 PM_THRMTRIP# THERMTRIP#
drive low

PRDY# AP29
PREQ# AP27
+1.05V_PCH
AR26 XDP_TCLK TP28
TCK

PWR MANAGEMENT
XDP_TMS TP37

JTAG & BPM


TMS AR27
H_PM_SYNC AM34 AP30 XDP_TRST# TP38
20 H_PM_SYNC PM_SYNC TRST#
C AR28 XDP_TDI TP41 C
TDI XDP_TDO TP42 IMVP7_PROCHOT# R14 62_4
TDO AP26 2 1
H_PW RGOOD AP33 +3.3V_RUN
25 H_PW RGOOD UNCOREPWRGOOD
10K_4 2 1 R17
AL35 XDP_DBRST# 1 2
SM_DRAMPW ROK DBR# R18 1K_4
V8 SM_DRAMPWROK

BPM#[0] AT28
BPM#[1] AR29
BPM#[2] AR30
PLTRST# 2 1 CPU_PLTRST#_R AR33 AT30
13,23,35,38 PLTRST# RESET# BPM#[3]
R19 1.5K/F_4 AP32
BPM#[4]
BPM#[5] AR31
BPM#[6] AT31
1

BPM#[7] AR32
R20
750/F_4
2

Ivy Bridge_rPGA_2DPC_Rev0p61

Intel spec VinH min =VCCIO X 0.7 Boot S3 S3 RSM

B
+1.5V_CPU B
C854 2 1 *100P/50V_4_NC H_PROCHOT#
DRAM_PWRGD
C860 2 1 *100P/50V_4_NC CPU_PLTRST#_R
100 ns after +1.5V_CPU
SYS_PWROK reaches 80%
Follow #DG1.5 471984 P130
SM_DRAMPWROK DRAMRST# Routing Illustration

Follow #DG1.5 471984 P119 +1.5V_SUS

2
R21 Q1
Follow #DG1.5 471984 P128 2N7002W
1K_4
DDR Power Gating Topology

1
DDR3_DRAMRST# 2 1 DDR3_DRAMRST#_R 3 1 CPU_DRAMRST#
11,12 DDR3_DRAMRST#
R22 1K_4
+3.3V_SUS

1
+1.5V_CPU DDR_HVREF_RST_PCH
9,24 DDR_HVREF_RST_PCH
1

R23

1
C33 4.99K/F_4
2

R24 0.1U/16V_4 C34


2

2
200_4 +3.3V_SUS 1 2 0.047U/10V_4

2
A A
R25 R26 1K_4
2

U2 200_4
PM_DRAM_PW RGD 2
20 PM_DRAM_PW RGD
1

4 SM_DRAMPW ROK_R 1 2 SM_DRAMPW ROK


EC_PW ROK 1 R27 130_4
20,38 EC_PW ROK
74AHC1G09GW Quanta Computer Inc.
3

PROJECT : R08
Size Document Number Rev
1A
Ivy Bridge 2/5
Date: Monday, February 13, 2012 Sheet 7 of 55
5 4 3 2 1
5 4 3 2 1

Ivy Bridge Processor (DDR3)


http://laptopblue.vn
U1D
U1C

AE2 M_B_CLKP0
12 M_B_DQ[63..0] SB_CLK[0] M_B_CLKP0 12
D AB6 M_A_CLKP0 AD2 M_B_CLKN0 D
SA_CLK[0] M_A_CLKP0 11 SB_CLK#[0] M_B_CLKN0 12
AA6 M_A_CLKN0 M_B_DQ0 C9 R9 M_B_CKE0
11 M_A_DQ[63..0] SA_CLK#[0] M_A_CLKN0 11 SB_DQ[0] SB_CKE[0] M_B_CKE0 12
M_A_DQ0 C5 V9 M_A_CKE0 M_B_DQ1 A7
SA_DQ[0] SA_CKE[0] M_A_CKE0 11 SB_DQ[1]
M_A_DQ1 D5 M_B_DQ2 D10
M_A_DQ2 SA_DQ[1] M_B_DQ3 SB_DQ[2]
D3 SA_DQ[2] C8 SB_DQ[3]
M_A_DQ3 D2 M_B_DQ4 A9 AE1 M_B_CLKP1
SA_DQ[3] SB_DQ[4] SB_CLK[1] M_B_CLKP1 12
M_A_DQ4 D6 AA5 M_A_CLKP1 M_B_DQ5 A8 AD1 M_B_CLKN1
SA_DQ[4] SA_CLK[1] M_A_CLKP1 11 SB_DQ[5] SB_CLK#[1] M_B_CLKN1 12
M_A_DQ5 C6 AB5 M_A_CLKN1 M_B_DQ6 D9 R10 M_B_CKE1
SA_DQ[5] SA_CLK#[1] M_A_CLKN1 11 SB_DQ[6] SB_CKE[1] M_B_CKE1 12
M_A_DQ6 C2 V10 M_A_CKE1 M_B_DQ7 D8
SA_DQ[6] SA_CKE[1] M_A_CKE1 11 SB_DQ[7]
M_A_DQ7 C3 M_B_DQ8 G4
M_A_DQ8 SA_DQ[7] M_B_DQ9 SB_DQ[8]
F10 SA_DQ[8] F4 SB_DQ[9]
M_A_DQ9 F8 M_B_DQ10 F1 AB2
M_A_DQ10 SA_DQ[9] M_B_DQ11 SB_DQ[10] SB_CLK[2]
G10 SA_DQ[10] SA_CLK[2] AB4 G1 SB_DQ[11] SB_CLK#[2] AA2
M_A_DQ11 G9 AA4 M_B_DQ12 G5 T9
M_A_DQ12 SA_DQ[11] SA_CLK#[2] M_B_DQ13 SB_DQ[12] SB_CKE[2]
F9 SA_DQ[12] SA_CKE[2] W9 F5 SB_DQ[13]
M_A_DQ13 F7 M_B_DQ14 F2
M_A_DQ14 SA_DQ[13] M_B_DQ15 SB_DQ[14]
G8 SA_DQ[14] G2 SB_DQ[15]
M_A_DQ15 G7 M_B_DQ16 J7 AA1
M_A_DQ16 SA_DQ[15] M_B_DQ17 SB_DQ[16] SB_CLK[3]
K4 SA_DQ[16] SA_CLK[3] AB3 J8 SB_DQ[17] SB_CLK#[3] AB1
M_A_DQ17 K5 AA3 M_B_DQ18 K10 T10
M_A_DQ18 SA_DQ[17] SA_CLK#[3] M_B_DQ19 SB_DQ[18] SB_CKE[3]
K1 SA_DQ[18] SA_CKE[3] W10 K9 SB_DQ[19]
M_A_DQ19 J1 M_B_DQ20 J9
M_A_DQ20 SA_DQ[19] M_B_DQ21 SB_DQ[20]
J5 SA_DQ[20] J10 SB_DQ[21]
M_A_DQ21 J4 M_B_DQ22 K8 AD3 M_B_CS#0
SA_DQ[21] SB_DQ[22] SB_CS#[0] M_B_CS#0 12
M_A_DQ22 J2 AK3 M_A_CS#0 M_B_DQ23 K7 AE3 M_B_CS#1
SA_DQ[22] SA_CS#[0] M_A_CS#0 11 SB_DQ[23] SB_CS#[1] M_B_CS#1 12
M_A_DQ23 K2 AL3 M_A_CS#1 M_B_DQ24 M5 AD6
SA_DQ[23] SA_CS#[1] M_A_CS#1 11 SB_DQ[24] SB_CS#[2]
M_A_DQ24 M8 AG1 M_B_DQ25 N4 AE6
M_A_DQ25 SA_DQ[24] SA_CS#[2] M_B_DQ26 SB_DQ[25] SB_CS#[3]
N10 SA_DQ[25] SA_CS#[3] AH1 N2 SB_DQ[26]
M_A_DQ26 N8 M_B_DQ27 N1
C M_A_DQ27 SA_DQ[26] M_B_DQ28 SB_DQ[27] C
N7 SA_DQ[27] M4 SB_DQ[28]
M_A_DQ28 M10 M_B_DQ29 N5 AE4 M_B_ODT0
SA_DQ[28] SB_DQ[29] SB_ODT[0] M_B_ODT0 12

DDR SYSTEM MEMORY B


M_A_DQ29 M9 AH3 M_A_ODT0 M_B_DQ30 M2 AD4 M_B_ODT1
SA_DQ[29] SA_ODT[0] M_A_ODT0 11 SB_DQ[30] SB_ODT[1] M_B_ODT1 12
M_A_DQ30 N9 AG3 M_A_ODT1 M_B_DQ31 M1 AD5
DDR SYSTEM MEMORY A
SA_DQ[30] SA_ODT[1] M_A_ODT1 11 SB_DQ[31] SB_ODT[2]
M_A_DQ31 M7 AG2 M_B_DQ32 AM5 AE5
M_A_DQ32 SA_DQ[31] SA_ODT[2] M_B_DQ33 SB_DQ[32] SB_ODT[3]
AG6 SA_DQ[32] SA_ODT[3] AH2 AM6 SB_DQ[33]
M_A_DQ33 AG5 M_B_DQ34 AR3
M_A_DQ34 SA_DQ[33] M_B_DQ35 SB_DQ[34]
AK6 SA_DQ[34] AP3 SB_DQ[35]
M_A_DQ35 AK5 M_B_DQ36 AN3
M_A_DQ36 SA_DQ[35] M_B_DQ37 SB_DQ[36] M_B_DQSN0 M_B_DQSN[7..0] 12
AH5 SA_DQ[36] M_A_DQSN[7..0] 11 AN2 SB_DQ[37] SB_DQS#[0] D7
M_A_DQ37 AH6 C4 M_A_DQSN0 M_B_DQ38 AN1 F3 M_B_DQSN1
M_A_DQ38 SA_DQ[37] SA_DQS#[0] M_A_DQSN1 M_B_DQ39 SB_DQ[38] SB_DQS#[1] M_B_DQSN2
AJ5 SA_DQ[38] SA_DQS#[1] G6 AP2 SB_DQ[39] SB_DQS#[2] K6
M_A_DQ39 AJ6 J3 M_A_DQSN2 M_B_DQ40 AP5 N3 M_B_DQSN3
M_A_DQ40 SA_DQ[39] SA_DQS#[2] M_A_DQSN3 M_B_DQ41 SB_DQ[40] SB_DQS#[3] M_B_DQSN4
AJ8 SA_DQ[40] SA_DQS#[3] M6 AN9 SB_DQ[41] SB_DQS#[4] AN5
M_A_DQ41 AK8 AL6 M_A_DQSN4 M_B_DQ42 AT5 AP9 M_B_DQSN5
M_A_DQ42 SA_DQ[41] SA_DQS#[4] M_A_DQSN5 M_B_DQ43 SB_DQ[42] SB_DQS#[5] M_B_DQSN6
AJ9 SA_DQ[42] SA_DQS#[5] AM8 AT6 SB_DQ[43] SB_DQS#[6] AK12
M_A_DQ43 AK9 AR12 M_A_DQSN6 M_B_DQ44 AP6 AP15 M_B_DQSN7
M_A_DQ44 SA_DQ[43] SA_DQS#[6] M_A_DQSN7 M_B_DQ45 SB_DQ[44] SB_DQS#[7]
AH8 SA_DQ[44] SA_DQS#[7] AM15 AN8 SB_DQ[45]
M_A_DQ45 AH9 M_B_DQ46 AR6
M_A_DQ46 SA_DQ[45] M_B_DQ47 SB_DQ[46]
AL9 SA_DQ[46] AR5 SB_DQ[47]
M_A_DQ47 AL8 M_B_DQ48 AR9
M_A_DQ48 SA_DQ[47] M_B_DQ49 SB_DQ[48] M_B_DQSP0 M_B_DQSP[7..0] 12
AP11 SA_DQ[48] M_A_DQSP[7..0] 11 AJ11 SB_DQ[49] SB_DQS[0] C7
M_A_DQ49 AN11 D4 M_A_DQSP0 M_B_DQ50 AT8 G3 M_B_DQSP1
M_A_DQ50 SA_DQ[49] SA_DQS[0] M_A_DQSP1 M_B_DQ51 SB_DQ[50] SB_DQS[1] M_B_DQSP2
AL12 SA_DQ[50] SA_DQS[1] F6 AT9 SB_DQ[51] SB_DQS[2] J6
M_A_DQ51 AM12 K3 M_A_DQSP2 M_B_DQ52 AH11 M3 M_B_DQSP3
M_A_DQ52 SA_DQ[51] SA_DQS[2] M_A_DQSP3 M_B_DQ53 SB_DQ[52] SB_DQS[3] M_B_DQSP4
AM11 SA_DQ[52] SA_DQS[3] N6 AR8 SB_DQ[53] SB_DQS[4] AN6
M_A_DQ53 AL11 AL5 M_A_DQSP4 M_B_DQ54 AJ12 AP8 M_B_DQSP5
M_A_DQ54 SA_DQ[53] SA_DQS[4] M_A_DQSP5 M_B_DQ55 SB_DQ[54] SB_DQS[5] M_B_DQSP6
AP12 SA_DQ[54] SA_DQS[5] AM9 AH12 SB_DQ[55] SB_DQS[6] AK11
M_A_DQ55 AN12 AR11 M_A_DQSP6 M_B_DQ56 AT11 AP14 M_B_DQSP7
B M_A_DQ56 SA_DQ[55] SA_DQS[6] M_A_DQSP7 M_B_DQ57 SB_DQ[56] SB_DQS[7] B
AJ14 SA_DQ[56] SA_DQS[7] AM14 AN14 SB_DQ[57]
M_A_DQ57 AH14 M_B_DQ58 AR14
M_A_DQ58 SA_DQ[57] M_B_DQ59 SB_DQ[58]
AL15 SA_DQ[58] AT14 SB_DQ[59]
M_A_DQ59 AK15 M_B_DQ60 AT12
SA_DQ[59] SB_DQ[60] M_B_A[15..0] 12
M_A_DQ60 AL14 M_B_DQ61 AN15 AA8 M_B_A0
SA_DQ[60] M_A_A[15..0] 11 SB_DQ[61] SB_MA[0]
M_A_DQ61 AK14 AD10 M_A_A0 M_B_DQ62 AR15 T7 M_B_A1
M_A_DQ62 SA_DQ[61] SA_MA[0] M_A_A1 M_B_DQ63 SB_DQ[62] SB_MA[1] M_B_A2
AJ15 SA_DQ[62] SA_MA[1] W1 AT15 SB_DQ[63] SB_MA[2] R7
M_A_DQ63 AH15 W2 M_A_A2 T6 M_B_A3
SA_DQ[63] SA_MA[2] M_A_A3 SB_MA[3] M_B_A4
SA_MA[3] W7 SB_MA[4] T2
V3 M_A_A4 T4 M_B_A5
SA_MA[4] M_A_A5 SB_MA[5] M_B_A6
SA_MA[5] V2 SB_MA[6] T3
W3 M_A_A6 M_B_BS0 AA9 R2 M_B_A7
SA_MA[6] 12 M_B_BS0 SB_BS[0] SB_MA[7]
M_A_BS0 AE10 W6 M_A_A7 M_B_BS1 AA7 T5 M_B_A8
11 M_A_BS0 SA_BS[0] SA_MA[7] 12 M_B_BS1 SB_BS[1] SB_MA[8]
M_A_BS1 AF10 V1 M_A_A8 M_B_BS2 R6 R3 M_B_A9
11 M_A_BS1 SA_BS[1] SA_MA[8] 12 M_B_BS2 SB_BS[2] SB_MA[9]
M_A_BS2 V6 W5 M_A_A9 AB7 M_B_A10
11 M_A_BS2 SA_BS[2] SA_MA[9] SB_MA[10]
AD8 M_A_A10 R1 M_B_A11
SA_MA[10] M_A_A11 SB_MA[11] M_B_A12
SA_MA[11] V4 SB_MA[12] T1
W4 M_A_A12 M_B_CAS# AA10 AB10 M_B_A13
SA_MA[12] 12 M_B_CAS# SB_CAS# SB_MA[13]
M_A_CAS# AE8 AF8 M_A_A13 M_B_RAS# AB8 R5 M_B_A14
11 M_A_CAS# SA_CAS# SA_MA[13] 12 M_B_RAS# SB_RAS# SB_MA[14]
M_A_RAS# AD9 V5 M_A_A14 M_B_W E# AB9 R4 M_B_A15
11 M_A_RAS# SA_RAS# SA_MA[14] 12 M_B_W E# SB_WE# SB_MA[15]
M_A_W E# AF9 V7 M_A_A15
11 M_A_W E# SA_WE# SA_MA[15]

Ivy Bridge_rPGA_2DPC_Rev0p61
Ivy Bridge_rPGA_2DPC_Rev0p61

A A

Quanta Computer Inc.


PROJECT : R08
Size Document Number Rev
1A
Ivy Bridge 3/5
Date: Monday, February 13, 2012 Sheet 8 of 55
5 4 3 2 1
5 4 3 2 1

Ivy Bridge Processor (GRAPHIC POWER)


Ivy Bridge Processor
CPU Core Power
SNB: 53A
http://laptopblue.vn
POWER
1.05V_PCH
SNB: 8.5A
IVY: 8.5A
CPU VGT
SNB: 21.5A
IVY: 33A
10uF x 12 U1G 1 2 +VCC_GFX_CORE
10F x12 R28 100_4
IVY: 53A
POWER

SENSE
LINES
10uF x 24 U1F AT24 AK35 VCC_AXG_SENSE
+VCC_GFX_CORE VAXG1 VAXG_SENSE VCC_AXG_SENSE 52
+VCC_CORE AT23 AK34 VSS_AXG_SENSE
VAXG2 VSSAXG_SENSE VSS_AXG_SENSE 52
AT21
VAXG3
AT20 1 2
VAXG4 R29 100_4
+1.05V_PCH AT18
C37 C35 C38 C50 VAXG5
AG35 AT17
VCC1 VAXG6
AG34 AH13 AR24
VCC2 VCCIO1 VAXG7
1

1
10U/6.3V_8 10U/6.3V_8 AG33 AH10 AR23
D VCC3 VCCIO2 VAXG8 D
AG32 AG10 AR21
10U/6.3V_6 10U/6.3V_8 VCC4 VCCIO3 VAXG9
AG31 AC10 AR20
2

2
VCC5 VCCIO4 VAXG10 +VDDR_REF_CPU
AG30 Y10 AR18 AL1 +VDDR_REF_CPU
VCC6 VCCIO5 C39 C40 C41 C42 VAXG11 SM_VREF
AG29 U10 AR17

VREF
VCC7 VCCIO6 VAXG12
AG28
VCC8 VCCIO7
P10 AP24
VAXG13
CAD Note: +VDDR_REF_CPU should

1
AG27 L10 AP23 have 10 mil trace width
VCC9 VCCIO8 C45 C52 C46 C47 C48 C49 VAXG14
AG26 J14 AP21
C51 C43 C44 C36 VCC10 VCCIO9 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 22U/6.3V_8 VAXG15 SMDDR_VREF_DQ0_M3_C
AF35 J13 AP20 B4

2
VCC11 VCCIO10 VAXG16 SA_DIMM_VREFDQ

1
AF34 J12 10U/6.3V_6 22U/6.3V_8 10U/6.3V_6 AP18 D1 SMDDR_VREF_DQ1_M3_C
VCC12 VCCIO11 VAXG17 SB_DIMM_VREFDQ
1

10U/6.3V_8 10U/6.3V_8 AF33 J11 AP17


VCC13 VCCIO12 VAXG18

2
AF32 H14 AN24
CPU MCH

2
10U/6.3V_6 10U/6.3V_8 VCC14 VCCIO13 10U/6.3V_8 10U/6.3V_8 *10U/6.3V_8_NC C53 C54 C55 C56 VAXG19
AF31 H12 AN23
2

VCC15 VCCIO14 22U/6.3V_8 VAXG20 R30 R31


AF30 H11 AN21
VCC16 VCCIO15 VAXG21

1
AF29 G14 AN20 *1K_4_NC *1K_4_NC SNB: 5A

DDR3 -1.5V RAILS


VCC17 VCCIO16 VAXG22
AF28 G13 AN18

1
PEG AND DDR
VCC18 VCCIO17 VAXG23 IVY: 5A
AF27 G12 AN17

GRAPHICS
VCC19 VCCIO18 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 VAXG24
AF26
VCC20 VCCIO19
F14 AM24
VAXG25 VDDQ1
AF7 10uF x 6
AD35 F13 AM23 AF4
C57 C58 C59 C60 VCC21 VCCIO20 C61 C62 C63 C64 C65 C66 VAXG26 VDDQ2
AD34 F12 AM21 AF1
VCC22 VCCIO21 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 C67 C68 C69 C70 VAXG27 VDDQ3 C71 C72 C73 C74
AD33 F11 AM20 AC7 +1.5V_CPU
VCC23 VCCIO22 VAXG28 VDDQ4
1

1
10U/6.3V_8 10U/6.3V_8 AD32 E14 AM18 AC4
VCC24 VCCIO23 VAXG29 VDDQ5

1
AD31 E12 AM17 AC1
10U/6.3V_8 10U/6.3V_8 VCC25 VCCIO24 VAXG30 VDDQ6
AD30 AL24 Y7
2

2
VCC26 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 VAXG31 VDDQ7 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
AD29 E11 AL23 Y4

2
VCC27 VCCIO25 10U/6.3V_6 10U/6.3V_6 22U/6.3V_8 VAXG32 VDDQ8
AD28 D14 AL21 Y1
VCC28 VCCIO26 22U/6.3V_8 VAXG33 VDDQ9
AD27 D13 AL20 U7
VCC29 VCCIO27 VAXG34 VDDQ10
AD26 D12 AL18 U4
VCC30 VCCIO28 VAXG35 VDDQ11 C79 C80
AC35 D11 AL17 U1
C75 C76 C77 C78 VCC31 VCCIO29 VAXG36 VDDQ12
AC34 C14 AK24 P7
VCC32 VCCIO30 VAXG37 VDDQ13

1
AC33 C13 AK23 P4
VCC33 VCCIO31 VAXG38 VDDQ14
1

10U/6.3V_8 10U/6.3V_8 AC32 C12 AK21 P1


VCC34 VCCIO32 VAXG39 VDDQ15 10U/6.3V_6 10U/6.3V_6
AC31 C11 AK20

2
10U/6.3V_8 10U/6.3V_8 VCC35 VCCIO33 VAXG40
AC30 B14 AK18
2

VCC36 VCCIO34 VAXG41


AC29 B12 AK17
VCC37 VCCIO35 VAXG42
AC28 A14 AJ24
AC27
VCC38 VCCIO36
A13 AJ23
VAXG43 CPU SA
VCC39 VCCIO37 VAXG44
AC26
VCC40 VCCIO38
A12 AJ21
VAXG45 SNB: 6A
C AA35 A11 AJ20 C
VCC41 VCCIO39 VAXG46 IVY: 6A
AA34
VCC42
AJ18
VAXG47 10uF x 3
C81 C82 C83 C84 AA33 J23 AJ17 M27

SA RAIL
VCC43 VCCIO40 VAXG48 VCCSA1 +VCCSA_CORE
AA32 AH24 M26
VCC44 VAXG49 VCCSA2
1

1
10U/6.3V_6 10U/6.3V_6 AA31 AH23 L26
VCC45 VAXG50 VCCSA3 C85 C86 C87
AA30 AH21 J26
10U/6.3V_6 10U/6.3V_6 VCC46 VAXG51 VCCSA4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
AA29 AH20 J25
2

2
VCC47 VAXG52 VCCSA5
AA28 AH18 J24
VCC48 VAXG53 VCCSA6
AA27 AH17 H26
VCC49 VAXG54 VCCSA7
AA26 H25
CORE SUPPLY

VCC50 VCCSA8
Y35
VCC51
Y34
C88 C89 C90 C91 VCC52
Y33
VCC53 +3.3V_RUN
Y32 1 2 +VCCSA_CORE

1.8V RAIL
VCC54
1

10U/6.3V_6 10U/6.3V_6 Y31 R399 100_4


VCC55 VCCSA_SENSE
Y30 H23 VCCSA_SENSE 51
10U/6.3V_6 10U/6.3V_6 VCC56 VCCSA_SENSE
Y29
2

VCC57

1
Y28
VCC58 C92 C93 C94 R32
Y27 +1.8V_RUN B6

MISC
VCC59 VCCPLL1 VCCSA_VID0
Y26 A6 C22 VCCSA_VID0 51 10K_4
VCC60 VCCPLL2 VCCSA_VID[0] VCCSA_VID1
V35 A2 C24
CPU VCCPL
SVID

VCC61 VCCPLL3 VCCSA_VID[1] VCCSA_VID1 51

1
V34 AJ29 H_CPU_SVIDALRT#

2
VCC62 VIDALERT# VR_SVID_CLK
V33
VCC63 VIDSCLK
AJ30
VR_SVID_DATA
SNB: 1.2A
V32 AJ28 10U/6.3V_6 1U/6.3V_4 1U/6.3V_4

2
VCC64 VIDSOUT IVY: 1.2A H_VTTVID1
V31 A19 1 2 H_VTTVID1 50
VCC65 VCCIO_SEL *0_4_NC R33
V30
VCC66 10uF x 1
V29
VCC67 M3 VREF 1uF x 2
V28 Ivy Bridge_rPGA_2DPC_Rev0p61
VCC68 VCCSA_VID0
V27 1 2
VCC69 Q2 R34 1K_4
V26
VCC70 VCCSA_VID1
U35 1 2 +1.05V_PCH
VCC71 SMDDR_VREF_DQ0_M3_C SMDDR_VREF_DQ0_M3 R35 1
U34 1 3 SMDDR_VREF_DQ0_M3 11 2*1K_4_NC
VCC72 R36 1K_4
U33
VCC73 *AP2302GN_NC
U32
VCC74
U31

2
VCC75 DDR_HVREF_RST_PCH
U30 DDR_HVREF_RST_PCH 7,24
VCC76
U29
VCC77

2
U28
B
U27
VCC78
VCC79
S3 Power reduce B

U26 SMDDR_VREF_DQ1_M3_C 1 3 SMDDR_VREF_DQ1_M3


VCC80 SMDDR_VREF_DQ1_M3 12 +1.5V_SUS +1.5V_CPU
R35 +5V_ALW +15V_ALW
R34
VCC81 *AP2302GN_NC 5A
R33
VCC82 Vgs=2.5V Rds=115m
VCC83

1
Q3 Q4
R32
VCC84 R37 AON7410
R31
VCC85 R38
R30 10K_4 8 3
VCC86 100K_4
R29 7 2
SENSE LINES

VCC87
R28 1 2 +VCC_CORE 6 1

2
VCC88 R39 100/F_4 VCCSENSE PS_S3CNTRL
R27 AJ35 VCCSENSE 52 PS_S3CNTRL 11 5
VCC89 VCC_SENSE VSSSENSE
R26 AJ34 VSSSENSE 52
VCC90 VSS_SENSE
P35 1 2

4
VCC91 R40 100/F_4
P34
VCC92 PS_S3CNTRL_S
P33 1 2 +1.05V_PCH
VCC93 R41 10_4 VCCIO_SENSE
P32 B10 VCCIO_SENSE 50
VCC94 VCCIO_SENSE

6
P31 A10 VSSIO_SENSE
VCC95 VSS_SENSE_VCCIO VSSIO_SENSE 50

1
P30 1 2 SIO_SLP_S3# 5 Q5A 2 Q5B
VCC96 20,38,48 SIO_SLP_S3#
P29 R42 10_4 DMN66D0LDW-7 DMN66D0LDW-7 C95
VCC97
P28

2
VCC98
P27
VCC99 *4700P/25V_4_NC
P26
VCC100

Ivy Bridge_rPGA_2DPC_Rev0p61
Take care Q3 Vgs(MAX)=2.5
+1.5V_CPU +VDDR_REF_CPU

2
R43
1K/F_4

1
A A

1
R44 0.1U/16V_4
1K/F_4 C96
Place PU resistor close to CPU
Place PU resistor close to CPU

2
Layout note: need routing

1
+1.05V_PCH +1.05V_PCH
together and ALERT need SVID CLK SVID DATA SVID ALERT
1

between CLK and DATA


R45 R46 Quanta Computer Inc.
130_4 75/F_4
VR_SVID_CLK
PROJECT :R08
2

VR_SVID_CLK 52 VR_SVID_DATA H_CPU_SVIDALRT# VR_SVID_ALERT#


1 2 VR_SVID_ALERT# 52
VR_SVID_DATA 52 Size Document Number Rev
R47 43_4 Ivy Bridge 4/5 1A

Date: Monday, February 13, 2012 Sheet 9 of 55


5 4 3 2 1
5 4 3 2 1

U1H
Ivy Bridge Processor (GND)
http://laptopblue.vn
U1I
Ivy Bridge Processor
U1E
(RESERVED, CFG)
AT35 VSS1 VSS81 AJ22
AT32 VSS2 VSS82 AJ19
AT29 VSS3 VSS83 AJ16 T35 VSS161 VSS234 F22 VCC_DIE_SENSE AH27
AT27 VSS4 VSS84 AJ13 T34 VSS162 VSS235 F19 AK28 CFG[0] VSS_DIE_SENSE AH26
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30 AK29 CFG[1]
AT22 AJ7 T32 E27 CFG2 AL26
VSS6 VSS86 VSS164 VSS237 CFG[2]
AT19 VSS7 VSS87 AJ4 T31 VSS165 VSS238 E24 TP2 AL27 CFG[3]
AT16 VSS8 VSS88 AJ3 T30 VSS166 VSS239 E21 TP5 AK26 CFG[4] RSVD28 L7
D AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18 TP3 AL29 CFG[5] RSVD29 AG7 D
AT10 VSS10 VSS90 AJ1 T28 VSS168 VSS241 E15 TP4 AL30 CFG[6] RSVD30 AE7
AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13 AM31 CFG[7] RSVD31 AK2
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10 AM32 CFG[8]

CFG
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9 AM30 CFG[9] RSVD32 W8
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8 AM28 CFG[10]
AR22 VSS15 VSS95 AH29 P6 VSS173 VSS246 E7 AM26 CFG[11]
AR19 VSS16 VSS96 AH28 P5 VSS174 VSS247 E6 AN28 CFG[12] RSVD33 AT26
AR16 VSS17 VSS98 AH25 P3 VSS175 VSS248 E5 AN31 CFG[13] RSVD34 AM33
AR13 VSS18 VSS99 AH22 P2 VSS176 VSS249 E4 AN26 CFG[14] RSVD35 AJ27
AR10 VSS19 VSS100 AH19 N35 VSS177 VSS250 E3 AM27 CFG[15]
AR7 VSS20 VSS101 AH16 N34 VSS178 VSS251 E2 AK31 CFG[16]
AR4 VSS21 VSS102 AH7 N33 VSS179 VSS252 E1 AN29 CFG[17]
AR2 VSS22 VSS103 AH4 N32 VSS180 VSS253 D35
AP34 VSS23 VSS104 AG9 N31 VSS181 VSS254 D32
AP31 VSS24 VSS105 AG8 N30 VSS182 VSS255 D29 RSVD37 T8
AP28 VSS25 VSS106 AG4 N29 VSS183 VSS256 D26 RSVD38 J16
AP25 VSS26 VSS107 AF6 N28 VSS184 VSS257 D20 AJ31 VAXG_VAL_SENSE RSVD39 H16
AP22 VSS27 VSS108 AF5 N27 VSS185 VSS258 D17 AH31 VSSAXG_VAL_SENSE RSVD40 G16
AP19 VSS28 VSS109 AF3 N26 VSS186 VSS259 C34 AJ33 VCC_VAL_SENSE
AP16 VSS29 VSS110 AF2 M34 VSS187 VSS260 C31 AH33 VSS_VAL_SENSE
AP13 VSS30 VSS111 AE35 L33 VSS188 VSS261 C28
AP10 VSS31 VSS112 AE34 L30 VSS189 VSS262 C27
AP7 VSS32 VSS113 AE33 L27 VSS190 VSS263 C25 AJ26 RSVD5 RSVD41 AR35

RESERVED
AP4 VSS33 VSS114 AE32 L9 VSS191 VSS264 C23 RSVD42 AT34
AP1 VSS34 VSS115 AE31 L8 VSS192 VSS265 C10 RSVD43 AT33
AN30 VSS35 VSS116 AE30 L6 VSS193 VSS266 C1 RSVD44 AP35
AN27 VSS36 VSS117 AE29 L5 VSS194 VSS267 B22 RSVD45 AR34
AN25 AE28 L4 B19
C AN22
AN19
VSS37
VSS38
VSS39
VSS VSS118
VSS119
VSS120
AE27
AE26
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15 F25 RSVD8
C

AN16 VSS40 VSS121 AE9 L1 VSS198 VSS271 B13 F24 RSVD9


AN13 VSS41 VSS122 AD7 K35 VSS199 VSS272 B11 F23 RSVD10
AN10 VSS42 VSS123 AC9 K32 VSS200 VSS273 B9 D24 RSVD11 RSVD46 B34
AN7 VSS43 VSS124 AC8 K29 VSS201 VSS274 B8 G25 RSVD12 RSVD47 A33
AN4 VSS44 VSS125 AC6 K26 VSS202 VSS275 B7 G24 RSVD13 RSVD48 A34
AM29 VSS45 VSS126 AC5 J34 VSS203 VSS276 B5 E23 RSVD14 RSVD49 B35
AM25 VSS46 VSS127 AC3 J31 VSS204 VSS277 B3 D23 RSVD15 RSVD50 C35
AM22 VSS47 VSS128 AC2 H33 VSS205 VSS278 B2 C30 RSVD16
AM19 VSS48 VSS129 AB35 H30 VSS206 VSS279 A35 A31 RSVD17
AM16 VSS49 VSS130 AB34 H27 VSS207 VSS280 A32 B30 RSVD18
AM13 VSS50 VSS131 AB33 H24 VSS208 VSS281 A29 B29 RSVD19
AM10 VSS51 VSS132 AB32 H21 VSS209 VSS282 A26 D30 RSVD20 RSVD51 AJ32
AM7 VSS52 VSS133 AB31 H18 VSS210 VSS283 A23 B31 RSVD21 RSVD52 AK32
AM4 VSS53 VSS134 AB30 H15 VSS211 VSS284 A20 A30 RSVD22
AM3 VSS54 VSS135 AB29 H13 VSS212 VSS285 A3 C29 RSVD23 #27636 SNB EDS0.7v1 no function.
AM2 VSS55 VSS136 AB28 H10 VSS213
AM1 VSS56 VSS137 AB27 H9 VSS214 BCLK_ITP AN35
AL34 VSS57 VSS138 AB26 H8 VSS215 J20 RSVD24 BCLK_ITP# AM35
AL31 VSS58 VSS139 Y9 H7 VSS216 B18 RSVD25
AL28 VSS59 VSS140 Y8 H6 VSS217
AL25 VSS60 VSS141 Y6 H5 VSS218
AL22 VSS61 VSS142 Y5 H4 VSS219
AL19 VSS62 VSS143 Y3 H3 VSS220 J15 RSVD27 RSVD56 AT2
AL16 VSS63 VSS144 Y2 H2 VSS221 RSVD57 AT1
AL13 VSS64 VSS145 W35 H1 VSS222 RSVD58 AR1
AL10 VSS65 VSS146 W34 G35 VSS223
AL7 VSS66 VSS147 W33 G32 VSS224
B B
AL4 VSS67 VSS148 W32 G29 VSS225
AL2 VSS68 VSS149 W31 G26 VSS226 KEY B1
AK33 VSS69 VSS150 W30 G23 VSS227
AK30 VSS70 VSS151 W29 G20 VSS228
AK27 VSS71 VSS152 W28 G17 VSS229
AK25 VSS72 VSS153 W27 G11 VSS230
AK22 VSS73 VSS154 W26 F34 VSS231
AK19 U9 F31 Ivy Bridge_rPGA_2DPC_Rev0p61
VSS74 VSS155 VSS232
AK16 VSS75 VSS156 U8 F29 VSS233 For rPGA socket, RSVD59 pin should be left NC
AK13 VSS76 VSS157 U6
AK10 VSS77 VSS158 U5
AK7 VSS78 VSS159 U3
AK4 VSS79 VSS160 U2
AJ25 VSS80 CFG[6:5] (PCIE Port Bifurcation Straps)
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
Ivy Bridge_rPGA_2DPC_Rev0p61 Ivy Bridge_rPGA_2DPC_Rev0p61 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

The CFG signals have a default value of '1' if not terminated on the board.
Processor Strapping CFG2 2 1
R48 1K_4
1 0
A A
CFG2
(PEG Static Lane Reversal) Normal Operation Lane Reversed

CFG4
Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP
(DP Presence Strap) Quanta Computer Inc.
CFG7 PEG train immediately following PEG wait for BIOS training
PROJECT : R08
Size Document Number Rev
(PEG Defer Training) xxRESETB de assertion Ivy Bridge 5/5 1A

Date: Monday, February 13, 2012 Sheet 10 of 55


5 4 3 2 1
1 2 3 4 5 6 7 8

http://laptopblue.vn +1.5V_SUS

8 M_A_A[15..0]
M_A_A0
M_A_A1
M_A_A2
98
97
96
JDIM1A

A0
A1
12
DQ0
DQ1
5
7
15
M_A_DQ12
M_A_DQ11
M_A_DQ9
M_A_DQ[63..0] 8
H=8mm,RVS 75
76
JDIM1B

VDD1 VSS16
12
44
48
M_A_A3 A2 DQ2 M_A_DQ14 VDD2 VSS17
95 A3 DQ3 17 81 VDD3 VSS18 49
M_A_A4 92 4 M_A_DQ8 82 54
M_A_A5 A4 DQ4 M_A_DQ10 VDD4 VSS19
91 A5 DQ5 6 87 VDD5 VSS20 55
M_A_A6 90 16 M_A_DQ15 88 60
M_A_A7 A6 DQ6 M_A_DQ13 VDD6 VSS21
86 A7 DQ7 18 93 VDD7 VSS22 61
A M_A_A8 89 21 M_A_DQ4 94 65 A
M_A_A9 A8 DQ8 M_A_DQ5 VDD8 VSS23
85 A9 DQ9 23 99 VDD9 VSS24 66
M_A_A10 107 33 M_A_DQ3 100 71
M_A_A11 A10/AP DQ10 M_A_DQ6 VDD10 VSS25
84 A11 DQ11 35 105 VDD11 VSS26 72
M_A_A12 83 22 M_A_DQ0 106 127
A12/BC# DQ12 +3.3V_RUN VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


SO-DIMMA SPD Address is 0XA0 M_A_A13 119 A13 DQ13 24 M_A_DQ1 111 VDD13 VSS28 128
SO-DIMMA TS Address is 0X30 M_A_A14 80 34 M_A_DQ7 112 133
M_A_A15 A14 DQ14 M_A_DQ2 VDD14 VSS29
78 A15 DQ15 36 117 VDD15 VSS30 134
39 M_A_DQ20 118 138
DQ16 VDD16 VSS31

1
PC2100 DDR3 SDRAM SO-DIMM
M_A_BS0 109 41 M_A_DQ17 123 139
8 M_A_BS0 BA0 DQ17 VDD17 VSS32
M_A_BS1 108 51 M_A_DQ19 C97 124 144
8 M_A_BS1 BA1 DQ18 VDD18 VSS33
M_A_BS2 79 53 M_A_DQ18 0.1U/16V_4 145
8 M_A_BS2

2
M_A_CS#0 BA2 DQ19 M_A_DQ16 VSS34
8 M_A_CS#0 114 S0# DQ20 40 199 VDDSPD VSS35 150
M_A_CS#1 121 42 M_A_DQ21 151
8 M_A_CS#1 S1# DQ21 VSS36
M_A_CLKP0 101 50 M_A_DQ22 77 155
8 M_A_CLKP0 CK0 DQ22 NC1 VSS37
M_A_CLKN0 103 52 M_A_DQ23 122 156
8 M_A_CLKN0 CK0# DQ23 NC2 VSS38
M_A_CLKP1 102 57 M_A_DQ29 125 161
8 M_A_CLKP1 CK1 DQ24 NCTEST VSS39
M_A_CLKN1 104 59 M_A_DQ25 162
8 M_A_CLKN1 CK1# DQ25 VSS40
M_A_CKE0 73 67 M_A_DQ30 +3.3V_RUN R49 1 2 *10K_4_NC 198 167
8 M_A_CKE0 CKE0 DQ26 EVENT# VSS41
M_A_CKE1 74 69 M_A_DQ26 DDR3_DRAMRST# 30 168
8 M_A_CKE1 CKE1 DQ27 7,12 DDR3_DRAMRST# RESET# VSS42
M_A_CAS# 115 56 M_A_DQ28 172
8 M_A_CAS# CAS# DQ28 VSS43
M_A_RAS# 110 58 M_A_DQ24 173
8 M_A_RAS# RAS# DQ29 VSS44
RP2 10KX2 M_A_W E# 113 68 M_A_DQ27 +SMDDR_VREF_DQ0 1 178
8 M_A_W E# WE# DQ30 VREF_DQ VSS45
1 2 DIMM0_SA0 197 70 M_A_DQ31 +SMDDR_VREF_DIMM0 126 179
DIMM0_SA1 SA0 DQ31 M_A_DQ33 VREF_CA VSS46
3 4 201 SA1 DQ32 129 VSS47 184
W LAN_SCLK 202 131 M_A_DQ32 185
12,24,33 W LAN_SCLK W LAN_SDATA SCL DQ33 M_A_DQ35 VSS48
12,24,33 W LAN_SDATA 200 SDA DQ34 141 2 VSS1 VSS49 189
143 M_A_DQ38 3 190
M_A_ODT0 DQ35 M_A_DQ37 VSS2 VSS50
8 M_A_ODT0 116 ODT0 DQ36 130 8 VSS3 VSS51 195
B M_A_ODT1 M_A_DQ36 B

(204P)
8 M_A_ODT1 120 ODT1 DQ37 132 9 VSS4 VSS52 196
140 M_A_DQ34 13
DQ38 M_A_DQ39 VSS5
11 142 14
28
DM0 DQ39
147 M_A_DQ44 S3 Power reduce 19
VSS6
DM1 DQ40 M_A_DQ45 VSS7
46 DM2 DQ41 149 20 VSS8
M_A_DQ43
63
136
DM3
DM4
(204P) DQ42
DQ43
157
159 M_A_DQ42 +0.75V_DDR_VTT
25
26
VSS9
VSS10 VTT1 203 +0.75V_DDR_VTT
153 146 M_A_DQ41 31 204
DM5 DQ44 M_A_DQ40 VSS11 VTT2
170 DM6 DQ45 148 32 VSS12
187 158 M_A_DQ47 37
DM7 DQ46 M_A_DQ46 VSS13
8 M_A_DQSP[7..0] DQ47 160 38 VSS14

2
M_A_DQSP1 12 163 M_A_DQ49 R50 43

GND

GND
M_A_DQSP0 DQS0 DQ48 M_A_DQ48 22_4 VSS15
29 DQS1 DQ49 165
M_A_DQSP2 47 175 M_A_DQ54
M_A_DQSP3 DQS2 DQ50 M_A_DQ55 DDR3-DIMM0
64 177

205

206
M_A_DQSP4 DQS3 DQ51 M_A_DQ53
137 164

1
M_A_DQSP5 DQS4 DQ52 M_A_DQ52
154 DQS5 DQ53 166
M_A_DQSP6 171 174 M_A_DQ50
M_A_DQSP7 DQS6 DQ54 M_A_DQ51
8 M_A_DQSN[7..0] 188 DQS7 DQ55 176
M_A_DQSN1 10 181 M_A_DQ60 Q7
DQS#0 DQ56

3
M_A_DQSN0 27 183 M_A_DQ61
M_A_DQSN2 DQS#1 DQ57 M_A_DQ62 PS_S3CNTRL
45 DQS#2 DQ58 191 2 PS_S3CNTRL 9
M_A_DQSN3 62 193 M_A_DQ63
M_A_DQSN4 DQS#3 DQ59 M_A_DQ56
135 180

1
M_A_DQSN5 DQS#4 DQ60 M_A_DQ57 2N7002W
152 DQS#5 DQ61 182
M_A_DQSN6 169 192 M_A_DQ59
M_A_DQSN7 DQS#6 DQ62 M_A_DQ58
186 DQS#7 DQ63 194

C DDR3-DIMM0 C

Place these Caps near So-Dimm0.


+1.5V_SUS +0.75V_DDR_VTT

C101 C102 C103 C104 C105 C106


1

C98 C99 C100 C107 C108 EC829 EC830

0.1U/16V_4 0.1U/16V_4 10U/6.3V_8 10U/6.3V_8 1U/6.3V_4 *1U/6.3V_4_NC


M1 VREF
2

0.1U/16V_4 0.1U/16V_4 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 1U/6.3V_4 *1U/6.3V_4_NC

+1.5V_SUS +1.5V_SUS
+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM0
2

2
R51 R52
1K/F_4 1K/F_4
1

1
20120213
SMDDR_VREF_DQ0_M3 R53 1 2 *0_4_NC Change C110 C112 to 1U
9 SMDDR_VREF_DQ0_M3
1

1
C111 C112
M3 VREF
1

R54 C109 C110 R55


1K/F_4 1K/F_4

2
1U/10V_6
2

D D
1U/10V_6
2

0.1U/16V_4 0.1U/16V_4

Quanta Computer Inc.


PROJECT : R08
Size Document Number Rev
1A
DDR3 DIMM-0
Date: Monday, February 13, 2012 Sheet 11 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

8 M_B_A[15..0]
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JDIM2A M_B_DQ[63..0] 8 +1.5V_SUS
M_B_A0 98 5 M_B_DQ4
M_B_A1 A0 DQ0 M_B_DQ5
97 A1 DQ1 7 JDIM2B

H=4mm,RVS
M_B_A2 96 15 M_B_DQ3
M_B_A3 A2 DQ2 M_B_DQ7
95 A3 DQ3 17 75 VDD1 VSS16 44
M_B_A4 92 4 M_B_DQ0 76 48
M_B_A5 A4 DQ4 M_B_DQ1 VDD2 VSS17
91 A5 DQ5 6 81 VDD3 VSS18 49
M_B_A6 90 16 M_B_DQ6 82 54
M_B_A7 A6 DQ6 M_B_DQ2 VDD4 VSS19
86 A7 DQ7 18 87 VDD5 VSS20 55
A M_B_A8 89 21 M_B_DQ8 88 60 A
M_B_A9 A8 DQ8 M_B_DQ9 VDD6 VSS21
85 A9 DQ9 23 93 VDD7 VSS22 61
M_B_A10 107 33 M_B_DQ15 94 65
M_B_A11 A10/AP DQ10 M_B_DQ14 VDD8 VSS23
84 A11 DQ11 35 99 VDD9 VSS24 66
M_B_A12 83 22 M_B_DQ12 100 71
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD10 VSS25
119 A13 DQ13 24 105 VDD11 VSS26 72
M_B_A14 80 34 M_B_DQ10 +3.3V_RUN 106 127
A14 DQ14 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


M_B_A15 78 36 M_B_DQ11 111 128
A15 DQ15 M_B_DQ17 VDD13 VSS28
DQ16 39 112 VDD14 VSS29 133

PC2100 DDR3 SDRAM SO-DIMM


M_B_BS0 109 41 M_B_DQ21 117 134
8 M_B_BS0 BA0 DQ17 VDD15 VSS30
M_B_BS1 108 51 M_B_DQ19 118 138
8 M_B_BS1 BA1 DQ18 VDD16 VSS31
M_B_BS2 79 53 M_B_DQ23 123 139
8 M_B_BS2 BA2 DQ19 VDD17 VSS32

1
M_B_CS#0 114 40 M_B_DQ16 124 144
8 M_B_CS#0 S0# DQ20 VDD18 VSS33
M_B_CS#1 121 42 M_B_DQ20 C113 145
8 M_B_CS#1 S1# DQ21 VSS34
M_B_CLKP0 101 50 M_B_DQ18 0.1U/16V_4 199 150
8 M_B_CLKP0

2
M_B_CLKN0 CK0 DQ22 M_B_DQ22 VDDSPD VSS35
8 M_B_CLKN0 103 CK0# DQ23 52 VSS36 151
M_B_CLKP1 102 57 M_B_DQ28 77 155
8 M_B_CLKP1 CK1 DQ24 NC1 VSS37
M_B_CLKN1 104 59 M_B_DQ24 122 156
8 M_B_CLKN1 CK1# DQ25 NC2 VSS38
M_B_CKE0 73 67 M_B_DQ25 125 161
8 M_B_CKE0 CKE0 DQ26 NCTEST VSS39
M_B_CKE1 74 69 M_B_DQ29 162
8 M_B_CKE1 CKE1 DQ27 VSS40
M_B_CAS# 115 56 M_B_DQ31 +3.3V_RUN R56 1 2 *10K_4_NC 198 167
8 M_B_CAS# CAS# DQ28 EVENT# VSS41
M_B_RAS# 110 58 M_B_DQ30 DDR3_DRAMRST# 30 168
8 M_B_RAS# RAS# DQ29 7,11 DDR3_DRAMRST# RESET# VSS42
M_B_W E# 113 68 M_B_DQ26 172
8 M_B_W E# WE# DQ30 VSS43
R57 1 2 10K_4 DIMM1_SA0 197 70 M_B_DQ27 173
R58 10K_4 DIMM1_SA1 SA0 DQ31 M_B_DQ36 VSS44
1 2 201 SA1 DQ32 129 +SMDDR_VREF_DQ1 1 VREF_DQ VSS45 178
+3.3V_RUN W LAN_SCLK 202 131 M_B_DQ37 126 179
11,24,33 W LAN_SCLK SCL DQ33 +SMDDR_VREF_DIMM1 VREF_CA VSS46
W LAN_SDATA 200 141 M_B_DQ34 184
11,24,33 W LAN_SDATA SDA DQ34 M_B_DQ35 VSS47
DQ35 143 VSS48 185
M_B_ODT0 116 130 M_B_DQ32 2 189
8 M_B_ODT0 ODT0 DQ36 VSS1 VSS49
B M_B_ODT1 120 132 M_B_DQ33 3 190 B
8 M_B_ODT1 ODT1 DQ37 VSS2 VSS50
140 M_B_DQ38 8 195
DQ38 M_B_DQ39 VSS3 VSS51

(204P)
11 DM0 DQ39 142 9 VSS4 VSS52 196
SO-DIMMB SPD Address is 0XA4 28 147 M_B_DQ44 13
DM1 DQ40 M_B_DQ40 VSS5
SO-DIMMB TS Address is 0X34 46 DM2 DQ41 149 14 VSS6
M_B_DQ42

(204P)
63 DM3 DQ42 157 19 VSS7
136 159 M_B_DQ43 20
DM4 DQ43 M_B_DQ45 VSS8
153 DM5 DQ44 146 25 VSS9
170 148 M_B_DQ41 26 203 +0.75V_DDR_VTT
DM6 DQ45 M_B_DQ46 VSS10 VTT1
187 DM7 DQ46 158 31 VSS11 VTT2 204
160 M_B_DQ47 32
8 M_B_DQSP[7..0] M_B_DQSP0 DQ47 M_B_DQ53 VSS12
12 DQS0 DQ48 163 37 VSS13
M_B_DQSP1 29 165 M_B_DQ48 38
M_B_DQSP2 DQS1 DQ49 M_B_DQ54 VSS14
47 175 43

GND

GND
M_B_DQSP3 DQS2 DQ50 M_B_DQ55 VSS15
64 DQS3 DQ51 177
M_B_DQSP4 137 164 M_B_DQ52
M_B_DQSP5 DQS4 DQ52 M_B_DQ49 DDR3-DIMM1
154 166

205

206
M_B_DQSP6 DQS5 DQ53 M_B_DQ50
171 DQS6 DQ54 174
M_B_DQSP7 188 176 M_B_DQ51
8 M_B_DQSN[7..0] M_B_DQSN0 DQS7 DQ55 M_B_DQ61
10 DQS#0 DQ56 181
M_B_DQSN1 27 183 M_B_DQ60
M_B_DQSN2 DQS#1 DQ57 M_B_DQ63
45 DQS#2 DQ58 191
M_B_DQSN3 62 193 M_B_DQ62
M_B_DQSN4 DQS#3 DQ59 M_B_DQ57
135 DQS#4 DQ60 180
M_B_DQSN5 152 182 M_B_DQ56
M_B_DQSN6 DQS#5 DQ61 M_B_DQ59
169 DQS#6 DQ62 192
M_B_DQSN7 186 194 M_B_DQ58
DQS#7 DQ63

C DDR3-DIMM1 C

Place these Caps near So-Dimm1.


+1.5V_SUS +0.75V_DDR_VTT
1

C114 C115 C116 C117 C118 C119 C120 C121 C122 C123 C124 EC831 EC832
M1 VREF
0.1U/16V_4 0.1U/16V_4 10U/6.3V_8 10U/6.3V_8 1U/6.3V_4 *1U/6.3V_4_NC
2

0.1U/16V_4 0.1U/16V_4 10U/6.3V_8 *10U/6.3V_8_NC 10U/6.3V_8 1U/6.3V_4 *1U/6.3V_4_NC

+1.5V_SUS
2 +SMDDR_VREF_DQ1 +1.5V_SUS +SMDDR_VREF_DIMM1

2
R59 R60
1K/F_4 1K/F_4

20120213
1

1
SMDDR_VREF_DQ1_M3 R61 1 2 *0_4_NC Change C126 C128 to 1U
9 SMDDR_VREF_DQ1_M3
C127 C128
2

2
C125 C126
1

1
R62 R63
1K/F_4 1K/F_4
M3 REF 1U/10V_6 1U/10V_6
2

2
D D
1

1
0.1U/16V_4 0.1U/16V_4

Quanta Computer Inc.


PROJECT : R08
Size Document Number Rev
1A
DDR3 DIMM-1
Date: Monday, February 13, 2012 Sheet 12 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

20120203
http://laptopblue.vn
Change U3 to AJ0N13P0T02(N13P-GL)
20120204
Change U3 to AJ0N13P0T49(WINCON)
PEX_IOVDD+PEX_IOVDDQ >3.3A
U3A
N13P-GL-A1
Power up sequence
+1.05V_GFX
C132 2 1
~*0.1U/16V_4_NC
1000mA AG19
AG21
PEX_IOVDD_1 PEX_RX0 AN12
AM12
PEG_TXP15
PEG_TXN15
PEG_TXP15 6 +3V_GFX
PEX_IOVDD_2 PEX_RX0* PEG_TXN15 6
C133 2 1 0.1U/16V_4 AG22 AN14 PEG_TXP14 VDD33
PEX_IOVDD_3 PEX_RX1 PEG_TXP14 6
C134 2 1 1U/6.3V_4 AG24 AM14 PEG_TXN14
PEX_IOVDD_4 PEX_RX1* PEG_TXN14 6 GPU all +3V_GFX

2
C135 2 1 1U/6.3V_4 AH21 AP14 PEG_TXP13 +3.3V_RUN t>0
PEX_IOVDD_5 PEX_RX2 PEG_TXP13 6
C136 4.7U/6.3V_6 PEG_TXN13 R64
A
C137
2
2
1
1 10U/6.3V_8
AH25 PEX_IOVDD_6 PEX_RX2* AP15
AN15 PEG_TXP12
PEG_TXN13 6 PWROK 10K_4 IFP(AB)_IOVDD
A
PEX_RX3 PEG_TXP12 6
C129 2 1 10U/6.3V_8 AM15 PEG_TXN12
PEX_RX3* PEG_TXN12 6 +1.8V_GFX

2
AN17 PEG_TXP11
PEG_TXP11 6

1
PEX_RX4 PEG_TXN11 R65
AM17 t>0
+1.05V_GFX
C138 2 1
2300mA
0.047U/10V_4
AG13
AG15
PEX_IOVDDQ_1
PEX_RX4*
PEX_RX5 AP17
AP18
PEG_TXP10
PEG_TXN10
PEG_TXN11 6
PEG_TXP10 6
*220_4_NC
DGPU_PW ROK 25
NVVDD
C139 2 1 0.1U/16V_4 AG16
PEX_IOVDDQ_2 PEX_RX5*
AN18 PEG_TXP9
PEG_TXN10 6 +VCC_DGFX_CORE
PEG_TXP9 6

1
PEX_IOVDDQ_3 PEX_RX6

3
C130 2 1 1U/6.3V_4 AG18 AM18 PEG_TXN9 t>0
PEX_IOVDDQ_4 PEX_RX6* PEG_TXN9 6
C140 2 1 1U/6.3V_4 AG25 AN20 PEG_TXP8 2 Q8 FBVDDQ
PEX_IOVDDQ_5 PEX_RX7 PEG_TXP8 6
C141 2 1 4.7U/6.3V_6 AH15 AM20 PEG_TXN8 *2N7002W _NC
C142 2 1 10U/6.3V_8 AH18
PEX_IOVDDQ_6 PEX_RX7*
AP20 PEG_TXP7
PEG_TXN8 6 +1.5V_GFX
PEG_TXP7 6

1
PEX_IOVDDQ_7 PEX_RX8

3
C131 2 1 10U/6.3V_8 AH26 AP21 PEG_TXN7 t>0
PEX_IOVDDQ_8 PEX_RX8* PEG_TXN7 6

1
AH27 AN21 PEG_TXP6 PEX_VDD
PEX_IOVDDQ_9 PEX_RX9 PEG_TXP6 6
0.1u *4 under GPU AJ27 AM21 PEG_TXN6 +1.05V_GFX 2 C143
AK27
PEX_IOVDDQ_10 PEX_RX9*
AN23 PEG_TXP5
PEG_TXN6 6
*4700P/25V_4_NC +1.05V_GFX t>0
Others Near GPU PEG_TXP5 6

2
PEX_IOVDDQ_11 PEX_RX10 PEG_TXN5
AL27 PEX_IOVDDQ_12 PEX_RX10* AM23 PEG_TXN5 6
AM28 AP23 PEG_TXP4 Q9 IFP(CDEF)_IOVDD
PEG_TXP4 6

1
PEX_IOVDDQ_13 PEX_RX11 PEG_TXN4 *PDTC143TT_NC
AN28 AP24
PEX_IOVDDQ_14 PEX_RX11*
AN24 PEG_TXP3
PEG_TXN4 6 +1.05V_GFX
PEX_RX12 PEG_TXP3 6
AM24 PEG_TXN3
PEX_RX12* PEG_TXN3 6
AN26 PEG_TXP2 Q9: H(sat), L(cut-off)
PEX_RX13 PEG_TXP2 6
AM26 PEG_TXN2
PEX_RX13* PEG_TXN2 6
AP26 PEG_TXP1 NB9M: VGACORE +0.90V (Normal) , +1.09V
PEX_RX14 PEG_TXP1 6
AP27 PEG_TXN1 0.22uF AC coupling Caps for PCIE GEN3
PEX_RX14* PEG_TXN1 6
AN27 PEG_TXP0
PEX_RX15 PEG_TXN0
PEG_TXP0 6
0.1uF AC coupling Caps for PCIE GEN1/2 NVVDD Maximum Settling Time
0.1u under GPU GB4-128 PEX_RX15* AM27 PEG_TXN0 6

Others Near GPU AK14 PEG_RXP15_C C144 1 2 0.1U/16V_4 PEG_RXP15


B PEX_TX0 PEG_RXP15 6 B
PEX_TX0* AJ14 PEG_RXN15_C C145 1 2 0.1U/16V_4 PEG_RXN15
PEG_RXN15 6
C146 4.7U/6.3V_6 AH14 PEG_RXP14_C C147 0.1U/16V_4 PEG_RXP14
C148
2
2
1
1 1U/6.3V_4 PCI EXPRESS PEX_TX1
AG14 PEG_RXN14_C C149
1
1
2
2 0.1U/16V_4 PEG_RXN14
PEG_RXP14 6
PEG_RXN14 6
PEX_TX1*
+3V_GFX J8 VDD33_1 PEX_TX2 AK15 PEG_RXP13_C C150 1 2 0.1U/16V_4 PEG_RXP13
PEG_RXP13 6 NVVDD
C151 2 1 0.1U/16V_4 K8 AJ15 PEG_RXN13_C C152 1 2 0.1U/16V_4 PEG_RXN13
VDD33_2 PEX_TX2* PEG_RXN13 6
C153 2 1 0.1U/16V_4 L8 AL16 PEG_RXP12_C C154 1 2 0.1U/16V_4 PEG_RXP12
VDD33_3 PEX_TX3 PEG_RXP12 6
C155 2 1 0.1U/16V_4 M8 AK16 PEG_RXN12_C C156 1 2 0.1U/16V_4 PEG_RXN12
VDD33_4 PEX_TX3* PEG_RXN12 6
+VCC_DGFX_CORE 2 1 PEX_TX4 AK17 PEG_RXP11_C C157 1 2 0.1U/16V_4 PEG_RXP11
PEG_RXP11 6
R66 100_4 AJ17 PEG_RXN11_C C158 1 2 0.1U/16V_4 PEG_RXN11
PEX_TX4* PEG_RXN11 6
VDD_SENSE L4 AH17 PEG_RXP10_C C159 1 2 0.1U/16V_4 PEG_RXP10
55 VDD_SENSE VDD_SENSE PEX_TX5 PEG_RXP10 6
GND_SENSE L5 AG17 PEG_RXN10_C C160 1 2 0.1U/16V_4 PEG_RXN10
55 GND_SENSE GND_SENSE PEX_TX5* PEG_RXN10 6
2 1 PEX_TX6 AK18 PEG_RXP9_C C161 1 2 0.1U/16V_4 PEG_RXP9
PEG_RXP9 6
R67 100_4 AJ18 PEG_RXN9_C C162 1 2 0.1U/16V_4 PEG_RXN9
+1.05V_GFX PEX_TX6* PEG_RXN9 6
AL19 PEG_RXP8_C C163 1 2 0.1U/16V_4 PEG_RXP8
12~16 mils width PEX_TX7
PEX_TX7* AK19 PEG_RXN8_C
AK20 PEG_RXP7_C
C164
C165
1 2 0.1U/16V_4
0.1U/16V_4
PEG_RXN8
PEG_RXP7
PEG_RXP8 6
PEG_RXN8 6
1 2 GPIO
120mA PEX_TX8 PEG_RXP7 6
2

L1 AJ20 PEG_RXN7_C C166 1 2 0.1U/16V_4 PEG_RXN7


PEX_TX8* PEG_RXN7 6
0.1u under GPU BLM18AG121SN1D AH20 PEG_RXP6_C C167 1 2 0.1U/16V_4 PEG_RXP6
PEX_TX9 PEG_RXP6 6
(120,200MA) AG20 PEG_RXN6_C C168 1 2 0.1U/16V_4 PEG_RXN6
Others Near GPU PEX_TX9*
AK21 PEG_RXP5_C C169 1 2 0.1U/16V_4 PEG_RXP5
PEG_RXN6 6
PEG_RXP5 6
1

C170 PEX_TX10
2 1 0.1U/16V_4 +PEX_PLLVDD AG26
PEX_PLLVDD PEX_TX10* AJ21 PEG_RXN5_C C171 1 2 0.1U/16V_4 PEG_RXN5
PEG_RXN5 6
C172 2 1 1U/6.3V_4 AL22 PEG_RXP4_C C173 1 2 0.1U/16V_4 PEG_RXP4 tsNVVDD<100us
PEX_TX11 PEG_RXP4 6
C174 2 1 4.7U/6.3V_6 AK22 PEG_RXN4_C C175 1 2 0.1U/16V_4 PEG_RXN4
PEX_TX11* PEG_RXN4 6
PEX_TX12 AK23 PEG_RXP3_C C176 1 2 0.1U/16V_4 PEG_RXP3
PEG_RXP3 6
PEX_TX12* AJ23 PEG_RXN3_C C177 1 2 0.1U/16V_4 PEG_RXN3
PEG_RXN3 6
AH23 PEG_RXP2_C C178 1 2 0.1U/16V_4 PEG_RXP2
210mA 12~16 mils width PEX_TX13
PEX_TX13* AG23 PEG_RXN2_C C179 1 2 0.1U/16V_4 PEG_RXN2
PEG_RXP2 6
PEG_RXN2 6
+3V_GFX L2 1 2 0_6 +PEX_SVDD_3V3 P8 AK24 PEG_RXP1_C C180 1 2 0.1U/16V_4 PEG_RXP1
3V3AUX_NC PEX_TX14 PEG_RXP1 6
C C181 2 1 0.1U/16V_4 AG12 AJ24 PEG_RXN1_C C182 1 2 0.1U/16V_4 PEG_RXN1 C
PEX_SVDD_3V3 PEX_TX14* PEG_RXN1 6
C183 2 1 4.7U/6.3V_6 AL25 PEG_RXP0_C C184 1 2 0.1U/16V_4 PEG_RXP0
PEX_TX15 PEG_RXP0 6
C475 2 1 4.7U/6.3V_6 AK25 PEG_RXN0_C C185 1 2 0.1U/16V_4 PEG_RXN0
PEX_TX15* PEG_RXN0 6
20120203 PEX_RST timing
0.1u under GPU AL13 CLK_PCIE_VGAP
AH12
PEX_REFCLK
AK13 CLK_PCIE_VGAN
CLK_PCIE_VGAP 24 Change C144 C145 C147 C149 C150
Others Near GPU PEX_PLL_HVDD PEX_REFCLK* CLK_PCIE_VGAN 24
C152 C154 C156 C157 C158 I/O 3.3V
AJ11 PEX_WAKE# C159 C160 C161 C162 C163
PEX_TSTCLK_OUT AJ26 PEX_TSTCLK R68 2 1 *200_4_NC
PEX_TSTCLK_OUT* AK26 PEX_TSTCLK# C164 C165 C166 C167 C168
C169 C171 C173 C175 C176 PEX_RST
AJ12 GPU_RST# C177 C178 C179 C180 C182
+1.05V_GFX PEX_RST*
C184 C185 to 0.1U/16V_4(CH4103K1B08)
PEX_CLKREQ* AK12 PEX_CLKREQ# R69 2 1 10K_4 +3V_GFX
C186 1 2 *0.1U/16V_4_NC
C187 1 2 *0.1U/16V_4_NC AP29 PEX_TERMP R70 1 2 2.49K/F_4 Trise >= 1uS Tfail <=500nS
C188 0.1U/16V_4 PEX_TERMP
1 2
TESTMODE AK11 TESTMODE R71 1 2 10K_4

+3V_GFX

C189 1 2 0.1U/16V_4 +3V_GFX

D D
5

2 PLTRST# 7,23,35,38
2

GPU_RST# 4
1 DGPU_HOLD_RST# 23 PU in PCH
PEX_CLKREQ# 1 3 PEG_A_CLKRQ# 24
1

Quanta Computer Inc.


3

R72 U4 R73
100K_4 TC7SH08FU 100K_4 Q10
2N7002W
PROJECT : R08
2

Size Document Number Rev


A00
N13P-GS (PCIE I/F) 1/5
Date: Monday, February 13, 2012 Sheet 13 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U3B
N13P-GL-A1
http://laptopblue.vn U3C
N13P-GL-A1
FBB_D00 G9 VMC_DQ0
U30 L28 VMA_DQ0 D13 E9 VMC_DQ1
18 VMA_CMD0 FBA_CMD0 FBA_D00 19 VMC_CMD0 FBB_CMD0 FBB_D01
VMA_CMD1 T31 M29 VMA_DQ1 VMC_CMD1 E14 G8 VMC_DQ2
T1 FBA_CMD1 FBA_D01 18 VMA_DQ[63..0] T4 FBB_CMD1 FBB_D02
VMA_DQ2 VMC_DQ3
18 VMA_CMD2 U29
R34
FBA_CMD2 FBA_D02 L29
M28 VMA_DQ3
18 VMA_DM[7..0] 19 VMC_CMD2 F14
A12
FBB_CMD2 GB4-128 FBB_D03 F9
F11 VMC_DQ4
18
18
VMA_CMD3
VMA_CMD4 R33
FBA_CMD3
FBA_CMD4
GB4-128 FBA_D03
FBA_D04 N31 VMA_DQ4
18 VMA_W DQS[7..0]
18 VMA_RDQS[7..0]
19
19
VMC_CMD3
VMC_CMD4 B12
FBB_CMD3
FBB_CMD4
FBB_D04
FBB_D05 G11 VMC_DQ5
U32 P29 VMA_DQ5 C14 F12 VMC_DQ6
18 VMA_CMD5 FBA_CMD5 FBA_D05 19 VMC_DQ[63..0] 19 VMC_CMD5 FBB_CMD5 FBB_D06
U33 R29 VMA_DQ6 B14 G12 VMC_DQ7
18 VMA_CMD6 FBA_CMD6 FBA_D06 19 VMC_DM[7..0] 19 VMC_CMD6 FBB_CMD6 FBB_D07
U28 P28 VMA_DQ7 G15 G6 VMC_DQ8
18 VMA_CMD7 FBA_CMD7 FBA_D07 19 VMC_W DQS[7..0] 19 VMC_CMD7 FBB_CMD7 FBB_D08
A V28 J28 VMA_DQ8 F15 F5 VMC_DQ9 A
18 VMA_CMD8 FBA_CMD8 FBA_D08 19 VMC_RDQS[7..0] 19 VMC_CMD8 FBB_CMD8 FBB_D09
V29 H29 VMA_DQ9 E15 E6 VMC_DQ10
18 VMA_CMD9 FBA_CMD9 FBA_D09 19 VMC_CMD9 FBB_CMD9 FBB_D10
V30 J29 VMA_DQ10 D15 F6 VMC_DQ11
18 VMA_CMD10 FBA_CMD10 FBA_D10 19 VMC_CMD10 FBB_CMD10 FBB_D11
U34 H28 VMA_DQ11 A14 F4 VMC_DQ12
18 VMA_CMD11 FBA_CMD11 FBA_D11 19 VMC_CMD11 FBB_CMD11 FBB_D12
U31 G29 VMA_DQ12 D14 G4 VMC_DQ13
18 VMA_CMD12 FBA_CMD12 FBA_D12 19 VMC_CMD12 FBB_CMD12 FBB_D13
V34 E31 VMA_DQ13 A15 E2 VMC_DQ14
18 VMA_CMD13 FBA_CMD13 FBA_D13 19 VMC_CMD13 FBB_CMD13 FBB_D14
V33 E32 VMA_DQ14 B15 F3 VMC_DQ15
18 VMA_CMD14 FBA_CMD14 FBA_D14 19 VMC_CMD14 FBB_CMD14 FBB_D15
Y32 F30 VMA_DQ15 C17 C2 VMC_DQ16
18 VMA_CMD15 FBA_CMD15 FBA_D15 19 VMC_CMD15 FBB_CMD15 FBB_D16
AA31 C34 VMA_DQ16 D18 D4 VMC_DQ17
18 VMA_CMD16 FBA_CMD16 FBA_D16 19 VMC_CMD16 FBB_CMD16 FBB_D17
VMA_CMD17 AA29 D32 VMA_DQ17 VMC_CMD17 E18 D3 VMC_DQ18
T2 FBA_CMD17 FBA_D17 T3 FBB_CMD17 FBB_D18
AA28 B33 VMA_DQ18 F18 C1 VMC_DQ19
18 VMA_CMD18 FBA_CMD18 FBA_D18 19 VMC_CMD18 FBB_CMD18 FBB_D19
AC34 C33 VMA_DQ19 A20 B3 VMC_DQ20
18 VMA_CMD19 FBA_CMD19 FBA_D19 19 VMC_CMD19 FBB_CMD19 FBB_D20
AC33 F33 VMA_DQ20 B20 C4 VMC_DQ21
18 VMA_CMD20 FBA_CMD20 FBA_D20 19 VMC_CMD20 FBB_CMD20 FBB_D21
AA32 F32 VMA_DQ21 C18 B5 VMC_DQ22
18 VMA_CMD21 FBA_CMD21 FBA_D21 19 VMC_CMD21 FBB_CMD21 FBB_D22
AA33 H33 VMA_DQ22 B18 C5 VMC_DQ23
18 VMA_CMD22 FBA_CMD22 FBA_D22 19 VMC_CMD22 FBB_CMD22 FBB_D23
Y28 H32 VMA_DQ23 G18 A11 VMC_DQ24
18 VMA_CMD23 FBA_CMD23 FBA_D23 19 VMC_CMD23 FBB_CMD23 FBB_D24
Y29 P34 VMA_DQ24 G17 C11 VMC_DQ25
18 VMA_CMD24 FBA_CMD24 FBA_D24 19 VMC_CMD24 FBB_CMD24 FBB_D25
W31 P32 VMA_DQ25 F17 D11 VMC_DQ26
18 VMA_CMD25 FBA_CMD25 FBA_D25 19 VMC_CMD25 FBB_CMD25 FBB_D26
Y30 P31 VMA_DQ26 D16 B11 VMC_DQ27
18 VMA_CMD26 FBA_CMD26 FBA_D26 19 VMC_CMD26 FBB_CMD26 FBB_D27
AA34 P33 VMA_DQ27 A18 D8 VMC_DQ28
18 VMA_CMD27 FBA_CMD27 FBA_D27 19 VMC_CMD27 FBB_CMD27 FBB_D28
Y31 L31 VMA_DQ28 D17 A8 VMC_DQ29
18 VMA_CMD28 FBA_CMD28 FBA_D28 19 VMC_CMD28 FBB_CMD28 FBB_D29
Y34 L34 VMA_DQ29 A17 C8 VMC_DQ30
18 VMA_CMD29 FBA_CMD29 FBA_D29 19 VMC_CMD29 FBB_CMD29 FBB_D30
Y33 L32 VMA_DQ30 B17 B8 VMC_DQ31
18 VMA_CMD30 FBA_CMD30 FBA_D30 19 VMC_CMD30 FBB_CMD30 FBB_D31
VMA_CMD31 V31 L33 VMA_DQ31 VMC_CMD31 E17 F24 VMC_DQ32
T5 FBA_CMD31 FBA_D31 T6 FBB_CMD31 FBB_D32
AG28 VMA_DQ32 G23 VMC_DQ33
VMA_DM0 FBA_D32 VMA_DQ33 VMC_DM0 FBB_D33 VMC_DQ34
P30 FBA_DQM0 FBA_D33 AF29 E11 FBB_DQM0 FBB_D34 E24
VMA_DM1 F31 AG29 VMA_DQ34 VMC_DM1 E3 G24 VMC_DQ35
VMA_DM2 FBA_DQM1 FBA_D34 VMA_DQ35 VMC_DM2 FBB_DQM1 FBB_D35 VMC_DQ36
F34 FBA_DQM2 FBA_D35 AF28 A3 FBB_DQM2 FBB_D36 D21
VMA_DM3 M32 AD30 VMA_DQ36 VMA_CMD2 R74 1 2 10K_4 VMC_DM3 C9 E21 VMC_DQ37
VMA_DM4 FBA_DQM3 FBA_D36 VMA_DQ37 VMC_DM4 FBB_DQM3 FBB_D37 VMC_DQ38
B AD31 FBA_DQM4 FBA_D37 AD29 F23 FBB_DQM4 FBB_D38 G21 B
VMA_DM5 AL29 AC29 VMA_DQ38 VMA_CMD3 R75 1 2 10K_4 VMC_DM5 F27 F21 VMC_DQ39
VMA_DM6 FBA_DQM5 FBA_D38 VMA_DQ39 VMC_DM6 FBB_DQM5 FBB_D39 VMC_DQ40
AM32 FBA_DQM6 FBA_D39 AD28 C30 FBB_DQM6 FBB_D40 G27
VMA_DM7 AF34 AJ29 VMA_DQ40 VMA_CMD5 R76 1 2 10K_4 VMC_DM7 A24 D27 VMC_DQ41
FBA_DQM7 FBA_D40 VMA_DQ41 FBB_DQM7 FBB_D41 VMC_DQ42
FBA_D41 AK29 FBB_D42 G26
VMA_W DQS0 M31 AJ30 VMA_DQ42 VMA_CMD18 R77 1 2 10K_4 VMC_W DQS0 D10 E27 VMC_DQ43
VMA_W DQS1 FBA_DQS_WP0 FBA_D42 VMA_DQ43 VMC_W DQS1 FBB_DQS_WP0 FBB_D43 VMC_DQ44
G31 FBA_DQS_WP1 FBA_D43 AK28 D5 FBB_DQS_WP1 FBB_D44 E29
VMA_W DQS2 E33 AM29 VMA_DQ44 VMA_CMD19 R78 1 2 10K_4 VMC_W DQS2 C3 F29 VMC_DQ45
VMA_W DQS3 FBA_DQS_WP2 FBA_D44 VMA_DQ45 VMC_W DQS3 FBB_DQS_WP2 FBB_D45 VMC_DQ46
M33 FBA_DQS_WP3 FBA_D45 AM31 B9 FBB_DQS_WP3 FBB_D46 E30
VMA_W DQS4 AE31 AN29 VMA_DQ46 VMC_CMD2 R79 1 2 10K_4 VMC_W DQS4 E23 D30 VMC_DQ47
VMA_W DQS5 FBA_DQS_WP4 FBA_D46 VMA_DQ47 VMC_W DQS5 FBB_DQS_WP4 FBB_D47 VMC_DQ48
AK30 FBA_DQS_WP5 FBA_D47 AM30 E28 FBB_DQS_WP5 FBB_D48 A32
VMA_W DQS6 AN33 AN31 VMA_DQ48 VMC_CMD3 R80 1 2 10K_4 VMC_W DQS6 B30 C31 VMC_DQ49
VMA_W DQS7 FBA_DQS_WP6 FBA_D48 VMA_DQ49 VMC_W DQS7 FBB_DQS_WP6 FBB_D49 VMC_DQ50
AF33 FBA_DQS_WP7 FBA_D49 AN32 A23 FBB_DQS_WP7 FBB_D50 C32
AP30 VMA_DQ50 VMC_CMD5 R81 1 2 10K_4 B32 VMC_DQ51
VMA_RDQS0 FBA_D50 VMA_DQ51 VMC_RDQS0 FBB_D51 VMC_DQ52
M30 FBA_DQS_RN0 FBA_D51 AP32 D9 FBB_DQS_RN0 FBB_D52 D29
VMA_RDQS1 H30 AM33 VMA_DQ52 VMC_CMD18 R82 1 2 10K_4 VMC_RDQS1 E4 A29 VMC_DQ53
VMA_RDQS2 FBA_DQS_RN1 FBA_D52 VMA_DQ53 VMC_RDQS2 FBB_DQS_RN1 FBB_D53 VMC_DQ54
E34 FBA_DQS_RN2 FBA_D53 AL31 B2 FBB_DQS_RN2 FBB_D54 C29
VMA_RDQS3 M34 AK33 VMA_DQ54 VMC_CMD19 R83 1 2 10K_4 VMC_RDQS3 A9 B29 VMC_DQ55
VMA_RDQS4 FBA_DQS_RN3 FBA_D54 VMA_DQ55 VMC_RDQS4 FBB_DQS_RN3 FBB_D55 VMC_DQ56
AF30 FBA_DQS_RN4 FBA_D55 AK32 D22 FBB_DQS_RN4 FBB_D56 B21
VMA_RDQS5 AK31 AD34 VMA_DQ56 VMC_RDQS5 D28 C23 VMC_DQ57
VMA_RDQS6 FBA_DQS_RN5 FBA_D56 VMA_DQ57 Follow Mode E Command Mapping VMC_RDQS6 FBB_DQS_RN5 FBB_D57 VMC_DQ58
AM34 FBA_DQS_RN6 FBA_D57 AD32 A30 FBB_DQS_RN6 FBB_D58 A21
VMA_RDQS7 AF32 FBA_DQS_RN7 FBA_D58 AC30 VMA_DQ58 (ODTX, CKE*, RST) VMC_RDQS7 B23 FBB_DQS_RN7 FBB_D59 C21 VMC_DQ59
AD33 VMA_DQ59 B24 VMC_DQ60
FBA_D59 VMA_DQ60 FBB_D60 VMC_DQ61
K31 FBA_WCK01 FBA_D60 AF31 F8 FBB_WCK01 FBB_D61 C24
L30 AG34 VMA_DQ61 E8 B26 VMC_DQ62
FBA_WCK01_N FBA_D61 VMA_DQ62 FBB_WCK01_N FBB_D62 VMC_DQ63
H34 FBA_WCK23 FBA_D62 AG32 A5 FBB_WCK23 FBB_D63 C26
J34 AG33 VMA_DQ63 A6
FBA_WCK23_N FBA_D63 FBB_WCK23_N
AG30 FBA_WCK45 D24 FBB_WCK45
AG31 R30 VMA_CLKP0 D25 D12 VMC_CLKP0
FBA_WCK45_N FBA_CLK0 VMA_CLKP0 18 FBB_WCK45_N FBB_CLK0 VMC_CLKP0 19
C AJ34 R31 VMA_CLKN0 B27 E12 VMC_CLKN0 C
FBA_WCK67 FBA_CLK0* VMA_CLKN0 18 FBB_WCK67 FBB_CLK0* VMC_CLKN0 19
AK34 AB31 VMA_CLKP1 C27 E20 VMC_CLKP1
FBA_WCK67_N FBA_CLK1 VMA_CLKP1 18 FBB_WCK67_N FBB_CLK1 VMC_CLKP1 19
AC31 VMA_CLKN1 F20 VMC_CLKN1

+1.05V_GFX
FBA_CLK1* VMA_CLKN1 18 FBB_CLK1* VMC_CLKN1 19
J30 FBA_WCKB01 D6 FBB_WCKB01 66mA
J31 FBA_WCKB01_N D7 FBB_WCKB01_N FBB_PLL_AVDD H17 +FB_PLLAVDD1 1 2
J32 C6 L3 BLM18PG300SN1D
FBA_WCKB23 FBB_WCKB23
J33 FBA_WCKB23_N FB_VREF H26 +FB_VREF1 T7 B6 FBB_WCKB23_N FBB_CMD_RFU0 C12 C190 1 2 10U/6.3V_8
AH31 15mils width F26 C20 C191 1 2 0.047U/10V_4
FBA_WCKB45 FBB_WCKB45 FBB_CMD_RFU1 C192 0.1U/16V_4
AJ31 FBA_WCKB45_N E26 FBB_WCKB45_N 1 2
+1.5V_GFX AJ32 For Debug only A26 F1 C193 1 2 1U/6.3V_4
FBA_WCKB67 FBB_WCKB67 FB_VDDQ_SENSE
AJ33 FBA_WCKB67_N A27 FBB_WCKB67_N FB_GND_SENSE F2
R28 FBA_DEBUG0 R84 1 2 *60.4/F_4_NC +1.5V_GFX J27 FB_CAL_PD_VDDQ 1 2
FBA_DEBUG0 +1.5V_GFX FB_CAL_PD_VDDQ +1.5V_GFX
AA27 FBVDDQ_1 FBA_DEBUG1 AC28 FBA_DEBUG1 R86 1 2 *10K_4_NC R85 40.2/F_4
AA30
AB27
FBVDDQ_2
R32
H18
H19
FBVDDQ_23 MEMORY I/F C H27 FB_CAL_PU_GND 1 2
FBVDDQ_3 FBA_CMD_RFU0 FBVDDQ_24 FB_CAL_PU_GND R87 42.2/F_4
AB33 FBVDDQ_4 FBA_CMD_RFU1 AC32 H20 FBVDDQ_25
AC27 FBVDDQ_5 H21 FBVDDQ_26
H25 FB_CAL_TERM_GND
AD27
AE27
FBVDDQ_6 MEMORY I/F A 35mA H22
H23
FBVDDQ_27 FB_CAL_TERM_GND R88
1 2
51.1/F_4
FBVDDQ_7 FBVDDQ_28
AF27 FBVDDQ_8 FB_DLL_AVDD K27 +FB_PLLAVDD L4 1 2 BLM18PG300SN1D +1.05V_GFX H24 FBVDDQ_29
AG27 U27 C194 1 2 10U/6.3V_8 H8 G14 FBC_DEBUG0 R89 1 2 *60.4/F_4_NC +1.5V_GFX
FBVDDQ_9 FBA_PLL_AVDD C195 1 1U/6.3V_4 FBVDDQ_30 FBB_DEBUG0
B13 FBVDDQ_10 2 15mils width H9 FBVDDQ_31 FBB_DEBUG1 G20 FBC_DEBUG1 R90 1 2 *10K_4_NC
B16 C196 1 2 0.1U/16V_4 L27
B19
FBVDDQ_11 66mA C197 1 2 0.047U/10V_4 M27
FBVDDQ_32
T33
FBVDDQ_12 FBVDDQ_33 FBVDDQ_39 +1.5V_GFX
E13 FBVDDQ_13 N27 FBVDDQ_34 FBVDDQ_40 V27
E16 FBVDDQ_14 P27 FBVDDQ_35 FBVDDQ_41 W27
E19 +1.5V_GFX R27 W30
FBVDDQ_15 +1.5V_GFX FBVDDQ_36 FBVDDQ_42
H10 FBVDDQ_16 FBVDDQ_22 H16 T27 FBVDDQ_37 FBVDDQ_43 W33
H11 FBVDDQ_17 FBVDDQ_21 H15 T30 FBVDDQ_38 FBVDDQ_44 Y27
D H12 H14 C198 1 2 *0.1U/16V_4_NC D
FBVDDQ_18 FBVDDQ_20 C199 0.1U/16V_4
H13 FBVDDQ_19 FB_CLAMP E1 1 2
C200 1 2 0.047U/10V_4
1

C201 1 2 0.1U/16V_4
3050mA R585 C202 1 2 0.1U/16V_4
10K_4 C203 1 2 0.047U/10V_4
C204 1 2 0.1U/16V_4
C205 1 2 0.047U/10V_4 Quanta Computer Inc.
2

C206 1 2 1U/6.3V_4
C207 1 2 1U/6.3V_4
C208 1 2 4.7U/6.3V_6 PROJECT : R08
C209 1 2 4.7U/6.3V_6 Size Document Number Rev
0.1u *8 under GPU A00
N13P-GS (MEMORY I/F) 2/5
Others Near GPU Date: Monday, February 13, 2012 Sheet 14 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

50 mA
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U3D
N13P-GL-A1
10K_4 2 1 R91 +IFPAB_PLLVDD AH8 AM6
IFPAB_PLLVDD IFPA_TXC
IFPA_TXC* AN6
IFPAB(LVDS) IFPA_TXD0 AP3
AN3
IFPA_TXD0*
IFPA_TXD1 AN5
IFPA_TXD1* AM5
IFPA_TXD2 AL6

A TP48
IFPAB_RSET AJ8 GB4-128 IFPA_TXD2* AK6
AJ6 A
IFPAB_RSET IFPA_TXD3
IFPA_TXD3* AH6
AG8 IFPA_IOVDD IFPB_TXC AJ9
10K_4 2 1 R92 +IFPAB_IOVDD AG9 AH9
IFPB_IOVDD IFPB_TXC*
AP6
320 mA IFPB_TXD4
IFPB_TXD4* AP5
AM7
IFPB_TXD5
N4 GPIO14 IFPB_TXD5* AL7
IFPB_TXD6 AN8
IFPB_TXD6* AM8
IFPB_TXD7 AK8
AL8

10K_4 2
220 1mA
R102 +IFPCD_PLLVDD AF7
IFPB_TXD7*
AG2
IFPCD_PLLVDD/ I2CW_SDA/ IFPC_AUX_N
IFPC_PLLVDD I2CW_SCL/ IFPC_AUX AG3
AG7 DACB_VDD/ IFPC_L3_N AG4
IFPD_PLLVDD IFPC_L3 AG5
IFPC_L2_N AH4
P2 GPIO15 IFPC IFPC_L2 AH3
IFPC_L1_N AJ2
M6 GPIO17 IFPC_L1 AJ3
IFPC_L0_N AJ1
IFPC_L0 AK1
R94 2 1 *1K/F_4_NC IFPC_RSET AF8 AK2
R95 *1K/F_4_NC IFPD_RSET IFPCD_RSET/ IFPC_RSET I2CX_SDA/ IFPD_AUX_N
2 1 AN2 DACB_RSET/ IFPD_RSET I2CX_SCL/ IFPD_AUX AK3
IFPD_L3_N AK5

200mA (1.05V +/- 3% ) IFPCD IFPD_L3 AK4


AL4
10K_4 2 IFPD_L2_N
1 R121 +IFPCD_IOVDD AF6 IFPC_IOVDD IFPD IFPD_L2 AL3
B AG6 IFPD_IOVDD IFPD_L1_N AM4 B
IFPD_L1 AM3
IFPD_L0_N AM2
IFPD_L0 AM1

I2CY_SCL/ IFPE_AUX AB3


I2CY_SDA/ IFPE_AUX* AB4
IFPE_L0 AD2
IFPAB_RSET AD6 AD3
TP47 IFPEF_RSET IFPE_L0*
IFPE_L1 AD1

220 1mA IFPEF IFPE_L1* AC1


AC2
R97 10K_4 IFPEF_PLLVDD IFPE_L2
2 AB8 IFPEF_PLLVDD IFPE_L2* AC3
R98 2 1 10K_4 IFPEF_IOVDD AC7 AC4
IFPE_IOVDD IFPE_L3
AC8 IFPF_IOVDD IFPE_L3* AC5
AF3
200 mA R1
I2CZ_SCL/ IFPF_AUX
I2CZ_SDA/ IFPF_AUX* AF2
AE3
GPIO18 IFPF_L0
IFPF_L0* AE4
P3 GPIO19 IFPF_L1 AF4
IFPF_L1* AF5
IFPF_L2 AD4
IFPF_L2* AD5
IFPF_L3 AG1
IFPF_L3* AF1

R99 2 1 10K_4 +DACA_VDD AG10 AK9


DACA_VDD DACA_RED
DACA(CRT) AL10
DACA_GREEN
C C
DACA_BLUE AL9

AM9 +3V_GFX
DACA_HSYNC
DACA_VSYNC AN9
AP9 DACA_VREF
AP8 R4 I2CA_SCL R100 1 2 2.2K_4
DACA_RSET I2CA_SCL I2CA_SDA R101 1 2.2K_4
I2CA_SDA R5 2

AC6 NC_1
AJ28 NC_2
AJ4 NC_3
AJ5 NC_4
AL11 NC_5
C15 NC_6
D19 NC_7
D20 NC_8
D23 NC_9
D26 NC_10
H31 NC_11
T8 NC_12
V32 NC_13

60mA
+1.05V_GFX L7 1 2 HCB1608KF-221T20 +NV_PLLVDD AD8 H1 XTAL_SSIN XTAL_SSIN R103 1 2 10K_4
PLLVDD XTAL_SSIN BXTALOUT BXTALOUT R104
J4 1 2 10K_4
45mA AD7 NC
XTAL_OUTBUFF
C218 *0.1U/16V_4_NC VID_PLLVDD XTALIN
D 1 2 XTAL_IN H3 D
C219 1 2 0.1U/16V_4 GF108/GKx GF117 Y1 27MHZ
C220 1 2 0.1U/16V_4 H2 XTALOUT 2 1 10 kΩ pull-down only if no spread chip used.
C221 0.047U/10V_4 XTAL_OUT
1 2
1

5*3 package
C222 1 2 22U/6.3V_8 C223 C224
AE8
XTAL_PLL 27P/50V_4 27P/50V_4
Quanta Computer Inc.
2

SP_PLLVDD

45mA
PROJECT : R08
Size Document Number Rev
A00
N13P-GS (DISPLAY) 3/5
Date: Monday, February 13, 2012 Sheet 15 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
CHIP PCI_DEVID: STRAP2 ROM_SCLK ROM_SO
N13P-GL (AJ0N13P0T02)
http://laptopblue.vn N13P-GS for Turbo (AJ001070T00) N13P-GS
N13P-LP
0x0FD2(QS)
0x0FD3
0010 PD 15K
0011 PD 20K
1000 PU 5K
1000 PU 5K
1001 PU 10K

Strap Bit Description N13M-GS 0x1142 0010 PD 15K 0000 PD 5K


USER[3:0] 1111 EDID is used
3GIO_PADCFG 0110 Notebook Default N13P-GL 0x0DE9 1001 PU 10K 0010 PD 15K 0001 PD 10K
[3:0] +3V_GFX

PCI_DEVID[5:0] D2 PCI_Device_ID +3V_GFX


Audio capability *10K/F_4_NC
Logical Strap Bit Mapping

2
SORx_EXPOSED 0000 on each display port

2
[3:0] R105 R107 R108 R111
A Not in use PU-VDD PD A

2
U3E R106 R112 45.3K/F_4 *35.7K/F_4_NC *10K/F_4_NC
N13P-GL-A1 DP_PLL_VDD33V 1 Default *4.99K/F_4_NC R109
PCIE_MAX_SPEED 1 PCIE Gen2/3 capable *4.99K/F_4_NC 10K/F_4
4.99K 1000 0000

1
PCI_SPEED_CHANGE STRAP0 R110

1
_GEN3 0 Default ROM_SI STRAP1 *45.3K/F_4_NC
10K 1001 0001

1
GB4-128 ROM_SO STRAP2
RAMCFG[3:0] 0010 Default Hynix1G ROM_SCLK STRAP3
0 PCIE PLL termination 15K 1010 0010 STRAP4

1
PEX_PLL_EN_TERM disable (Default)
20K 1011 0011

1
R113 R115

1
SUB_VENDOR 0 No vedio BIOS ROM 15K/F_4 R114 15K/F_4
01 Frame Buffer size 24.9K 1100 0100 10K/F_4 R117 R118
FB[1:0] *4.99K/F_4_NC *15K/F_4_NC R119 R120
MISC1 Reserve
30.1K 1101 0101

2
R116 45.3K/F_4 4.99K/F_4

2
(GPIOS,JTAG,THERM,I2C) SMB_ALT_ADDR 0 Default (1GPU) 10K/F_4
34.8K 1110 0110

2
VGA_DEVICE 1 Default (non 3D)
45.3K 1111 0111
10K/F_4: CS31002FB26 [RES CHIP 10K 1/16W +1% (0402)] 24.9K/F_4: CS32492FB16 [RES CHIP 24.9K 1/16W +-1%(0402)]
4.99K/F_4: CS24992FB26 [RES CHIP 4.99K 1/16W +1%(0402)] 30.1K/F_4: CS33012FB18 [RES CHIP 30.1K 1/16W +-1%(0402)]
15K/F_4: CS31502FB24 [RES CHIP 15K 1/16W +1% (0402)] 35.7K/F_4: CS33572FB13 [RES CHIP 35.7K 1/16W +-1%(0402)]
20K/F_4: CS32002FB29 RES CHIP 20K 1/16W +-1%(0402) 45.3K/F_4: CS34532FB18 [RES CHIP 45.3K 1/16W +-1% (0402)]
Logical Logical Logical Logical
Strapping Bit3 Strapping Bit2 Strapping Bit1 Strapping Bit0
ROM_SO FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE 0001
B ROM_SCLK PCI_DEVIDE[4] SUB_VENDOR PCI_DEVID[5] PEX_PLL_EN_TERM 0010 B

ROM_SI RAMCFG[3] RAMCFG[2] RAMCFG[1] RAMCFG[0] 0010


STRAP4 RESERVED PCI_SPEED_CHANGE_GEN3 PCIE_MAX_SPEED DP_PLL_VDD33V 0001
STRAP3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED 0000
STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] 1001
STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] 0111
STRAP0 USER[3] USER[2] USER[1] USER[0] 1111

VGA_THERMDN K4 P6 DGPU_VID4
42 VGA_THERMDN THERMDN GPIO0 DGPU_VID4 55
M3 DGPU_VID3 Default: Hynix VRAM 2G (0110) VRAM Configuration Table
GPIO1 DGPU_VID3 55
GPIO2 L6
VGA_THERMDP K3 P5 RAMCFG
42 VGA_THERMDP THERMDP GPIO3
GPIO4 P7 [3:0] DESCRIPTION Vendor Quanta P/N Vendor P/N ROM_SI
L7 DGPU_VID1
GPIO5 DGPU_VID1 55
JTAG_TCK AM10 M7 DGPU_VID2 0000 Reserved PD 5K
T8 JTAG_TCK GPIO6 DGPU_VID2 55
JTAG_TMS AP11 N8 0001 Reserve Reserve Reserve Reserve PD 10K
T9 JTAG_TMS GPIO7
JTAG_TDI AM11 M1 VGA_OVT# 0010 DDR3 64Mx16, 900MHz Hynix AKD5LZWTW07 H5TQ1G63DFR-11C PD 15K
T10 JTAG_TDI GPIO8
JTAG_TDO AP12 M2 VGA_ALERT 0011 DDR3 64Mx16, 900MHz (G-die) Samsung AKD5EGGT509 K4W1G1646G-BC11 PD 20K
T11 JTAG_TDO GPIO9
JTAG_TRST# AN11 L1 0110 DDR3 128Mx16, 900MHz Hynix AKD5MGWTW06 H5TQ2G63BFR-11C PD 35K
T12 JTAG_TRST* GPIO10
M5 DGPU_VID0 0111 DDR3 128Mx16, 900MHz Samsung AKD5MGWT507 K4W2G1646C-HC11 PD 45K
GPIO11 DGPU_VID0 55
N3 VGA_PW R_LEVEL#
GPIO12 VGA_PW R_LEVEL# 38,55
RP31 1 2 2.2KX2 I2CS_SCL T4 M4 DGPU_VID5
I2CS_SCL GPIO13 DGPU_VID5 55
I2CS_SDA
C +3V_GFX 3
RP32 1
4
2 2.2KX2 EXT_EDIDCLK
T3 I2CS_SDA +3V_GFX GPIO ASSIGNMENTS C

3 4 EXT_EDIDDATA
R2
R3
I2CC_SCL
R8
GPIO I/O ACTIVE USAGE
+3V_GFX I2CC_SDA GPIO16
RP33 1 2 2.2KX2 I2CB_SCL_G R7 JTAG_TMS *10K_4_NC 1 2 R123
I2CB_SDA_G I2CB_SCL
+3V_GFX 3 4 R6 I2CB_SDA JTAG_TDI *10K_4_NC 1 2 R126
0 N/A N/A NVVDD_VID4
GPIO20 P4
P1 VGA_OVT# 10K_4 1 2 R129
1 IN N/A NVVDD_VID3
GPIO21
DGPU_VID0 *10K_4_NC 1 2 R596
2 OUT HIGH NC
DGPU_VID1 *10K_4_NC 1 2 R597
3 OUT HIGH NC
ROM_CS* H6
ROM_SI DGPU_VID2 10K_4 R598
4 OUT HIGH NC
MISC2(ROM) ROM_SI H5
ROM_SO
1 2

STRAP0 J2
ROM_SO H7
H4 ROM_SCLK DGPU_VID3 10K_4 1 2 R599
5 OUT N/A NVVDD_VID1
STRAP1 STRAP0 ROM_SCLK
STRAP2
J7
J6
STRAP1 DGPU_VID4 *10K_4_NC 1 2 R600
6 OUT N/A NVVDD_VID2
STRAP3 STRAP2
STRAP4
J5
J3
STRAP3 DGPU_VID5 10K_4 1 2 R601
7 OUT N/A NC
STRAP4
2 1 STRAP_REF_GND J1 VGA_ALERT 10K_4 1 2 R132
8 I/O LOW OVERT
R137 40.2K/F_4 MULTI_STRAP_REF_GND
BUFRST* L2 20120203 9 I/O LOW ALERT
VGA_PW R_LEVEL# 10K_4 1 2 R133
NC R605 R604 R600
L3 Mount R598 R599 R603 DGPU_VID0 10K_4 1 2 R607
10 OUT N/A NC
CEC
DGPU_VID1 10K_4 1 2 R606
11 OUT N/A NVVDD VID0
DGPU_VID2 *10K_4_NC 1 2 R605
12 IN N/A PWR_LEVEL
D D

DGPU_VID3 *10K_4_NC 1 2 R604


13 OUT N/A NVVDD VID5
DGPU_VID4 10K_4 1 2 R603

DGPU_VID5 *10K_4_NC 1 2 R602


Output VID0 VID1 VID2 VID3 VID4 VID5
VGA_PW R_LEVEL# C861 1
Quanta Computer Inc.
2 100P/50V_4
N13P-GL 0.95V 0 0 1 1 0 1 PROJECT : R08
JTAG_TCK *10K_4_NC 1 2 R136
N13P-GS 0.9V 0 0 0 0 1 1 Size Document Number Rev
JTAG_TRST# 10K_4 1 R138 A00
2 N13P-GS (GPIO&STRAPS) 4/5
Check VID PU/PD Date: Monday, February 13, 2012 Sheet 16 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U3G

N13P-GS 50 A
A2
A33
AA13
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N13P-GL-A1
GND_1
GND_2
GND_3
GND_105
GND_104
E22
E10
N13P-LP 40 A AA15
AA17
GND_4 GB4-128 GND_103 D33
E25
+VCC_DGFX_CORE +VCC_DGFX_CORE GND_5 GND_106
AA18 GND_6 GND_107 E5
U3F AA20 E7
N13P-GL-A1 GND_7 GND_108
AA12 VDD_001 V18
AA22
AB12
GND_8 GROUND GND_109 F28
F7
VDD_057 GND_9 GND_110
AA14 VDD_002 VDD_058 AB18 AB14 GND_10 GND_111 G10
AA16 VDD_003 VDD_059 V20 AB16 GND_11 GND_112 G13
A AA19 VDD_004
AA21 VDD_005 GB4-128 VDD_060 V22
W12
AB19
AB2
GND_12 GND_113 G16
G19
A
VDD_061 GND_13 GND_114
AA23 VDD_006 VDD_062 W14 AB21 GND_14 GND_115 G2
AB13 VDD_007
AB15 VDD_008 NVVDD VDD_063 W16
W19
AB23
AB28
GND_15 GND_116 G22
G25
VDD_064 GND_16 GND_117
AB17 VDD_009 VDD_065 W21 AB30 GND_17 GND_118 G28
AB20 VDD_010 VDD_066 W23 AB32 GND_18 GND_119 G3
AB22 VDD_011 VDD_067 Y13 AB5 GND_19 GND_120 G30
AC12 VDD_012 VDD_068 Y15 AB7 GND_20 GND_121 G32
AC14 VDD_013 VDD_069 Y17 AC13 GND_21 GND_122 G33
AC16 VDD_014 VDD_070 Y18 AC15 GND_22 GND_123 G5
AC19 VDD_015 VDD_071 Y20 AC17 GND_23 GND_124 G7
AC21 VDD_016 VDD_072 Y22 AC18 GND_24 GND_125 K2
AC23 VDD_017 XVDD_01 U1 AC20 GND_25 GND_126 K28
M12 VDD_018 XVDD_02 U2 AC22 GND_26 GND_127 K30
M14 VDD_019 XVDD_03 U3 AE2 GND_27 GND_128 K32
M16 VDD_020 XVDD_04 U4 AE28 GND_28 GND_129 K33
M19 VDD_021 XVDD_05 U5 AE30 GND_29 GND_130 K5
M21 VDD_022 XVDD_06 U6 AE32 GND_30 GND_131 K7
M23 VDD_023 XVDD_07 U7 AE33 GND_31 GND_132 M13
N13 VDD_024 XVDD_08 U8 AE5 GND_32 GND_133 M15
N15 VDD_025 XVDD_09 V1 AE7 GND_33 GND_134 M17
N17 VDD_026 XVDD_10 V2 AH10 GND_34 GND_135 M18
N18 VDD_027 XVDD_11 V3 AH13 GND_35 GND_136 M20
N20 VDD_028 XVDD_12 V4 AH16 GND_36 GND_137 M22
N22 VDD_029 XVDD_13 V5 AH19 GND_37 GND_138 N12
P12 VDD_030 XVDD_14 V6 AH2 GND_38 GND_139 N14
P14 VDD_031 XVDD_15 V7 AH22 GND_39 GND_140 N16
P16 VDD_032 XVDD_16 V8 AH24 GND_40 GND_141 N19
B P19 VDD_033 XVDD_17 W2 AH28 GND_41 GND_142 N2 B
P21 VDD_034 XVDD_18 W3 AH29 GND_42 GND_143 N21
P23 VDD_035 XVDD_19 W4 AH30 GND_43 GND_144 N23
R13 VDD_036 XVDD_20 W5 AH32 GND_44 GND_145 N28
R15 VDD_037 XVDD_21 W7 AH33 GND_45 GND_146 N30
R17 VDD_038 XVDD_22 W8 AH5 GND_46 GND_147 N32
R18 VDD_039 XVDD_23 Y1 AH7 GND_47 GND_148 N33
R20 VDD_040 XVDD_24 Y2 AJ7 GND_48 GND_149 N5
R22 VDD_041 XVDD_25 Y3 AK10 GND_49 GND_150 N7
T12 VDD_042 XVDD_26 Y4 AK7 GND_50 GND_151 P13
T14 VDD_043 XVDD_27 Y5 AL12 GND_51 GND_152 P15
T16 VDD_044 XVDD_28 Y6 AL14 GND_52 GND_153 P17
T19 VDD_045 XVDD_29 Y7 AL15 GND_53 GND_154 P18
T21 VDD_046 XVDD_30 Y8 AL17 GND_54 GND_155 P20
T23 VDD_047 XVDD_31 AA1 AL18 GND_55 GND_156 P22
U13 VDD_048 XVDD_32 AA2 AL2 GND_56 GND_157 R12
U15 VDD_049 XVDD_33 AA3 AL20 GND_57 GND_158 R14
U17 VDD_050 XVDD_34 AA4 AL21 GND_58 GND_159 R16
U18 VDD_051 XVDD_35 AA5 AL23 GND_59 GND_160 R19
U20 VDD_052 XVDD_36 AA6 AL24 GND_60 GND_161 R21
U22 VDD_053 XVDD_37 AA7 AL26 GND_61 GND_162 R23
V13 VDD_054 XVDD_38 AA8 AL28 GND_62 GND_163 T13
V15 VDD_055 AL30 GND_63 GND_164 T15
V17 VDD_056 AL32 GND_64 GND_165 T17
AL33 GND_65 GND_166 T18
AL5 GND_66 GND_167 T2
AM13 GND_67 GND_168 T20
AM16 GND_68 GND_169 T22
NVVDD Decoupling AM19 GND_69 GND_170 AG11
C AM22 GND_70 GND_171 T28 C
+VCC_DGFX_CORE AM25 T32
GND_71 GND_172
AN1 GND_72 GND_173 T5
PLACE UNDER BALLS AN10 T7
C225 0.01U/25V_4 GND_73 GND_174
1 2 AN13 GND_74 GND_175 U12
C226 1 2 0.01U/25V_4 AN16 U14
C227 0.01U/25V_4 GND_75 GND_176
1 2 AN19 GND_76 GND_177 U16
C228 1 2 0.01U/25V_4 AN22 U19
C229 0.01U/25V_4 GND_77 GND_178
1 2 AN25 GND_78 GND_179 U21
C230 1 2 0.01U/25V_4 AN30 U23
C231 0.01U/25V_4 GND_79 GND_180
1 2 AN34 GND_80 GND_181 V12
C232 1 2 0.01U/25V_4 AN4 V14
C233 0.022U/16V_4 GND_081 GND_182
1 2 AN7 GND_082 GND_183 V16
C234 1 2 0.022U/16V_4 AP2 V19
C235 0.022U/16V_4 GND_083 GND_184
1 2 AP33 GND_084 GND_185 V21
C236 1 2 0.047U/10V_4 B1 V23
C237 0.047U/10V_4 GND_085 GND_186
1 2 B10 GND_086 GND_187 W13
C238 1 2 0.047U/10V_4 B22 W15
C239 0.1U/16V_4 GND_087 GND_188
1 2 B25 GND_088 GND_189 W17
C240 1 2 0.1U/16V_4 B28 W18
C241 GND_089 GND_190
1 2 0.22U/10V_6 B31 GND_090 GND_191 W20
C242 1 2 0.22U/10V_6 B34 W22
C243 GND_091 GND_192
1 2 0.22U/10V_6 B4 GND_092 GND_193 W28
C244 1 2 1U/6.3V_4 B7 Y12
GND_093 GND_194
C10 GND_094 GND_195 Y14
C13 GND_095 GND_196 Y16
PLACE NEAR BALLS C19 Y19
C245 4.7U/6.3V_6 GND_096 GND_197
1 2 C22 GND_097 GND_198 Y21
C246 1 2 10U/6.3V_8 C25 Y23
C247 10U/6.3V_8 GND_098 GND_199
D 1 2 C28 GND_099 GND_200 AH11 D
C248 1 2 22U/6.3V_8 C7
C249 22U/6.3V_8 GND_100
1 2 D2 GND_101 GND_201 C16
D31 GND_102 GND_202 W32

330uF*2 at power page


Quanta Computer Inc.
PROJECT : R08
Size Document Number Rev
A00
N13P-GS (POWER & GND) 5/5
Date: Monday, February 13, 2012 Sheet 17 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

20120203
Change U6~U13 to AKD5LZWTW07 (hynix 1G)
14
14
14
14
http://laptopblue.vn
VMA_DQ[63..0]
VMA_DM[7..0]
CHANNEL A: 512MB/1024MB DDR3
VMA_W DQS[7..0]
VMA_RDQS[7..0]
U6 U7 U8 U9

VREFC_VMA1 M8 E3 VMA_DQ12 VREFC_VMA1 M8 E3 VMA_DQ25 VREFC_VMA3 M8 E3 VMA_DQ41 VREFC_VMA3 M8 E3 VMA_DQ58


VREFD_VMA1 VREFCA DQL0 VMA_DQ9 VREFD_VMA1 VREFCA DQL0 VMA_DQ26 VREFD_VMA3 VREFCA DQL0 VMA_DQ44 VREFD_VMA3 VREFCA DQL0 VMA_DQ59
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMA_DQ15 F2 VMA_DQ31 F2 VMA_DQ42 F2 VMA_DQ60
VMA_CMD9 DQL2 VMA_DQ10 VMA_CMD9 DQL2 VMA_DQ29 VMA_CMD9 DQL2 VMA_DQ45 VMA_CMD9 DQL2 VMA_DQ61
14 VMA_CMD9 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMA_CMD11 P7 H3 VMA_DQ13 VMA_CMD11 P7 H3 VMA_DQ24 VMA_CMD11 P7 H3 VMA_DQ47 VMA_CMD11 P7 H3 VMA_DQ63
14 VMA_CMD11 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
A VMA_CMD8 P3 H8 VMA_DQ11 VMA_CMD8 P3 H8 VMA_DQ28 VMA_CMD8 P3 H8 VMA_DQ43 VMA_CMD8 P3 H8 VMA_DQ57 A
14 VMA_CMD8 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
VMA_CMD25 N2 G2 VMA_DQ14 VMA_CMD25 N2 G2 VMA_DQ27 VMA_CMD25 N2 G2 VMA_DQ40 VMA_CMD25 N2 G2 VMA_DQ62
14 VMA_CMD25 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
VMA_CMD10 P8 H7 VMA_DQ8 VMA_CMD10 P8 H7 VMA_DQ30 VMA_CMD10 P8 H7 VMA_DQ46 VMA_CMD10 P8 H7 VMA_DQ56
14 VMA_CMD10 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
VMA_CMD24 P2 VMA_CMD24 P2 VMA_CMD24 P2 VMA_CMD24 P2
14 VMA_CMD24 A5 A5 A5 A5
VMA_CMD22 R8 VMA_CMD22 R8 VMA_CMD22 R8 VMA_CMD22 R8
14 VMA_CMD22 A6 A6 A6 A6
VMA_CMD7 R2 D7 VMA_DQ6 VMA_CMD7 R2 D7 VMA_DQ19 VMA_CMD7 R2 D7 VMA_DQ34 VMA_CMD7 R2 D7 VMA_DQ54
14 VMA_CMD7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMA_CMD21 T8 C3 VMA_DQ1 VMA_CMD21 T8 C3 VMA_DQ23 VMA_CMD21 T8 C3 VMA_DQ39 VMA_CMD21 T8 C3 VMA_DQ51
14 VMA_CMD21 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
VMA_CMD6 R3 C8 VMA_DQ5 VMA_CMD6 R3 C8 VMA_DQ17 VMA_CMD6 R3 C8 VMA_DQ32 VMA_CMD6 R3 C8 VMA_DQ55
14 VMA_CMD6 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
VMA_CMD29 L7 C2 VMA_DQ3 VMA_CMD29 L7 C2 VMA_DQ22 VMA_CMD29 L7 C2 VMA_DQ38 VMA_CMD29 L7 C2 VMA_DQ50
14 VMA_CMD29 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMA_CMD23 R7 A7 VMA_DQ4 VMA_CMD23 R7 A7 VMA_DQ16 VMA_CMD23 R7 A7 VMA_DQ33 VMA_CMD23 R7 A7 VMA_DQ52
14 VMA_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
VMA_CMD28 N7 A2 VMA_DQ0 VMA_CMD28 N7 A2 VMA_DQ21 VMA_CMD28 N7 A2 VMA_DQ37 VMA_CMD28 N7 A2 VMA_DQ48
14 VMA_CMD28 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMA_CMD20 T3 B8 VMA_DQ7 VMA_CMD20 T3 B8 VMA_DQ18 VMA_CMD20 T3 B8 VMA_DQ35 VMA_CMD20 T3 B8 VMA_DQ53
14 VMA_CMD20 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
VMA_CMD4 T7 A3 VMA_DQ2 VMA_CMD4 T7 A3 VMA_DQ20 VMA_CMD4 T7 A3 VMA_DQ36 VMA_CMD4 T7 A3 VMA_DQ49
14 VMA_CMD4 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
VMA_CMD14 M7 VMA_CMD14 M7 VMA_CMD14 M7 VMA_CMD14 M7
14 VMA_CMD14 A15 A15 A15 A15

VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2 VMA_CMD12 M2 B2


14 VMA_CMD12 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMA_CMD27 N8 D9 VMA_CMD27 N8 D9 VMA_CMD27 N8 D9 VMA_CMD27 N8 D9
14 VMA_CMD27 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMA_CMD26 M3 G7 VMA_CMD26 M3 G7 VMA_CMD26 M3 G7 VMA_CMD26 M3 G7
14 VMA_CMD26 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMA_CLKP0 J7 N9 VMA_CLKP0 J7 N9 VMA_CLKP1 J7 N9 VMA_CLKP1 J7 N9
14 VMA_CLKP0 CK VDD#N9 CK VDD#N9 14 VMA_CLKP1 CK VDD#N9 CK VDD#N9
VMA_CLKN0 K7 R1 VMA_CLKN0 K7 R1 VMA_CLKN1 K7 R1 VMA_CLKN1 K7 R1
14 VMA_CLKN0 CK VDD#R1 +1.5V_GFX CK VDD#R1 14 VMA_CLKN1 CK VDD#R1 CK VDD#R1 +1.5V_GFX
VMA_CMD3 K9 R9 VMA_CMD3 K9 R9 VMA_CMD19 K9 R9 VMA_CMD19 K9 R9
14 VMA_CMD3 CKE VDD#R9 CKE VDD#R9 +1.5V_GFX 14 VMA_CMD19 CKE VDD#R9 +1.5V_GFX CKE VDD#R9

VMA_CMD2 K1 A1 VMA_CMD2 K1 A1 VMA_CMD18 K1 A1 VMA_CMD18 K1 A1


14 VMA_CMD2 ODT VDDQ#A1 ODT VDDQ#A1 14 VMA_CMD18 ODT VDDQ#A1 ODT VDDQ#A1
VMA_CMD0 L2 A8 VMA_CMD0 L2 A8 VMA_CMD16 L2 A8 VMA_CMD16 L2 A8
14 VMA_CMD0 CS VDDQ#A8 CS VDDQ#A8 14 VMA_CMD16 CS VDDQ#A8 CS VDDQ#A8
B VMA_CMD30 J3 C1 VMA_CMD30 J3 C1 VMA_CMD30 J3 C1 VMA_CMD30 J3 C1 B
14 VMA_CMD30 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
VMA_CMD15 K3 C9 VMA_CMD15 K3 C9 VMA_CMD15 K3 C9 VMA_CMD15 K3 C9
14 VMA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
VMA_CMD13 L3 D2 VMA_CMD13 L3 D2 VMA_CMD13 L3 D2 VMA_CMD13 L3 D2
14 VMA_CMD13 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMA_W DQS1 F3 H2 VMA_W DQS3 F3 H2 VMA_W DQS5 F3 H2 VMA_W DQS7 F3 H2
VMA_RDQS1 DQSL VDDQ#H2 VMA_RDQS3 DQSL VDDQ#H2 VMA_RDQS5 DQSL VDDQ#H2 VMA_RDQS7 DQSL VDDQ#H2
G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9

VMA_DM1 E7 A9 VMA_DM3 E7 A9 VMA_DM5 E7 A9 VMA_DM7 E7 A9


VMA_DM0 DML VSS#A9 VMA_DM2 DML VSS#A9 VMA_DM4 DML VSS#A9 VMA_DM6 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMA_W DQS0 C7 J2 VMA_W DQS2 C7 J2 VMA_W DQS4 C7 J2 VMA_W DQS6 C7 J2
VMA_RDQS0 DQSU VSS#J2 VMA_RDQS2 DQSU VSS#J2 VMA_RDQS4 DQSU VSS#J2 VMA_RDQS6 DQSU VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
VMA_CMD5 T2 P9 VMA_CMD5 T2 P9 VMA_CMD5 T2 P9 VMA_CMD5 T2 P9
14 VMA_CMD5 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMA_ZQ1 L8 T9 VMA_ZQ2 L8 T9 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1


1

1
VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1
R140 D8 R141 D8 R142 D8 R143 D8
243/F_4 VSSQ#D8 243/F_4 VSSQ#D8 243/F_4 VSSQ#D8 243/F_4 VSSQ#D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 E8 J1 E8 J1 E8 J1 E8
2

2
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
C L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 C
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

96-BALL 96-BALL 96-BALL 96-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TQ1G63DFR-11C H5TQ1G63DFR-11C H5TQ1G63DFR-11C H5TQ1G63DFR-11C

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX


2

2
R148 R149 R162 R163
VMA_CLKP0 R144 R145 R146 R147
1.33K/F_4 1.33K/F_4
(MCLK+/MCLK- termination) VMA_CLKP1 1.33K/F_4 1.33K/F_4
R148
162/F_4 N13P-GL 162/F_4 (CS11622FB15) R149
1

1
VREFC_VMA1 VREFD_VMA1 162/F_4 VREFC_VMA3 VREFD_VMA3
VMA_CLKN0
1

1
VMA_CLKN1
1

1
N13P-GS 80.6/F_4 (CS08062FB19)
R150 C250 R151 C251 R152 C252 R153 C253
1.33K/F_4 0.01U/25V_4 1.33K/F_4 0.01U/25V_4 1.33K/F_4 0.01U/25V_4 1.33K/F_4 0.01U/25V_4
2

2
2

2
+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX
D D

C884 1 2 1U/6.3V_4 C254 1 2 1U/6.3V_4 C255 1 2 1U/6.3V_4 C256 1 2 1U/6.3V_4 C257 1 2 1U/6.3V_4
C258 1 2 1U/6.3V_4 C259 1 2 1U/6.3V_4 C260 1 2 1U/6.3V_4 C261 1 2 *1U/6.3V_4_NC
C886 1 2 1U/6.3V_4 C262 1 2 1U/6.3V_4 C263 1 2 1U/6.3V_4 C264 1 2 1U/6.3V_4 C265 1 2 1U/6.3V_4
C887 1 2 1U/6.3V_4 C267 1 2 1U/6.3V_4 C268 1 2 1U/6.3V_4 C269 1 2 1U/6.3V_4 C270 1 2 1U/6.3V_4
C888 1 2 1U/6.3V_4 C271 1 2 0.047U/10V_4 C272 1 2 0.1U/16V_4 C273 1 2 0.1U/16V_4 C274 1 2 0.047U/10V_4
C889 1 2 1U/6.3V_4 C275
C280
1 2 0.1U/16V_4 C276 1 2 0.047U/10V_4 C277 1 2 0.1U/16V_4 C278 1 2 0.047U/10V_4 Quanta Computer Inc.
1 2 0.047U/10V_4 C281 1 2 0.1U/16V_4 C282 1 2 0.1U/16V_4 C283 1 2 0.1U/16V_4
C891 1 2 1U/6.3V_4 C285 1 2 0.1U/16V_4 C286 1 2 0.047U/10V_4 C287 1 2 *0.1U/16V_4_NC C288 1 2 0.1U/16V_4
C892 1 2 1U/6.3V_4 C290 1 2 0.1U/16V_4 C291 1 2 *0.1U/16V_4_NC C292 1 2 *0.1U/16V_4_NC C293 1 2 0.1U/16V_4 PROJECT : R08
C893 1 2 1U/6.3V_4 C294 1 2 0.1U/16V_4 C295 1 2 *0.1U/16V_4_NC C296 1 2 *0.1U/16V_4_NC C297 1 2 0.1U/16V_4 Size Document Number Rev
A00
N13P-GS VRAM-1(DDR3 BGA96)
Date: Monday, February 13, 2012 Sheet 18 of 55
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

14
14
14
14
http://laptopblue.vn
VMC_DQ[63..0]
VMC_DM[7..0]
CHANNEL B: 512MB/1024MB DDR3
VMC_W DQS[7..0]
VMC_RDQS[7..0]

U10 U11 U12 U13

VREFC_VMC1 M8 E3 VMC_DQ13 VREFC_VMC1 M8 E3 VMC_DQ4 VREFC_VMC3 M8 E3 VMC_DQ32 VREFC_VMC3 M8 E3 VMC_DQ41


VREFD_VMC1 VREFCA DQL0 VMC_DQ9 VREFD_VMC1 VREFCA DQL0 VMC_DQ0 VREFD_VMC3 VREFCA DQL0 VMC_DQ36 VREFD_VMC3 VREFCA DQL0 VMC_DQ44
H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7 H1 VREFDQ DQL1 F7
F2 VMC_DQ12 F2 VMC_DQ5 F2 VMC_DQ34 F2 VMC_DQ43
VMC_CMD9 DQL2 VMC_DQ11 VMC_CMD9 DQL2 VMC_DQ3 VMC_CMD9 DQL2 VMC_DQ39 VMC_CMD9 DQL2 VMC_DQ46
14 VMC_CMD9 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8 N3 A0 DQL3 F8
VMC_CMD11 P7 H3 VMC_DQ15 VMC_CMD11 P7 H3 VMC_DQ7 VMC_CMD11 P7 H3 VMC_DQ33 VMC_CMD11 P7 H3 VMC_DQ42
14 VMC_CMD11 A1 DQL4 A1 DQL4 A1 DQL4 A1 DQL4
A VMC_CMD8 P3 H8 VMC_DQ8 VMC_CMD8 P3 H8 VMC_DQ1 VMC_CMD8 P3 H8 VMC_DQ38 VMC_CMD8 P3 H8 VMC_DQ45 A
14 VMC_CMD8 A2 DQL5 A2 DQL5 A2 DQL5 A2 DQL5
VMC_CMD25 N2 G2 VMC_DQ14 VMC_CMD25 N2 G2 VMC_DQ6 VMC_CMD25 N2 G2 VMC_DQ35 VMC_CMD25 N2 G2 VMC_DQ40
14 VMC_CMD25 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6
VMC_CMD10 P8 H7 VMC_DQ10 VMC_CMD10 P8 H7 VMC_DQ2 VMC_CMD10 P8 H7 VMC_DQ37 VMC_CMD10 P8 H7 VMC_DQ47
14 VMC_CMD10 A4 DQL7 A4 DQL7 A4 DQL7 A4 DQL7
VMC_CMD24 P2 VMC_CMD24 P2 VMC_CMD24 P2 VMC_CMD24 P2
14 VMC_CMD24 A5 A5 A5 A5
VMC_CMD22 R8 VMC_CMD22 R8 VMC_CMD22 R8 VMC_CMD22 R8
14 VMC_CMD22 A6 A6 A6 A6
VMC_CMD7 R2 D7 VMC_DQ27 VMC_CMD7 R2 D7 VMC_DQ19 VMC_CMD7 R2 D7 VMC_DQ59 VMC_CMD7 R2 D7 VMC_DQ51
14 VMC_CMD7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMC_CMD21 T8 C3 VMC_DQ29 VMC_CMD21 T8 C3 VMC_DQ20 VMC_CMD21 T8 C3 VMC_DQ61 VMC_CMD21 T8 C3 VMC_DQ52
14 VMC_CMD21 A8 DQU1 A8 DQU1 A8 DQU1 A8 DQU1
VMC_CMD6 R3 C8 VMC_DQ26 VMC_CMD6 R3 C8 VMC_DQ18 VMC_CMD6 R3 C8 VMC_DQ58 VMC_CMD6 R3 C8 VMC_DQ49
14 VMC_CMD6 A9 DQU2 A9 DQU2 A9 DQU2 A9 DQU2
VMC_CMD29 L7 C2 VMC_DQ28 VMC_CMD29 L7 C2 VMC_DQ22 VMC_CMD29 L7 C2 VMC_DQ63 VMC_CMD29 L7 C2 VMC_DQ54
14 VMC_CMD29 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMC_CMD23 R7 A7 VMC_DQ24 VMC_CMD23 R7 A7 VMC_DQ16 VMC_CMD23 R7 A7 VMC_DQ57 VMC_CMD23 R7 A7 VMC_DQ48
14 VMC_CMD23 A11 DQU4 A11 DQU4 A11 DQU4 A11 DQU4
VMC_CMD28 N7 A2 VMC_DQ30 VMC_CMD28 N7 A2 VMC_DQ23 VMC_CMD28 N7 A2 VMC_DQ62 VMC_CMD28 N7 A2 VMC_DQ55
14 VMC_CMD28 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5 A12/BC DQU5
VMC_CMD20 T3 B8 VMC_DQ25 VMC_CMD20 T3 B8 VMC_DQ17 VMC_CMD20 T3 B8 VMC_DQ56 VMC_CMD20 T3 B8 VMC_DQ50
14 VMC_CMD20 A13 DQU6 A13 DQU6 A13 DQU6 A13 DQU6
VMC_CMD4 T7 A3 VMC_DQ31 VMC_CMD4 T7 A3 VMC_DQ21 VMC_CMD4 T7 A3 VMC_DQ60 VMC_CMD4 T7 A3 VMC_DQ53
14 VMC_CMD4 A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
VMC_CMD14 M7 VMC_CMD14 M7 VMC_CMD14 M7 VMC_CMD14 M7
14 VMC_CMD14 A15 A15 A15 A15

VMC_CMD12 M2 B2 VMC_CMD12 M2 B2 VMC_CMD12 M2 B2 VMC_CMD12 M2 B2


14 VMC_CMD12 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2 BA0 VDD#B2
VMC_CMD27 N8 D9 VMC_CMD27 N8 D9 VMC_CMD27 N8 D9 VMC_CMD27 N8 D9
14 VMC_CMD27 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMC_CMD26 M3 G7 VMC_CMD26 M3 G7 VMC_CMD26 M3 G7 VMC_CMD26 M3 G7
14 VMC_CMD26 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
VDD#K2 K2 VDD#K2 K2 VDD#K2 K2 VDD#K2 K2
VDD#K8 K8 VDD#K8 K8 VDD#K8 K8 VDD#K8 K8
VDD#N1 N1 VDD#N1 N1 VDD#N1 N1 VDD#N1 N1
VMC_CLKP0 J7 N9 VMC_CLKP0 J7 N9 VMC_CLKP1 J7 N9 VMC_CLKP1 J7 N9
14 VMC_CLKP0 CK VDD#N9 CK VDD#N9 14 VMC_CLKP1 CK VDD#N9 CK VDD#N9
VMC_CLKN0 K7 R1 VMC_CLKN0 K7 R1 VMC_CLKN1 K7 R1 VMC_CLKN1 K7 R1
14 VMC_CLKN0 CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX 14 VMC_CLKN1 CK VDD#R1 +1.5V_GFX CK VDD#R1 +1.5V_GFX
VMC_CMD3 K9 R9 VMC_CMD3 K9 R9 VMC_CMD19 K9 R9 VMC_CMD19 K9 R9
14 VMC_CMD3 CKE VDD#R9 CKE VDD#R9 14 VMC_CMD19 CKE VDD#R9 CKE VDD#R9

VMC_CMD2 K1 A1 VMC_CMD2 K1 A1 VMC_CMD18 K1 A1 VMC_CMD18 K1 A1


14 VMC_CMD2 ODT VDDQ#A1 ODT VDDQ#A1 14 VMC_CMD18 ODT VDDQ#A1 ODT VDDQ#A1
VMC_CMD0 L2 A8 VMC_CMD0 L2 A8 VMC_CMD16 L2 A8 VMC_CMD16 L2 A8
14 VMC_CMD0 CS VDDQ#A8 CS VDDQ#A8 14 VMC_CMD16 CS VDDQ#A8 CS VDDQ#A8
B VMC_CMD30 J3 C1 VMC_CMD30 J3 C1 VMC_CMD30 J3 C1 VMC_CMD30 J3 C1 B
14 VMC_CMD30 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
VMC_CMD15 K3 C9 VMC_CMD15 K3 C9 VMC_CMD15 K3 C9 VMC_CMD15 K3 C9
14 VMC_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
VMC_CMD13 L3 D2 VMC_CMD13 L3 D2 VMC_CMD13 L3 D2 VMC_CMD13 L3 D2
14 VMC_CMD13 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9 VDDQ#E9 E9
VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1 VDDQ#F1 F1
VMC_W DQS1 F3 H2 VMC_W DQS0 F3 H2 VMC_W DQS4 F3 H2 VMC_W DQS5 F3 H2
VMC_RDQS1 DQSL VDDQ#H2 VMC_RDQS0 DQSL VDDQ#H2 VMC_RDQS4 DQSL VDDQ#H2 VMC_RDQS5 DQSL VDDQ#H2
G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9 G3 DQSL VDDQ#H9 H9

VMC_DM1 E7 A9 VMC_DM0 E7 A9 VMC_DM4 E7 A9 VMC_DM5 E7 A9


VMC_DM3 DML VSS#A9 VMC_DM2 DML VSS#A9 VMC_DM7 DML VSS#A9 VMC_DM6 DML VSS#A9
D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3 D3 DMU VSS#B3 B3
VSS#E1 E1 VSS#E1 E1 VSS#E1 E1 VSS#E1 E1
VSS#G8 G8 VSS#G8 G8 VSS#G8 G8 VSS#G8 G8
VMC_W DQS3 C7 J2 VMC_W DQS2 C7 J2 VMC_W DQS7 C7 J2 VMC_W DQS6 C7 J2
VMC_RDQS3 DQSU VSS#J2 VMC_RDQS2 DQSU VSS#J2 VMC_RDQS7 DQSU VSS#J2 VMC_RDQS6 DQSU VSS#J2
B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8 B7 DQSU VSS#J8 J8
VSS#M1 M1 VSS#M1 M1 VSS#M1 M1 VSS#M1 M1
VSS#M9 M9 VSS#M9 M9 VSS#M9 M9 VSS#M9 M9
VSS#P1 P1 VSS#P1 P1 VSS#P1 P1 VSS#P1 P1
VMC_CMD5 T2 P9 VMC_CMD5 T2 P9 VMC_CMD5 T2 P9 VMC_CMD5 T2 P9
14 VMC_CMD5 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
VSS#T1 T1 VSS#T1 T1 VSS#T1 T1 VSS#T1 T1
VMC_ZQ1 L8 T9 VMC_ZQ2 L8 T9 VMC_ZQ3 L8 T9 VMC_ZQ4 L8 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9

VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1 VSSQ#B1 B1


1

1
VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9 VSSQ#B9 B9
VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1 VSSQ#D1 D1
R154 D8 R155 D8 R156 D8 R157 D8
243/F_4 VSSQ#D8 243/F_4 VSSQ#D8 243/F_4 VSSQ#D8 243/F_4 VSSQ#D8
VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2 VSSQ#E2 E2
J1 E8 J1 E8 J1 E8 J1 E8
2

2
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
C L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 L1 NC#L1 VSSQ#F9 F9 C
J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1 J9 NC#J9 VSSQ#G1 G1
L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9 L9 NC#L9 VSSQ#G9 G9

96-BALL 96-BALL 96-BALL 96-BALL


SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
H5TQ1G63DFR-11C H5TQ1G63DFR-11C H5TQ1G63DFR-11C H5TQ1G63DFR-11C

+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX


2

2
VMC_CLKP0 R158 R159 VMC_CLKP1 R160 R161
1.33K/F_4 1.33K/F_4 1.33K/F_4 1.33K/F_4
R162 R163
162/F_4 162/F_4
1

1
VREFC_VMC1 VREFD_VMC1 VREFC_VMC3 VREFD_VMC3
VMC_CLKN0 VMC_CLKN1
1

1
1

1
R164 R165 R166 R167
1.33K/F_4 C298 1.33K/F_4 C299 1.33K/F_4 C300 1.33K/F_4 C301
0.01U/25V_4 0.01U/25V_4 0.01U/25V_4 0.01U/25V_4
2

2
2

2
+1.5V_GFX +1.5V_GFX +1.5V_GFX +1.5V_GFX
D D

C302 1 2 1U/6.3V_4 C303 1 2 1U/6.3V_4 C304 1 2 *1U/6.3V_4_NC C305 1 2 1U/6.3V_4


C310 1 2 *1U/6.3V_4_NC C315 1 2 1U/6.3V_4 C308 1 2 1U/6.3V_4 C321 1 2 1U/6.3V_4
C306 1 2 1U/6.3V_4 C316 1 2 *1U/6.3V_4_NC C314 1 2 1U/6.3V_4 C313 1 2 1U/6.3V_4
C312 1 2 *1U/6.3V_4_NC C307 1 2 *1U/6.3V_4_NC C311 1 2 1U/6.3V_4 C317 1 2 1U/6.3V_4 Project Name
C318 1 2 0.1U/16V_4 C319 1 2 0.1U/16V_4 C320 1 2 *0.1U/16V_4_NC C309 1 2 *0.1U/16V_4_NC
C322
C326
1 2 0.047U/10V_4
0.1U/16V_4
C335
C327
1 2 0.1U/16V_4
0.047U/10V_4
C324
C328
1 2 *0.1U/16V_4_NC
*0.1U/16V_4_NC
C325
C329
1 2 *0.1U/16V_4_NC
0.1U/16V_4
Quanta Computer Inc.
1 2 1 2 1 2 1 2
C330 1 2 0.1U/16V_4 C331 1 2 0.1U/16V_4 C332 1 2 0.1U/16V_4 C333 1 2 0.1U/16V_4
C334 1 2 0.047U/10V_4 C323 1 2 *0.1U/16V_4_NC C336 1 2 0.1U/16V_4 C337 1 2 0.047U/10V_4 PROJECT : R08
C338 1 2 0.1U/16V_4 C339 1 2 *0.1U/16V_4_NC C340 1 2 *0.1U/16V_4_NC C341 1 2 0.1U/16V_4 Size Document Number Rev
A00
N13P-GS VRAM-2(DDR3 BGA96)
Date: Monday, February 13, 2012 Sheet 19 of 55
1 2 3 4 5 6 7 8
5 4 3 2 1

Cougar Point/Panther Point (DMI,FDI,PM) http://laptopblue.vn


U14C
PCH Pull-high/low(CLG)
+3.3V_SUS
DMI_RXN0 BC24 BJ14 FDI_TXN0
6 DMI_RXN0 DMI0RXN FDI_RXN0 FDI_TXN0 6
DMI_RXN1 BE20 AY14 FDI_TXN1 RP3 10KX4
6 DMI_RXN1 DMI1RXN FDI_RXN1 FDI_TXN1 6
DMI_RXN2 BG18 BE14 FDI_TXN2 PCIE_W AKE# 1 2
6 DMI_RXN2 DMI2RXN FDI_RXN2 FDI_TXN2 6
DMI_RXN3 BG20 BH13 FDI_TXN3 PM_RI# 3 4
6 DMI_RXN3 DMI3RXN FDI_RXN3 FDI_TXN3 6
BC12 FDI_TXN4 ME_SUS_PW R_ACK 5 6
FDI_RXN4 FDI_TXN4 6
DMI_RXP0 BE24 BJ12 FDI_TXN5 AC_PRESENT 7 8
6 DMI_RXP0 DMI0RXP FDI_RXN5 FDI_TXN5 6
D DMI_RXP1 BC20 BG10 FDI_TXN6 D
6 DMI_RXP1 DMI1RXP FDI_RXN6 FDI_TXN6 6
DMI_RXP2 BJ18 BG9 FDI_TXN7
6 DMI_RXP2 DMI2RXP FDI_RXN7 FDI_TXN7 6
DMI_RXP3 BJ20
6 DMI_RXP3 DMI3RXP
BG14 FDI_TXP0
FDI_RXP0 FDI_TXP0 6
DMI_TXN0 AW24 BB14 FDI_TXP1 PM_BATLOW # R246 1 2 10K_4
6 DMI_TXN0 DMI0TXN FDI_RXP1 FDI_TXP1 6
DMI_TXN1 AW20 BF14 FDI_TXP2
6 DMI_TXN1 DMI1TXN FDI_RXP2 FDI_TXP2 6
DMI_TXN2 BB18 BG13 FDI_TXP3
6 DMI_TXN2 DMI2TXN FDI_RXP3 FDI_TXP3 6
DMI_TXN3 AV18 BE12 FDI_TXP4
6 DMI_TXN3 DMI3TXN FDI_RXP4 FDI_TXP4 6

DMI
FDI
BG12 FDI_TXP5 +3.3V_RUN
FDI_RXP5 FDI_TXP5 6
DMI_TXP0 AY24 BJ10 FDI_TXP6
6 DMI_TXP0 DMI0TXP FDI_RXP6 FDI_TXP6 6
DMI_TXP1 AY20 BH9 FDI_TXP7 RP5 10KX2
6 DMI_TXP1 DMI1TXP FDI_RXP7 FDI_TXP7 6
DMI_TXP2 AY18 CLKRUN# 1 2
6 DMI_TXP2 DMI2TXP
DMI_TXP3 AU18 SYS_RESET# 3 4
6 DMI_TXP3 DMI3TXP
AW16 FDI_INT
FDI_INT FDI_INT 6

DMI_ZCOMP, DMI_IRCOMP 4mil BJ24 AV12 FDI_FSYNC0


DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 6

+1.05V_PCH R168 1 2 49.9/F_4 DMI_COMP BG25 BC10 FDI_FSYNC1 RP6 10KX2


DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 6
RSMRST# 1 2
R169 2 1 750/F_4 DMI2RBIAS BH21 AV14 FDI_LSYNC0 SYS_PW ROK 3 4
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 6
BB10 FDI_LSYNC1
FDI_LSYNC1 FDI_LSYNC1 6

DSWVRMEN A18 DSW VRMEN


*100P/50V_4_NC 2 1 C858 SYS_PW ROK
RSMRST# C851 1 2 *100P/50V_4_NC

System Power Management


*100P/50V_4_NC 2 1 C859 EC_PW ROK ME_SUS_PW R_ACK C12 E22 RSMRST#
C SUSACK# DPWROK C

SYS_RESET# K3 B9 PCIE_W AKE#


SYS_RESET# WAKE#

SYS_PW ROK P12 +3V N3 CLKRUN#


SYS_PWROK CLKRUN# / GPIO32 CLKRUN# 38

EC_PW ROK L22 +3V_S5 G8


7,38 EC_PW ROK PWROK SUS_STAT# / GPIO61
+RTC_CELL
HW PG L10 +3V_S5 N14 SUSCLK
38,43 HW PG APWROK SUSCLK / GPIO62 TP6

2
TP7
PM_DRAM_PW RGD B13 +3V_S5 D10 SIO_SLP_S5# R170
7 PM_DRAM_PW RGD DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# 38
330K_4

RSMRST# C21 H4 SIO_SLP_S4#


38 RSMRST# SIO_SLP_S4# 38,48

1
RSMRST# SLP_S4# DSW VRMEN

1
ME_SUS_PW R_ACK K16 +3V_S5 F4 SIO_SLP_S3#
38 ME_SUS_PW R_ACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# SIO_SLP_S3# 9,38,48
R171
*330K_4_NC
SIO_PW RBTN# E20 DSW G10 W/O support iAMT
38 SIO_PW RBTN# PWRBTN# SLP_A#

2
AC_PRESENT H20 DSW G16
38 AC_PRESENT ACPRESENT / GPIO31 SLP_SUS#
W/O support Deep Sx
On Die DSW VR Enable
B PM_BATLOW # H_PM_SYNC B
E10 BATLOW# / GPIO72 +3V_S5 PMSYNCH AP14 H_PM_SYNC 7
High = Enable (Default)
PM_RI# A10 +3V_S5 K14 SIO_SLP_LAN# T14 Low = Disable
RI# SLP_LAN# / GPIO29

BD82HM77-SLJ8C-MM#915664

+3.3V_SUS

C342
1

0.1U/16V_4
2
5

U15
2 IMVP_PW RGD 38,42,52
SYS_PW ROK 4
1 EC_PW ROK
A A
1

TC7SH08FU
3

R172
100K_4
2

Quanta Computer Inc.


PROJECT : R08
Size Document Number Rev
1A
Panther Point 1/7
Date: Monday, February 13, 2012 Sheet 20 of 55
5 4 3 2 1
5 4 3 2 1

Cougar Point/Panther Point (LVDS,DDI) http://laptopblue.vn


Cougar Point/Panther Point (GND)
U14I U14H
H5 VSS[0]
AY4 VSS[159] VSS[259] H46
U14D AY42 K18 AA17 AK38
VSS[160] VSS[260] VSS[1] VSS[80]
AY46 VSS[161] VSS[261] K26 AA2 VSS[2] VSS[81] AK4
PANEL_BKEN J47 AP43 AY8 K39 AA3 AK42
38 PANEL_BKEN L_BKLTEN SDVO_TVCLKINN VSS[162] VSS[262] VSS[3] VSS[82]
ENVDD M45 AP45 B11 K46 AA33 AK46
27 ENVDD L_VDD_EN SDVO_TVCLKINP VSS[163] VSS[263] VSS[4] VSS[83]
D B15 VSS[164] VSS[264] K7 AA34 VSS[5] VSS[84] AK8 D
LCD_PW M P45 AM42 B19 L18 AB11 AL16
27 LCD_PW M L_BKLTCTL SDVO_STALLN VSS[165] VSS[265] VSS[6] VSS[85]
SDVO_STALLP AM40 B23 VSS[166] VSS[266] L2 AB14 VSS[7] VSS[86] AL17
LCD_DDCCLK T40 B27 L20 AB39 AL19
27 LCD_DDCCLK LCD_DDCDAT L_DDC_CLK VSS[167] VSS[267] VSS[8] VSS[87]
27 LCD_DDCDAT K47 L_DDC_DATA SDVO_INTN AP39 B31 VSS[168] VSS[268] L26 AB4 VSS[9] VSS[88] AL2
SDVO_INTP AP40 B35 VSS[169] VSS[269] L28 AB43 VSS[10] VSS[89] AL21
DIS_L_CTRL_CLK T45 B39 L36 AB5 AL23
DIS_L_CTRL_DATA P39 L_CTRL_CLK VSS[170] VSS[270] VSS[11] VSS[90]
L_CTRL_DATA B7 VSS[171] VSS[271] L48 AB7 VSS[12] VSS[91] AL26
F45 VSS[172] VSS[272] M12 AC19 VSS[13] VSS[92] AL27
R173 2 1 2.37K/F_4 LVDS_IBG AF37 P38 HDMI_SCL BB12 P16 AC2 AL31
LVDS_VBG LVD_IBG SDVO_CTRLCLK HDMI_SDA HDMI_SCL 29 VSS[173] VSS[273] VSS[14] VSS[93]
AF36 LVD_VBG SDVO_CTRLDATA M39 HDMI_SDA 29 BB16 VSS[174] VSS[274] M18 AC21 VSS[15] VSS[94] AL33
T16 BB20 M22 AC24 AL34
VSS[175] VSS[275] VSS[16] VSS[95]
AE48 LVD_VREFH BB22 VSS[176] VSS[276] M24 AC33 VSS[17] VSS[96] AL48

INT. HDMI
AE47 LVD_VREFL DDPB_AUXN AT49 BB24 VSS[177] VSS[277] M30 AC34 VSS[18] VSS[97] AM11
DDPB_AUXP AT47 BB28 VSS[178] VSS[278] M32 AC48 VSS[19] VSS[98] AM14
DDPB_HPD AT40 INT_HDMI_HPD INT_HDMI_HPD 29 BB30 VSS[179] VSS[279] M34 AD10 VSS[20] VSS[99] AM36
INT_TXLCLKOUTN AK39 BB38 M38 AD11 AM39
27 INT_TXLCLKOUTN LVDSA_CLK# VSS[180] VSS[280] VSS[21] VSS[100]

LVDS
INT_TXLCLKOUTP AK40 AV42 INT_HDMI_TXN2 BB4 M4 AD12 AM43
27 INT_TXLCLKOUTP LVDSA_CLK DDPB_0N INT_HDMI_TXN2 29 VSS[181] VSS[281] VSS[22] VSS[101]
DDPB_0P AV40 INT_HDMI_TXP2 INT_HDMI_TXP2 29 BB46 VSS[182] VSS[282] M42 AD13 VSS[23] VSS[102] AM45
INT_TXLOUTN0 AN48 AV45 INT_HDMI_TXN1 BC14 M46 AD19 AM46
27 INT_TXLOUTN0 LVDSA_DATA#0 DDPB_1N INT_HDMI_TXN1 29 VSS[183] VSS[283] VSS[24] VSS[103]
INT_TXLOUTN1 AM47 AV46 INT_HDMI_TXP1 BC18 M8 AD24 AM7
27 INT_TXLOUTN1 LVDSA_DATA#1 DDPB_1P INT_HDMI_TXP1 29 VSS[184] VSS[284] VSS[25] VSS[104]

Digital Display Interface


INT_TXLOUTN2 AK47 AU48 INT_HDMI_TXN0 BC2 N18 AD26 AN2
27 INT_TXLOUTN2 LVDSA_DATA#2 DDPB_2N INT_HDMI_TXN0 29 VSS[185] VSS[285] VSS[26] VSS[105]
AJ48 LVDSA_DATA#3 DDPB_2P AU47 INT_HDMI_TXP0 INT_HDMI_TXP0 29 BC22 VSS[186] VSS[286] P30 AD27 VSS[27] VSS[106] AN29
DDPB_3N AV47 INT_HDMI_TXCN INT_HDMI_TXCN 29 BC26 VSS[187] VSS[287] N47 AD33 VSS[28] VSS[107] AN3
INT_TXLOUTP0 AN47 AV49 INT_HDMI_TXCP BC32 P11 AD34 AN31
27 INT_TXLOUTP0 LVDSA_DATA0 DDPB_3P INT_HDMI_TXCP 29 VSS[188] VSS[288] VSS[29] VSS[108]
INT_TXLOUTP1 AM49 BC34 P18 AD36 AP12
27 INT_TXLOUTP1 LVDSA_DATA1 VSS[189] VSS[289] VSS[30] VSS[109]
INT_TXLOUTP2 AK49 BC36 T33 AD37 AP19
27 INT_TXLOUTP2 LVDSA_DATA2 VSS[190] VSS[290] VSS[31] VSS[110]
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46 BC40 VSS[191] VSS[291] P40 AD38 VSS[32] VSS[111] AP28
DDPC_CTRLDATA P42 BC42 VSS[192] VSS[292] P43 AD39 VSS[33] VSS[112] AP30
C BC48 P47 AD4 AP32 C
INT_TXUCLKOUTN AF40 VSS[193] VSS[293] VSS[34] VSS[113]
27 INT_TXUCLKOUTN LVDSB_CLK# BD46 VSS[194] VSS[294] P7 AD40 VSS[35] VSS[114] AP38
INT_TXUCLKOUTP AF39 AP47 BD5 R2 AD42 AP4
27 INT_TXUCLKOUTP LVDSB_CLK DDPC_AUXN VSS[195] VSS[295] VSS[36] VSS[115]
DDPC_AUXP AP49 BE22 VSS[196] VSS[296] R48 AD43 VSS[37] VSS[116] AP42
INT_TXUOUTN0 AH45 AT38 BE26 T12 AD45 AP46
27 INT_TXUOUTN0 LVDSB_DATA#0 DDPC_HPD VSS[197] VSS[297] VSS[38] VSS[117]
INT_TXUOUTN1 AH47 BE40 T31 AD46 AP8
27 INT_TXUOUTN1 LVDSB_DATA#1 VSS[198] VSS[298] VSS[39] VSS[118]
INT_TXUOUTN2 AF49 AY47 BF10 T37 AD8 AR2
27 INT_TXUOUTN2 LVDSB_DATA#2 DDPC_0N VSS[199] VSS[299] VSS[40] VSS[119]
AF45 LVDSB_DATA#3 DDPC_0P AY49 BF12 VSS[200] VSS[300] T4 AE2 VSS[41] VSS[120] AR48
DDPC_1N AY43 BF16 VSS[201] VSS[301] W34 AE3 VSS[42] VSS[121] AT11
INT_TXUOUTP0 AH43 AY45 BF20 T46 AF10 AT13
27 INT_TXUOUTP0 LVDSB_DATA0 DDPC_1P VSS[202] VSS[302] VSS[43] VSS[122]
INT_TXUOUTP1 AH49 BA47 BF22 T47 AF12 AT18
27 INT_TXUOUTP1 LVDSB_DATA1 DDPC_2N VSS[203] VSS[303] VSS[44] VSS[123]
INT_TXUOUTP2 AF47 BA48 BF24 T8 AD14 AT22
27 INT_TXUOUTP2 LVDSB_DATA2 DDPC_2P VSS[204] VSS[304] VSS[45] VSS[124]
AF43 LVDSB_DATA3 DDPC_3N BB47 BF26 VSS[205] VSS[305] V11 AD16 VSS[46] VSS[125] AT26
DDPC_3P BB49 BF28 VSS[206] VSS[306] V17 AF16 VSS[47] VSS[126] AT28
BD3 VSS[207] VSS[307] V26 AF19 VSS[48] VSS[127] AT30
BF30 VSS[208] VSS[308] V27 AF24 VSS[49] VSS[128] AT32
INT_CRT_BLU N48 M43 BF38 V29 AF26 AT34
28 INT_CRT_BLU CRT_BLUE DDPD_CTRLCLK VSS[209] VSS[309] VSS[50] VSS[129]
INT_CRT_GRE P49 M36 BF40 V31 AF27 AT39
28 INT_CRT_GRE CRT_GREEN DDPD_CTRLDATA VSS[210] VSS[310] VSS[51] VSS[130]
INT_CRT_RED T49 BF8 V36 AF29 AT42
28 INT_CRT_RED CRT_RED VSS[211] VSS[311] VSS[52] VSS[131]
BG17 VSS[212] VSS[312] V39 AF31 VSS[53] VSS[132] AT46
DDPD_AUXN AT45 BG21 VSS[213] VSS[313] V43 AF38 VSS[54] VSS[133] AT7
CRT

INT_DDCCLK T39 AT43 BG33 V7 AF4 AU24


28 INT_DDCCLK INT_DDCDAT CRT_DDC_CLK DDPD_AUXP VSS[214] VSS[314] VSS[55] VSS[134]
28 INT_DDCDAT M40 CRT_DDC_DATA DDPD_HPD BH41 BG44 VSS[215] VSS[315] W17 AF42 VSS[56] VSS[135] AU30
BG8 VSS[216] VSS[316] W19 AF46 VSS[57] VSS[136] AV16
DDPD_0N BB43 BH11 VSS[217] VSS[317] W2 AF5 VSS[58] VSS[137] AV20
INT_CRT_HSYNC M47 BB45 BH15 W27 AF7 AV24
28 INT_CRT_HSYNC CRT_HSYNC DDPD_0P VSS[218] VSS[318] VSS[59] VSS[138]
INT_CRT_VSYNC M49 BF44 BH17 W48 AF8 AV30
28 INT_CRT_VSYNC CRT_VSYNC DDPD_1N VSS[219] VSS[319] VSS[60] VSS[139]
DDPD_1P BE44 BH19 VSS[220] VSS[320] Y12 AG19 VSS[61] VSS[140] AV38
DDPD_2N BF42 H10 VSS[221] VSS[321] Y38 AG2 VSS[62] VSS[141] AV4
B DAC_IREF B
T43 DAC_IREF DDPD_2P BE42 BH27 VSS[222] VSS[322] Y4 AG31 VSS[63] VSS[142] AV43
T42 CRT_IRTN DDPD_3N BJ42 BH31 VSS[223] VSS[323] Y42 AG48 VSS[64] VSS[143] AV8
1

DDPD_3P BG42 BH33 VSS[224] VSS[324] Y46 AH11 VSS[65] VSS[144] AW14
BH35 VSS[225] VSS[325] Y8 AH3 VSS[66] VSS[145] AW18
R174 BD82HM77-SLJ8C-MM#915664 BH39 BG29 AH36 AW2
1K/F_4 VSS[226] VSS[328] VSS[67] VSS[146]
BH43 VSS[227] VSS[329] N24 AH39 VSS[68] VSS[147] AW22
BH7 AJ3 AH40 AW26
2

VSS[228] VSS[330] VSS[69] VSS[148]


D3 VSS[229] VSS[331] AD47 AH42 VSS[70] VSS[149] AW28
D12 VSS[230] VSS[333] B43 AH46 VSS[71] VSS[150] AW32
D16 VSS[231] VSS[334] BE10 AH7 VSS[72] VSS[151] AW34
D18 VSS[232] VSS[335] BG41 AJ19 VSS[73] VSS[152] AW36
D22 VSS[233] VSS[337] G14 AJ21 VSS[74] VSS[153] AW40
D24 VSS[234] VSS[338] H16 AJ24 VSS[75] VSS[154] AW48
R & C place close to PCH D26 VSS[235] VSS[340] T36 AJ33 VSS[76] VSS[155] AV11
D30 VSS[236] VSS[342] BG22 AJ34 VSS[77] VSS[156] AY12
R175 1 2 150/F_4 INT_CRT_BLU D32 BG24 AK12 AY22
VSS[237] VSS[343] VSS[78] VSS[157]
D34 VSS[238] VSS[344] C22 AK3 VSS[79] VSS[158] AY28
R176 1 2 150/F_4 INT_CRT_GRE D38 AP13
VSS[239] VSS[345] BD82HM77-SLJ8C-MM#915664
D42 VSS[240] VSS[346] M14
R177 1 2 150/F_4 INT_CRT_RED D8 AP3
+3.3V_RUN VSS[241] VSS[347]
E18 VSS[242] VSS[348] AP1
E26 VSS[243] VSS[349] BE16
G18 VSS[244] VSS[350] BC16
LCD_DDCDAT RP7 1 2 2.2KX2 G20 BG28
LCD_DDCCLK VSS[245] VSS[351]
3 4 G26 VSS[246] VSS[352] BJ28
DIS_L_CTRL_CLK RP8 1 2 2.2KX2 G28
DIS_L_CTRL_DATA VSS[247]
3 4 G36 VSS[248]
HDMI_SCL RP9 1 2 2.2KX2 G48
HDMI_SDA VSS[249]
A 3 4 H12 VSS[250] A
H18 VSS[251]
H22 VSS[252]
H24 VSS[253]
H26 VSS[254]
H30 VSS[255]
H32
H34
VSS[256]
VSS[257]
Quanta Computer Inc.
F3 VSS[258]
PROJECT : R08
Size Document Number Rev
BD82HM77-SLJ8C-MM#915664 1A
Panther Point 2/7
Date: Monday, February 13, 2012 Sheet 21 of 55
5 4 3 2 1
5 4 3 2 1

Cougar Point/Panther Point (HDA,JTAG,SATA) http://laptopblue.vn


20120204 RP35 10KX2
+3.3V_RUN

IRQ_SERIRQ 1 2
Change U14 to AJ0QPEG0T07(WINCON) KB_DET# 3 4
18P/50V_4 2 1 C343 20120207
Change U14 to AJSLJ8C0T02

1
Y2 U14A
32.768KHZ R181
10M_4 RTC_X1 A20 C38 LPC_LAD0
RTCX1 FWH0 / LAD0 LPC_LAD1 LPC_LAD0 35,38
D A38 D

2
FWH1 / LAD1 LPC_LAD1 35,38

LPC
18P/50V_4 2 1 C344 RTC_X2 C20 B37 LPC_LAD2 MP remove(Intel)(JTAG)
RTCX2 FWH2 / LAD2 LPC_LAD3 LPC_LAD2 35,38
FWH3 / LAD3 C37 LPC_LAD3 35,38
RTC_RST# D20 RTCRST# LPC_LFRAME#
FWH4 / LFRAME# D36 LPC_LFRAME# 35,38
SRTC_RST# G22 SRTCRST#
LDRQ0# E36 LPC_LDRQ0# TP8

RTC
+RTC_CELL R185 1 2 1M_4 SM_INTRUDER# K22 K36 LCD_CE TP9
INTRUDER# LDRQ1# / GPIO23
PCH_INTVRMEN C17 +3V V5 IRQ_SERIRQ
INTVRMEN SERIRQ IRQ_SERIRQ 38
EC795 2 1 *22P/50V_4_NC

AM3 SATA_RXN0
SATA0RXN SATA_RXN0 34
ACZ_BITCLK R183 1 2 33_4 ACZ_BITCLK_R N34 AM1 SATA_RXP0
37 ACZ_BITCLK HDA_BCLK SATA0RXP SATA_RXP0 34
SATA_TXN0 SATA HDD/SSD

SATA 6G
SATA0TXN AP7 SATA_TXN0 34
ACZ_SYNC R190 1 2 33_4 ACZ_SYNC_R L34 AP5 SATA_TXP0
37 ACZ_SYNC HDA_SYNC SATA0TXP SATA_TXP0 34
ACZ_SPKR ACZ_SPKR T10 AM10 SATA_RXN1
37 ACZ_SPKR SPKR SATA1RXN SATA_RXN1 35
AM8 SATA_RXP1
SATA1RXP SATA_RXP1 35
ACZ_RST# R192 1 2 33_4 ACZ_RST#_R K34 AP11 SATA_TXN1 mSATA
37 ACZ_RST# HDA_RST# SATA1TXN SATA_TXN1 35
AP10 SATA_TXP1
SATA1TXP SATA_TXP1 35
ACZ_SDIN0 E34 AD7
37 ACZ_SDIN0 HDA_SDIN0 SATA2RXN
SATA2RXP AD5
TP10 G34 HDA_SDIN1 SATA2TXN AH5
AH4 +RTC_CELL
SATA2TXP
C34 HDA_SDIN2 SATA_RXN3

IHDA
SATA3RXN AB8 SATA_RXN3 34
PCH_MELOCK R193 1 2 1K_4 A34 AB10 SATA_RXP3 RTC_RST# R194 1 2 20K/F_4
38 PCH_MELOCK HDA_SDIN3 SATA3RXP SATA_RXP3 34
C AF3 SATA_TXN3 SATA ODD C
SATA3TXN SATA_TXN3 34
AF1 SATA_TXP3 SRTC_RST# R195 1 2 20K/F_4
SATA3TXP SATA_TXP3 34
ACZ_SDOUT R196 1 2 33_4 ACZ_SDOUT_R A36
37 ACZ_SDOUT HDA_SDO

SATA
SATA4RXN Y7
SATA4RXP Y5

1
W W AN_RADIO_DIS# C36 +3V AD3 C345 C346
23,35 W W AN_RADIO_DIS# HDA_DOCK_EN# / GPIO33 SATA4TXN
SATA4TXP AD1
N32 +3V_S5 1U/6.3V_4 1U/6.3V_4

2
HDA_DOCK_RST# / GPIO13
SATA5RXN Y3
SATA5RXP Y1
SATA5TXN AB3
PCH_JTAG_TCK J3 AB1
TP11 JTAG_TCK SATA5TXP
PCH_JTAG_TMS H7 Y11
TP12 JTAG_TMS SATAICOMPO

JTAG
PCH_JTAG_TDI K5 Y10 SATA_COMP R197 1 2 37.4/F_4 +1.05V_PCH
TP13 JTAG_TDI SATAICOMPI
PCH_JTAG_TDO H1
TP14 JTAG_TDO
20120204 SATA3RCOMPO AB12
Change R199 to SR7(Short0402) AB13 SATA3_COMPR198 1 2 49.9/F_4
SR7 SATA3COMPI
*SR_0402
PCH_SPI_CLK 1 1 2 2 PCH_SPI_CLK_R T3 AH1 SATA3_RBIASR200 1 2 750/F_4
39 PCH_SPI_CLK SPI_CLK SATA3RBIAS
PCH_SPI_CS0# Y14
39 PCH_SPI_CS0# SPI_CS0#

TP15 T1 SPI_CS1#
SPI

P3 PCH_SATA_LED#
B SATALED# PCH_SATA_LED# 45 B
PCH_SPI_SI V4 +3V V14 KB_DET#
39 PCH_SPI_SI SPI_MOSI SATA0GP / GPIO21 KB_DET# 40
PCH_SPI_SO U3 +3V P1
39 PCH_SPI_SO SPI_MISO SATA1GP / GPIO19

EC66 *10P/50V_4_NC BD82HM77-SLJ8C-MM#915664


Take care while using GPIO19 for Hot Plug function
2 1 PCH_SPI_CLK
2 1 ACZ_BITCLK
EC68 *10P/50V_4_NC

PCH Strap Table


Pin Name Strap description Sampled Configuration note
0 = Default (weak pull-down 20K)
SPKR No reboot mode setting PWROK 1 = Setting to No-Reboot mode
0 = Default (weak pull-down 20K)
HDA_SDO Flash Descriptor Security PWROK 1 = Override

A A

INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up +RTC_CELL R203 1 2 330K_4 PCH_INTVRMEN

0 = Support by 1.8V (weak PD) +3.3V_SUS R204 1 2 1K_4 ACZ_SYNC_R Quanta Computer Inc.
HDA_SYNC On-Die PLL VR Volatge Select RSMRST 1 = Support by 1.5V
PROJECT : R08
Size Document Number Rev
1A
Panther Point 3/7
Date: Monday, February 13, 2012 Sheet 22 of 55
5 4 3 2 1
5 4 3 2 1

Cougar Point-M/Panther Point (PCI,USB,NVRAM) http://laptopblue.vn


U14E
+3.3V_RUN AY7
+3.3V_SUS RSVD1
RSVD2 AV7
RP11 BG26 AU3
RP10