TOSHIBA TC74HC74AP/AF/AEN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC74AP, TC74HC74AF, TC74HC74AFN DUAL D-TYPE FLIP FLOP PRESET AND CLEAR (Note) The JEDEC SOP (FX) is not available in Japan, The TC74HC74A is a high speed CMOS D FLIP FLOP fabricated with silicon gate C?MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. ‘The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CLOCK pulse. CLEAR and PRESET are independent of the CLOCK and are accomplished by setting the appropriate input to an “L” level. All inputs are equipped with protection circuits against static discharge or transient excess voltage. FEATURES + High Spee fax =77MHz (typ.) + Low Power Dissipation «+ High Noise Immunity + Output Drive Capability + Symmetrical Output Impedance~| lon | =lo.=4mA (Min.) Balanced Propagation Delays~-tpin=tont + Wide Operating Voltage Range-Vec (opr.) =2V~6V + Pin and Function Compatible with 74L874 t= 28% Voc (Min.) 10 LSTTL Loads P(1P14-P-300-2.54) Weight : 0.969 (Typ.) Ngee 1 F(S0P14-7-300-1.27) ‘Weight 0.189 (Typ.) FN (SOL14-150-1.27) Weight : 0.129 Typ.) PIN ASSIGNMENT 1 1 1D 1ck a5 3 Noaunwn GND (Top VIEW) ‘TRUTH TABLE JEC LOGIC SYMBOL INPUTS ‘OUTPUTS ak ect pe FuNcrion cL >| x]. ph | clear wf] tix|x|a |. | preser c{efx|xfala = wHtH)tclPfeula — Hye Al FPA e = HLH Tx PE [Qn | Qn [NO CHANGE X: Don't Care = ve OG ® ex 2b 9 0 2 fo Oe 1c R Q pe {9d ® a] [. » © 2 var 23 20 2001-05-17TOSHIBA TC74HC74AP/AF/AEN SYSTEM DIAGRAM z 2001-05-17TOSHIBA ABSOLUTE MAXIMUM RATINGS TC74HC74AP/AF/AEN PARAMETER SyMeOL VALUE ONT] «500m in the range of Te= Supply Voltage Range [Voc 5-7 Vv] =40°C~65°C. From'Ta=65°C Vet to 85°C a derating factor of DC Input Voltage Viv S~Vec 405 Vo] eRe Ga deratig cto of DE Output Voltage Vout =05=Vec +05 v_| until 300mw: Input Diode Current lie +20 mA Output Diode Current lox £20 mA DC Output Current Tour 225 mA DE Vec (Ground Current [Ice +50 mA Power Dissipation Po | _500(DIP)*/180(50P)_|_mw. Storage Temperature Tag = 65~150 °C RECOMMENDED OPERATING CONDITIONS PARAMETER SyMB0L VALUE UNIT Supply Voltage Vee 2-6 v Input Voltage Viv O-Vee v Output Voltage Vout O-Vec v Operating Temperature _ | Topr =40~85 *€ (0~ 1000 (Vcc =2.0V) Input Rise and Fall Time | t, ty | O~ S00(Vec=4.5V) | ns 0~ 400(Vec=6.0V) DC ELECTRICAL CHARACTERISTICS PARAMETER — |symeot| TEST CONDITION Ver e225 __fTas —80-85°Cl un ()_[min. | tye. Tax. | min. Tmax. 20/150] - | — | 150] — High - Level x] = Input Voltage Vin 43) 243) = 3B v 20| - | — |os0| — | 050 Low “Level Vn as) - | = | 135] - | 135] v Input Voltage 6o| — | = | va0| — | 180 wean [8/8 [2 | = [B High - Level Vine lou= — 20 = = v Mm 60| 59 | 60 59 v Output Voltage fon) VinorVin m 9 Minor =a mal 45] 418 | 431 43 | — =5.2ma| 60| 568 | 5a0| — | 563 | — on [i= (8TH = [H lov =20uA = 1 | = Jon Low-Level Yue = Output Voltage Vor | Vitor. S8 oo) Ot ftv = 45| — | 0.17 | 026 033 l=52ma_|6o| — | 018 | 026| — | 033 input Leakage Curent | lin Vin= Vec or GND. so — | = [2or[ = [ero] Quiescent Supply Current_[ lec Vin = Vec or GND_ eo[ — [ — [20 | = |200|“ 2001-05-17