*SIMULARE PARAMETRICA TR

.subckt NOT 1 2 3
MP 3 1 2 2 CMOSP L=0.5u W=1.5u
MN 3 1 0 0 CMOSN L=0.5u W=0.75u
.ends
.subckt INV3S 1 2 3 6 7
MP1 4 6 2 2 CMOSP L=0.5u W=1.5u
MP2 3 1 4 2 CMOSP L=0.5u W=1.5u
MN1 3 1 5 0 CMOSN L=0.5u W=0.75u
MN2 5 7 0 0 CMOSN L=0.5u W=0.75u
.ends
.subckt NOR 1 2 3 4
MP1 5 1 3 3 CMOSP L=0.5u W=3u
MP2 4 2 5 3 CMOSP L=0.5u W=3u
MN1 4 1 0 0 CMOSN L=0.5u W=0.75u
MN2 4 2 0 0 CMOSN L=0.5u W=0.75u
.ends
.subckt NAND 1 2 3 4
MP1 4 1 3 3 CMOSP L=0.5u W=0.75u
MP2 4 2 3 3 CMOSP L=0.5u W=0.75u
MN1 5 1 0 0 CMOSN L=0.5u W=0.75u
MN2 4 2 5 0 CMOSN L=0.5u W=0.75u
.ends

XNAND1 1 2 22 6 NAND
XNAND2 7 3 22 9 NAND
XNAND3 13 4 22 14 NAND
XNAND4 15 4 22 16 NAND
XNOR1 8 10 22 11 NOR
XINV1 2 22 7 NOT
XINV2 9 22 10 NOT
XINV3 11 22 12 NOT
XINV4 16 22 17 NOT
XINV5 17 22 18 NOT
XINV6 16 22 19 NOT
XINV7 5 22 20 NOT
XINV8 20 22 21 NOT
XINV9 6 22 8 NOT
XINV3S1 12 22 13 20 21 INV3S
XINV3S2 14 22 13 21 20 INV3S
XINV3S3 14 22 15 21 20 INV3S
XINV3S4 16 22 15 20 21 INV3S
VDD 22 0 5
VSN 4 0 5
VSI 1 0 0
VSE 2 0 0
VD 3 0 PULSE(0 5 0 0.4n 0.4n 10n 20n)
VCK 5 0 PULSE(0 5 2n {TR} {TR} 5n 10n)
CQ 18 0 0.1p
CQN 19 0 0.1p
.PARAM TR=0.2n
.STEP PARAM TR 0.2n 0.6n 0.01n
.LIB NOM.LIB
.INC "CMOS_HP_05_T49G.TXT"
.tran 0.1n 75n
.probe
.end