DATA ORIGINALE: 30/11/1993 ULTIMA REV. 20/06/95 GUIDA REV 02 NR. FG 1/1
28/03/1995 Commessa:
02 Progettista : Conti R. E’ stato modificato il circuito stampato (da Pcb 1757 a Pcb 1757a) perché sono state
eliminate le piazzole che erano state previste x i fusibili
20/06/1995 Commessa:
Progettista :
Commessa:
+24V
R17
10K
A A
0 = PHASE K.O.
R18 150K 1 = PHASE O.K.
D4
T3
FASE R
R10 10K
- + 7 U2B
D6
+
1
NEUTRO/EARTH WL02
6 +24V
R9
- LM339
S175 C6 1N4148
10uF 63V 10K
EL.RAD. J2
Vref
C1 1
100uF 50V 2
EL.RAD. 3
4
CONN. MODU2 4P.M.
LED ON DISPLAYS
"PHASE K.O."
+24V
+24V
Q1 OFF = PHASE K.O.
Q1 ON = PHASE O.K.
R14
R16 2K2
10K
B B
3
- + 9 D5
+ U2A
14 5 R12 Q1
NEUTRO/EARTH WL02 + BS170
8 2
- LM339
S175 C5 R7 1N4148 4 LM339
10K -
10uF 63V 10K
EL.RAD. VR1
Vref C7 12V
12
47nF 50V 1/2W
MULT.
+24V
R11
2K2 1/2W
VR2
5.1V
1/2W
+24V
R5
10K
C C
R6 150K ROTATE TRIMMER
UNTIL Vref=9.6 Volt
D1
FASE T T1
R4 10K +24V U1
- + U2D
11 D2 LM317
+ 13 3 2
WL02 Vref
NEUTRO/EARTH IN OUT
10
LM339
ADJ
- (9.6V)
S175 C4 R3 1N4148
10uF 63V 10K R2
EL.RAD. 249
Vref 1%
1
1
C2
100nF 63V TR1 2 C3
POL. 2K 10uF 35V
67W TANT.
3
R1
121
1%
J1
D FASE R D
1
FASE S
2
FASE T
3 NEUTRO/EARTH
4
MORS. 4P.
SCHEDA 1757A/1 C.S. pcb1757A Prog. Conti R. File 1757A-1.sch
V Fig. 2
10.25
From above graph we can see that higher limen of trigger release
must be of 10,25V.
We decided that board 1757 and 1757A must signal error of missing
phase when network voltage decreases over 20% of its nominal
value. In a three-phase system, when network voltage decreases of
this percentage compared to its nominal value between a single
phase and neutral there is a voltage of 102Vac. Therefore trigger
must have lower limen of release at that voltage value.
With 102Vac on capacitor we get the following ripple:
V Fig. 3
8.65
From above graph we can see that lower limen of trigger release
must be of 8,65V.
Pict. 4
Capacitor voltage
Trigger output
T t
On table here below you can find time value T according to network
voltage value:
Network Voltage T t3
(neutral-phase )
140 48ms 49 ms
136 46ms 47 ms
133 43ms 44 ms
130 38ms 39 ms
127 36ms 37 ms
124 32ms 33 ms
120 30ms 31 ms
117 28ms 29 ms
114 25ms 26 ms
110 18ms 19 ms
107 15ms 16 ms
103 12ms 13 ms
3
Graphs concerning voltages measured at basic points of the board
follow.
Pict. 5
V capacitor voltage
8.65V
t1 t
Trigger output
t2 t
mosfet Gate
2.2V
mosfet Drain
1ms t
t3
4
ELECTRICAL CHARACTERISTICS
J2 J1
Conn. J1 Conn. J2
PIN 1 R phase Input +24V
PIN 2 S phase GND
PIN 3 T phase GND
PIN 4 Neutral Alarm output