RF and mm-Wave Power Generation in Silicon

2015

Chapter 1

Introduction

Hua Wang¹ and Kaushik Sengupta²,    ¹School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA,    ²Department of Electrical Engineering, School of Engineering and Applied Science, Princeton University, Princeton, NJ, USA

Chapter Outline

1.1 What Are the Key PA Performance Metrics? 2

1.1.1 PA Output Power 3

1.1.2 PA Power Efficiency 3

1.1.3 PA Linearity 4

1.1.4 PA Robustness to Antenna Load Variations 5

1.2 Unique Advantages of Silicon-Based PAs 6

1.3 Silicon-Based mm-Wave and THz Signal Generation—A New Frontier 8

References 11

The ever-growing demand for higher data-rate, energy efficiency, and performance robustness has posed increasingly stringent requirements on wireless transceiver systems. This is particularly true for mobile devices for consumer electronics and field-deployable systems in defense-related applications, where improving system size, weight and power, enhancing wireless connectivity performance and robustness, and extending the system battery life and efficiency are the primary focus points.

The power amplifier (PA) is often considered one of the most critical building blocks in a wireless transceiver system. It serves as the interface between the radio-frequency (RF)/mm-Wave electronics system for electrical signal generation and conditioning and the antenna structure for electromagnetic signal radiation. It amplifies or generates the transmitted high-frequency signal to the proper power level for the desired wireless transmission and conditions the transmitted signal to satisfy spectrum mask compliance. PA’s performance has critical impact on the entire transmitter (TX) system, including the TX output power level, energy efficiency, bandwidth, signal fidelity, and spectrum management, all of which govern the overall quality-of-service (QoS) of the wireless link (Table 1.1) [1,2]. Moreover, due to their large-signal and high-power operations at RF or mm-Wave frequencies, PAs often encounter unique design challenges and trade-offs that are substantially different compared with small-signal linear circuits and deserve specialized and holistic design considerations [3,4].

Table 1.1

PA Performance Metrics and the Corresponding TRX Performance

This chapter serves as the introduction to this book. We will start with presenting the key PA performance metrics and how they impact the overall transceiver system. Then, we will discuss different technology platforms for implementing PAs. In particular, we will focus on the unique advantages and challenges of utilizing silicon integrated circuit (IC) processes to implement PAs for wireless transceiver systems, or in more general sense, power-generation circuits, at RF/mm-Wave frequencies. Next, current technologies and research trends will be presented. To better demonstrate these trends in silicon-based PAs, the following chapters of this book present state-of-the-art designs contributed from world-class experts, from academia and industry. At the end of this introductory chapter, we will give a brief summary of the technical contents of the following chapters to better guide the readers.

1.1 What Are the Key PA Performance Metrics?

Table 1.1 summarizes the PA performance metrics and their impact on transceiver system performance.

1.1.1 PA Output Power

The PA output power level directly governs the transmitter power, which is an important aspect in estimating the wireless system link budget and the effective communication range [1]. The link budget equation can be expressed as

(1.1)

are the transmitter (TX) and receiver (RX) loss capturing the passive network loss between the TX/RX stands for the free space loss or path loss, which can be computed using Friis transmission equation as

(1.2)

where d are the wavelength and frequency of the carrier signal respectively; c can be estimated based on the receiver sensitivity as

(1.3)

where BW is the receiver bandwidth, NF is the receiver noise figure and SNRmin is the minimum SNR to achieve a quality communication link over the desired wireless transmission distance. In addition, the transmitted signal should also comply with the corresponding spectral mask defined by the specific wireless standard to ensure minimal in-band and adjacent-channel interference with concurrent wireless users.

1.1.2 PA Power Efficiency

The power efficiency of the PA determines its DC power consumption, which often dominates the total power consumption of the transmitter system and directly affects battery lifetime. In addition, a significant portion of the DC power is dissipated as heat which also sets the thermal handling requirement on the transceiver system packaging [5–7]. In many high-power applications, thermal handling requires the use of cooling technology which greatly affect the total cost and form-factor of the wireless transceiver system. In addition, thermal handling should also be properly addressed to avoid thermal-related stress and memory effects to the PA module.

To evaluate the PA’s capability of converting DC power to the desired RF power, one can use the metric PA drain efficiency (DE) defined as

(1.4)

is the PA’s DC power consumption. Note that this PA DE metric can be generalized to be used to describe the energy-conversion efficiency in high-frequency oscillators in mm-Wave/THz circuits and systems, as will be discussed in chapters 17–19.

To account for the power gain of the PA, one may use PA power-added efficiency (PAE) defined as

(1.5)

where Gain stands for the power gain of the PA.

The importance of PA power efficiency can be better appreciated by the following example. Assume a PA generates 30 dBm (1 W) of RF power, typical in cellular applications. If the PA DE is 35%, it will consume DC power of 2.85 W with 1.85 W of it dissipated as heat. If the PA DE is improved to 40%, the DC power consumption is reduced to 2.5 W. Therefore, by improving the PA DE by only 5%, the saving on the DC power is 385 mW, which is often sufficient to power an entire wireless receiver or transmitter chain (without the PA)!

Note that in many high-energy efficiency or low-power wireless links, the system energy efficiency in terms of its information transmission is a primary concern. This system energy efficiency can be quantified using a pJ/bit figure-of-merit (FoM). As an example, a wireless system sustaining 1 Gb/s data rate maintaining a certain bit-error-rate and dissipating 100 mW, exhibits a link with 100 pJ/bit. Generally, the FoM of wireless connectivity is much larger than 10 pJ/bit, while a wireline communication system can achieve a sub-10 pJ/bit system FoM references.

1.1.3 PA Linearity

PA linearity is also an important performance metric, particularly critical for PAs amplifying spectrally efficient complex modulated signals with nonconstant envelopes, such as high-order quadrature amplitude modulation (QAM) signals. Different from small-signal circuits, the large-signal PA nonlinearity is often characterized using AM–AM and AM–PM distortions. AM–AM distortion describes the gain distortion which represents compression or peaking of the PA with input power, which often occurs due to device nonlinearities. AM–PM distortion, on the other hand, represents the output phase variation against input power, which is often caused by the nonlinear capacitors in the PA. Furthermore, PAs may also experience memory-effect distortions, which implies prior symbols may distort the current symbols in transmission. PA memory-effect distortions may be due to the biasing network designs and device nonlinearities, which are particularly critical in wide-band signal transmission.

When amplifying a nonconstant envelope signal, the PA nonlinearities may corrupt the amplitude information through its AM–AM distortions and the phase information via its AM–PM distortions. These in-band nonlinearities can critically affect the constellations of the transmitted signals. For example, the AM–PM distortions will lead to undesired rotation of the transmitted constellation points on the quadrature plane. Such rotations also depend on power level, thereby complicating required equalization. As a result, the error-vector-magnitude and bit-error-rate are degraded, and the QoS of the wireless link eventually deteriorates [3,4]. Moreover, nonlinear PA behavior also distorts the constellation trajectories and generate undesired intermodulation tones. These out-of-band distortions may lead to spectral regrowth of the transmitted signal, violate the spectrum mask compliance, and eventually result in link fratricide in highly dense electromagnetic environment [3,4].

1.1.4 PA Robustness to Antenna Load Variations

PA robustness against antenna impedance variation is also a critical concern for practical usage scenarios [8–10]. Since most PAs are designed with dedicated output matching networks to drive a standard 50-Ω antenna load, any possible antenna load variation may directly change the load impedance presented at the PA output and compromise its large-signal performance. Note that this aspect is particularly critical for mobile devices in commercial electronics or field-deployable systems for defense applications, because these applications often experience changing electromagnetic radiation environments that are time-varying and unknown a-priori. Therefore, this consideration necessitates robust PA designs which are either inherently insensitive to a varying antenna load or can autonomously detect and counter possible antenna impedance variations.

The quantity VSWR (voltage standing wave ratio) is widely used to quantitatively evaluate the antenna load variations. It is defined as

(1.6)

, is also critical when describing a mismatched antenna load impedance. Although the antenna load may vary considerably due to the electromagnetic environment changes, in practice it is often adequate to use an antenna VSWR of 2:1 or 3:1 to examine the PA robustness.

In addition, other PA performance metrics, such as large-signal bandwidth, noise floor, and size/cost, also require judicious considerations to meet the specific wireless transceiver system requirements.

1.2 Unique Advantages of Silicon-Based PAs

The III-V compound devices, such as GaAs Heterojunction Bipolar Transistors (HBTs), have traditionally been the dominant technology to implement high-power RF PA for wireless applications, such as mobile handsets. This is mostly due to their superior device characteristics when compared with silicon-based devices. The intrinsic large bandgaps and device breakdown voltages of III-V compound devices enable their high-power handling capabilities. Thus, an output matching network with a low impedance transformation ratio can be employed, often leading to a lower loss and a high PA power efficiency. Secondly, the III-V compound processes also provide low-loss substrates, high-quality metal layers, and through-substrate vias, all of which support high-performance passive networks, minimized device grounding impedances, and high thermal conductivity. Furthermore, certain compound device technologies such as, GaAs HBTs, can offer competitive cost-effectiveness in mass production compared with silicon processes [11,12].

Multi-chip-module (MCM) is a common approach to assemble III-V compound HBT PAs. Typically, it is composed of a dedicated III-V HBT die with the power transistors as the PA devices, a CMOS IC as the PA controller chip, and passive networks implemented using either discrete components or integrated passive device chips. This solution often achieves an excellent trade-off between the overall cost and PA performance. However, the required footprint is often an issue for such an HBT/MCM solution. As a result, the RF PA front-end may even demand more package area than fully integrated transceiver systems in silicon dies. This issue is exacerbated in modern multiband communication systems, where multiple PA modules are needed for multiband operation [13]. In addition, broadband PAs and PAs which are immune to antenna-impedance mismatches [8–10] often demand complex matching networks [14] and/or quadrature-based PA topologies [15]. These PA solutions offer robust operations against frequency variations and antenna load mismatches but often at the direct expense of larger footprints and compromised power efficiency.

On the other hand, silicon-based PAs, in particular complementary metal–oxide–semiconductor (CMOS) and BiCMOS PAs, are emerging as competitive PA solutions for low-cost mobile devices and field-deployable communication and radar systems. Silicon-based PAs often feature one-chip fully integrated PA solutions together with the PA controller and passive networks, resulting in a smaller footprint and significantly simplified front-end assembly and packaging [16,17]. The silicon IC process also offers low-cost and high-yield with mass-production capability, suitable for large-volume applications. Furthermore, silicon-based PA naturally lends itself to complete system-on-chip (SoC) solutions, which are drawing an increasing interest in the wireless markets. Most importantly, with the capability of integrating billions of transistors on the same chip, silicon IC platforms naturally offer unparalleled on-chip computation and signal processing capabilities in analog, digital and mixed-signal domains. Such analog/digital signal processing techniques can perform in situ automatic PA performance calibration [29,30] and can be exploited to tremendously enhance the large-signal PA performance, while still maintaining low cost and low power overhead for the whole PA [18–28]. In addition, they can also operate together with the baseband processors in silicon-based transceiver SoC solutions.

Therefore, although silicon devices may not provide as high performance as the III-V compound devices, leveraging all these unique advantages in silicon processes at the system level may eventually lead to competitive silicon-based PA solutions that are particularly suitable for high-volume and low-cost applications. This aspect of silicon-based PAs may eventually result in a total paradigm shift in the PA design methodologies and philosophy.

As a result, advanced silicon-based PA designs have now expanded their scope well beyond standalone RF circuit building blocks to complex mixed-signal/mixed-mode RF systems. Such RF systems can potentially achieve unparalleled performance in power efficiency and signal purity by utilizing orchestrated and synchronized collaborations among analog, digital, and large-signal RF operations.

This book seeks to address the technical challenges of designing silicon-based RF/mm-Wave PAs and sub-mm-Wave/sub-THz signal generation systems. In particular, the book will emphasize how the unique advantages of silicon-based processes can be exploited to achieve high performance, energy efficiency, and area efficiency. The book is composed of the following three parts.

The first section (Chapter 2) presents fundamentals of PA operation and design. It covers various PA concepts such as load-line/load-pull operation, and analysis and design considerations of various classes of PA, such as linear PAs and switching-mode PAs.

The rest of the book includes chapters featuring one or multiple state-of-the-art designs of silicon-based RF PA or mm-Wave/THz signal generation systems. With the book drawing contributions from leading experts in both academia and industry, it presents a careful balance of new architectures and methodologies and practical design concerns and implementation details. The second section (Chapters 3–9) demonstrates recently published PA designs at RF frequencies (below 10 GHz). Chapters 3 and 4 aim at addressing two major wireless communication applications namely wireless connectivity and cellular standards, respectively. Chapter 3 presents a highly linear WLAN CMOS power amplifier in an advanced SoC design. Chapter 4 demonstrates an EDGE/GSM dual-mode quad-band PA in a standard CMOS process. Chapters 5–7 present advanced PA architectures such as Doherty, out-phasing, and envelope-tracking to achieve high efficiency at power back-off when amplifying nonconstant envelope and spectrum efficient signals. Chapters 8 and 9 demonstrate two digital PA designs. Also called RF power DAC, digital PAs are attracting increasing research and product development interest due to their inherent reconfigurability, compatibility with advanced digital CMOS processes, and ease of applying digital pre-distortion techniques. Chapter 8 presents a switched capacitor-based digital PA, while Chapter 9 presents a digital PA which utilizes two arrays of inverse class-D power cells to enhance classic Doherty PA operations.

The third section (Chapters 10–19) focuses on the PA designs and signal generation systems at the higher end of the spectrum in the mm-Wave and THz frequency ranges. This part of the book is summarized with details below.

1.3 Silicon-Based mm-Wave and THz Signal Generation—A New Frontier

In the last 10 years, there has been a surge of research activities in the area of millimeter-wave (mm-Wave) ICs and systems in silicon with a special emphasis on monolithic integration in CMOS [31–74]. This wave of research has judiciously exploited the aggressive scaling of transistors which has pushed the fmax/ft of silicon-based transistors into the sub-mm-Wave range. This has opened up the mm-Wave and sub-mm-Wave bands to silicon and opening the door to a wide range of potential applications such as Gb/s short-range wireless communication links, mm-Wave wireless backhaul for last-mile connectivity, automotive radars, high-resolution sensing and gesture recognition, imaging and spectroscopy and more recently, the next-generation 5G communication standards [75–78]. Similar to the technology development in the GHz PAs, the possibility of integrating billions of transistors in silicon and sophisticated back-end digital processing with a mm-Wave front-end, all integrated in a single die, can be leveraged to make robust, low-cost and fully integrated systems at mm-Wave and THz frequencies. Over the past 10 years, we have seen tremendous progress in the complexity of mm-Wave integration in silicon with the demonstration of fully integrated phased array transceivers and mixed-signal intensive transmitter techniques with on-chip or on-package antennas.

As distinct from the RF frequencies, power generation in mm-Wave range in silicon, especially CMOS, presents its own set of challenges and requires different design considerations and methodologies. Some of these techniques cut across various levels of abstraction from device-level layout and optimization to circuit, architectural and system-level innovations, across analog/RF/digital/mixed-signal interfaces. Firstly, the performance margin in mm-Wave design is very small. For example, a 30-fF parasitic capacitance contributes to a reactance of 56 Ω at 94 GHz and, therefore, can completely detune the matching network unless the smallest of the parasitics effects are accurately modeled and accounted for in the designs. Added to it, the device models provided by the standard foundries are often not validated at mm-Wave and THz frequencies. Therefore, the initial research in the field focused on extensive and accurate active and passive modeling. This included measurement and characterization of small-signal performance of active devices, accurate de-embedding techniques, estimation of fmax and ft, and modeling and characterization of integrated lumped and distributed passives as well as integrated antennas [45]. The first chapter in this section, i.e., Chapter 10, focuses on some of the earlier work at Georgia Institute of Technology and demonstration of the early CMOS mm-Wave PAs and transmitters [37] which enabled realization of one of the first fully integrated 60-GHz transceivers for wireless HD applications [31–42].

In addition to the modeling challenges, the lower cut-off frequencies of CMOS devices compared to compound semiconductor devices, lower-quality factor of passives, and lossy silicon substrate with high ohmic losses together pose a major challenge to silicon integration. Further, proportionate scaling down in breakdown voltages with technology scaling also fundamentally limits the amount of power that can be extracted from a single transistor. Therefore, efficient power combining becomes critically important for mm-Wave PAs. Power combining can be achieved in multiple ways in the voltage-domain (series-combining), current-domain (parallel-combining) or even in the hybrid current-voltage domain exploiting the advantages of both these techniques [46–51]. At such high frequencies, amplitude and phase mismatches and distributed effects of the on-chip passive elements become critically important as well. These concepts are extensively covered in Chapters 11 and 12. Chapter 11 describes current combining techniques for W-band applications with on-chip transformers. Chapter 12 describes the hybrid approach toward efficient power combining at mm-Wave frequencies.

Chapter 13 presents Department of Electrical Engineering (ESAT), KU Leuven, by Dr. Patrick Reynaert and Noel Deferm presents a neutralization technique to boost transistor performances at frequencies close to fmax and demonstrates a 94-GHz differential PA and a 120-GHz, 10-Gb/s phase-modulating link.

High-power generation at mm-Wave frequencies often trades off directly with robustness and sensitivity to the process variations. The generation of higher power through power combining methods requires large impedance transformation ratios for optimal power generation, which, as a consequence, results in the output matching network to be vulnerable to process variations and mismatches. In practice, a design which relies on accuracy of device and passive modeling often requires fabrication of test structures, custom-active device modeling, and several iterative runs (and therefore added expense) and can still fail to guarantee optimum performance due to process variations. This can reduce the yield to an unacceptably low percentage. One way to work around the problem is to design conservatively to guarantee performance at all corners or to employ architectures which are inherently less prone to parasitics. However, this either comes at the cost of sub-optimal performance or higher power consumption or larger die area. This approach completely overlooks the fundamental advantages of CMOS integration which is the ability to integrate complex computational and signal processing capabilities and where the transistor comes almost free of cost. The concept of a self-healing or self-optimizing PA seeks to the mitigate effects of process variations, model inaccuracies, aging and environmental variations through on-chip sensing and characterization of the PA, and subsequent on-chip actuation and optimization using tunable active and passive elements through self-autonomous on-chip control loop [53–57]. Chapter 14 presents an example of a CMOS PA at 60 GHz with adaptive biasing capabilities for self-autonomous optimization enabling a reported 10x improvement in yield.

The efficiency of a PA is dependent on its mode of operation. High spectral efficiency requires complex modulation schemes and nonconstant envelopes with high peak-to-average power ratio, and therefore, linearity often comes at the cost of efficiency. A large portion of the DC power is dissipated in the core device in class A and class AB operations. However, switching-mode PAs can overcome this loss to a large extent by operating the power devices as switches. While typically popular for constant envelope phase-modulated signals at RF frequencies, recently researchers have started investigating possibilities of switching-mode PAs in the mm-Wave frequency [58–60]. Chapter 15 discusses the possibilities of such architecture with a design example of a class-E-like switching PA operation at 60 GHz.

One of the great challenges of mm-Wave power generation and transmitters is to enable high-power and high efficiency, yet highly linear PAs (for high spectral efficiency). To that end, digital PA architectures, such as RF-DAC and power-mixer architectures have become increasingly popular [61–64]. The PA encompasses the base-band up-conversion within itself, by dynamically switching on and off unit amplifier cells, as dictated by the amplitude component of the polar signal. This enables dynamic adjustment of DC power consumption leading to higher efficiency at power back-off. However, such architectures present their own set of challenges, such as bandwidth expansion in the amplitude path and phase path, accurate synchronization in the amplitude and phase paths, efficient high-speed switching of unit power cells and effects of load modulation. Chapter 16 presents an example of efficient power-mixer architecture for nonconstant envelope modulation, demonstrating multi-Gbps links in 32-nm SOI CMOS.

The remaining chapters focus on techniques and architectures for power generation in the higher mm-Wave band beyond 100 GHz. There are exciting, but untapped, opportunities in the frequency ranges beyond 100 GHz for applications in high-resolution wireless sensing, imaging, radar and ultra-high-speed short-range wireless communication [55–74]. There are new challenges that emerge from operation at frequencies close to and beyond fmax. Chapters 17–19 focus on innovations that enable fully integrated systems in these frequency ranges.

At frequencies beyond fmax, power amplification and realization of fundamental-frequency oscillators is not possible. Therefore, in order to generate signals at these frequencies, nonlinearities of integrated devices have to be exploited to extract harmonic power. Chapter 17 illustrates one of the earliest works in the THz signal generation in CMOS demonstrating signal generation and radiation of signals at 410 GHz by exploiting the fourth-order harmonic (410 GHz) of the fundamental oscillation signal (102.5 GHz) [73].

Extracting the signal generated on-chip reliably is a critical component of such sub-mm-Wave and THz systems. Wirebonds and flip-chip interconnects add considerable amounts of parasitics, which make it an impractical method of signal extraction at THz frequencies. Therefore, integrated antennas are an attractive option, except that classical integrated antennas can excite multiple surface modes inside the silicon substrate, which can reduce radiation efficiency drastically. Chapter 18 presents an electronic-electromagnetic co-design approach toward synthesizing optimal radiating surfaces on-chip, demonstrating the first near-THz 16 element beam-scanning array at 280 GHz in silicon [68]. Chapter 19 focuses on scalable power generation through an improved multi-phase sub-harmonic injection-locking scheme to extend the bandwidth for THz signal generation from lower frequency RF signals [74].

The field of mm-Wave ICs and systems has traversed a long path since the early 2000s, enriched by contributions from a diverse research community of engineers and scientists in circuits/systems (analog, digital and mixed-signal, RF and microwave), antenna, packaging, communication, and signal processing. The editors are optimistic that this field will grow rapidly in the near future allowing us access to a portion of the electromagnetic spectrum with orders of more bandwidth than currently used. While it is nearly impossible to present a complete picture of all the technological breakthroughs that enabled this mm-Wave PA and transmitter development over the last decade, this section of the book attempts to bring together some of the key techniques and ideas that highlight the challenges and design techniques for efficient mm-Wave power generation and transmitter design. We hope that readers find this engaging and helpful.

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Part I

Power amplifier design methodologies

Outline

Chapter 2 Power amplifier fundamentals

Chapter 2

Power amplifier fundamentals

Bumman Kim,    Department of Electronic & Electrical Engineering, Pohang University of Science and Technology, Korea

Abstract

This chapter introduces the basic concepts and methodologies in power amplifier designs. It starts with the small-signal conjugate matching widely used in conventional small-signal amplifiers and then presents the large-signal power (load-line) matching that is often required in power amplifier designs to maximize the power generation capability of a given transistor. It also covers the concepts of power gain, power efficiency, load-line plot, and load-pull plot. Then, classic linear power amplifier topologies, i.e., the class-A, -B, -AB, and -C power amplifiers, are introduced, which are classified based on their conduction angles. In particular, the nonlinear behaviors in linear power amplifier designs are discussed in detail. Next, classic switching power amplifier topologies are presented, including the class-F, F-1, D, and D-1, and AB/F topologies, whose theoretical drain efficiencies can achieve 100%. This chapter concludes with the class-E switching power amplifier topology, design equations, and its