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0 ADD 6
1
w.f.r./m ADC w.f.r./m AND w.f.r./m XOR w.f.r./m INC CX PUSH CX ADD 7 ADD b.t.r/m ADC b.t.r/m AND b.t.r/m XOR b.t.r/m INC DX PUSH DX
2
ADD w.t.r/m ADC w.t.r./m AND w.t.r./m XOR w.t.r./m INC BX PUSH BX
3
ADD b.ia ADC b.i AND b.i XOR b.i INC SP PUSH SP ADD w.ia ADC w.i AND w.i XOR w.i INC BP PUSH BP
4
PUSH ES PUSH SS SEG =ES SEG =SS INC SI PUSH SI
5
POP ES POP SS DAA AAA INC DI PUSH DI
MOV b.i.r/m
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LOCK
LOOPNZ/ LOOPNE
JCXZ
Hi
Lo
0 1 2 3 4 5 6 7 8 9 A B C D E F
8
OR b.f.r/m SBB b.f.r/m SUB b.f.r/m CMP b.f.r/m DEC AX POP AX
9
OR w.f.r./m SBB w.f.r./m SUB w.f.r./m CMP w.f.r./m DEC CX POP CX OR b.t.r/m SBB b.t.r/m SUB b.t.r/m CMP b.t.r/m DEC DX POP DX
A
OR w.t.r/m SBB w.t.r./m SUB w.t.r./m CMP w.t.r./m DEC BX POP BX
B
OR b.i SBB b.i SUB b.i CMP b.i DEC SP POP SP
C
OR w.i SBB w.i SUB w.i CMP w.i DEC BP POP BP
D
PUSH CS PUSH DS SEG CS SEG DS DEC SI POP SI POP DS DAS AAS DEC DI POP DI
JL/ JNGE MOV sr.f..r/m PUSHF LOOS b INT Type3 ESC 4 IN v.b
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d
ESC 0
ESC 1 JMP d
ESC 2
JMP I.d
001 OR ROR
110 XOR
DIV
IDIV
Grp2
INC
DEC
PUSH
b = byte operation d = direct f = from CPU reg i = immediate ia = immed to accum id = indirect
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John R. Principio
GENERAL PURPOSE MOV POP Move byte or word Pop word off stack PUSH Push word onto stack XCHG Exchange byte or word XLAT Translate byte INPUT/OUTPUT IN OUT LEA LDS LES LAHF Input byte or word Output bye or word ADDRESS OBJECT Load effective address Load pointer using DS Load pointer using ES FLAG TRANSFER Load AH register from flags SAHF Store AH register in flags PUSHF Push flags onto stack POPF NOT AND OR TEST Pop flags off stack LOGICALS NOT byte or word AND byte or word INCLUSIVE OR byte or word TEST byte or word
MOVS
Compare byte or word string Scan byte or word string Load byte or word string Store byte or word string Repeat Repeat while equal/zero
EXTERNAL SYNCRONIZATION WAIT Wait for TEST pin active LOCK Lock bus during next instruction NO OPERATION
JMP
String operations (performed on a sequence of bytes or words in memory) Non-destructive bit testing THE 8086/88 ADDRESSING MODES Instructions to aid multiprocessing systems Complete set of signed arithmetic operation The addressing modes listed below clearly show the The instruction set includes lineage from the earlier 8085 to the 8086/88. The major approximately 300 forms of difference is that the number of indirect modes has machine-level instructions. These been greatly expanded: 300 instruction types are specifically chosen to translate IMMEDIATE WHAT are the data? efficiency into assembly- or highREGISTER level code. For example, at the DIRECT INDIRECT assembly level, there are only base about 100 instruction types. We index WHERE are the will be using many of these data? instructions inn Chapter 20 to base/index write a variety of assemblybase/displacement language programs. index/displacement
base/index/displacement
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John R. Principio