ALTERA DE Series FPGA Development

and Education Platforms Form EDAS Technologies www.edastech.com

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Agenda
Altera FPGA Road Map Product Overview End market focus DE Series Development and Education platform Supporting Interfacing cards Design examples Laboratory exercises Existing End Users (Universities and industries world wide)
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Altera FPGA Roadmap

HardCopy V Stratix V GX HardCopy IV Stratix V Stratix IV GX Stratix IV

Performance & Density

HardCopy III Stratix III GX HardCopy II Stratix II GX HardCopy Stratix GX Stratix Cyclone Cyclone II Stratix II Cyclone III Stratix III Cyclone IV

Cyclone IV

130 nm
2002-04
3

90 nm
2004-05

65 nm
2006-07

45 nm
2008-10
Planning

28nm
20010-12

Product Overview

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End Market Focus

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End Market Focus

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DE Series Development and Education platform DE1 Application Specific DE2 i. VEEK : Video and embedded evaluation kit ii. INK : Industrial Networking Kit DE-70 iii. Altera Nios II Embedded Evaluation Kit iv. Cyclone III Video Development System DE2-115 v. DSP in FPGA Development kit DE0 vi. PCI-X Development Board DE0-Nano Development Board for research level projects I. TR-4 II. DE3 / DE4
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Altera DE1 Development and Education Board

DE1 Board Feature Set - EP2C20F484 - EPCS4 for configuration - USB Blaster on board - SDRAM (8Mbyte) - SRAM (512Kb) - Flash (4Mbyte) - 24-bit Audio CODEC - VGA Port - RS-232 Port - PS/2 Port - SD/MMC Socket - SMA ext clock input - 10 Red/8 Green LEDs - 2 x 40-pin Expansion Ports - 4 x 7-seg display - 10 SW & 4 Push Buttons
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ALTERA DE2 Board

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ALTERA DE2-115 Board

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ALTERA DE2-115 Block Diagram

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ALTERA DE0-Nano

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ALTERA DE0-Nano

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The DE3 Board

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Stackable Mechanism in DE3 (240 LVDS pairs 1Gbps)

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Many ways to assemble DE3 boards into a big system (3 DE3 boards in this case)

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Many ways to assemble DE3 boards into a big system (5 DE3 boards in this case)

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Interfacing Cards

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Interfacing Cards

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Interfacing Cards

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CD-Quality CASIO Keyboard (High-End Music Synthesizer)

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Digital Camera + Color/Motion Recognition (Pong Game)

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1.3 Mega Pixel Digital Camera with 3.6 Digital Panel

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DTV Solution using Altera DE2

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Web Server Using DE2

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Ethernet Packets TX/RX with NIOSII Core

Key Components Used in the Lab: -- SDRAM (NIOSII code) -- Davicom 9000a Ethernet Controller

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SD Card Music Player

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Laboratory exercises for digital Logic

Lab 1 - Switches, Lights, and Multiplexers Lab 2 - Numbers and Displays Lab 3 - Latches, Flip-flops, and Registers Lab 4 - Counters Lab 5 - Timers and Real-Time Clock Lab 6 - Adders, Subtractors, and Multipliers Lab 7 - Finite State Machines Lab 8 - Memory Blocks Lab 9 - A Simple Processor Lab 10 - An Enhanced Processor Lab 11 - Implementing Algorithms in Hardware Lab 12 - Basic Digital Signal Processing

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Laboratory exercises for Embedded and computer organization

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Worldwide Universities Using DE serise Platforms

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Industries Using DE serise Platforms

HP AMD LG Philips IBM Microsoft SigmaTel ATI Northrop Grumman Jabil TI Simems Juniper Nokia Wright Patterson Air Force Base
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Dedicated lab setup

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End Users

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End Users

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