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ROM encoding
Instructions are encoded in binary in ROM. The instructions are fixed format, each occupying 14 bits. The division of the bits into fields is flexible.
when d=0 destination = W reg d=1 destination = reg[f] f= 7 bit register selector
b = 3bit number identifying a bit in an 8 bit register f = 7 bit number identifying one of 128 possible registers
Literal ops
13 opcode
7 K=Literal value
These generally operate on the w register The second operand is a value specified in the instruction W:= w op k
Control transfer
13
11 10 K 0 opcode
Used for call or goto K is a 11 bit literal that specifies an address in the program memory
We will look at the binary layout of some of the instructions in the instructionset before going on to look at the way these are accessed in assembler Goto 6
101
Program counter or PC
127
Add 3 to W
11 1110 0000 0011
Add register 33 to w
00 111 Add reg 0 010 0001
Destination Is W
Register number Is 33
W := W + Reg[33]
Add w to register 33
00 111 Add reg 1 010 0001
Destination Is reg 33 This is what Differs from Last Instruction Reg[33] := w + reg[33]
Register number Is 33
Disadvantages of binary
Hard to remember Very hard to remember for complex instructionsets Allows no variation in word lengths between different processor models ( PICs come with 12, 14 and 16 bit instructions )
Assembler
Replaces each binary instruction with a line of text Opcodes replaced by mnemonic names Operands specified as symbolic labels or decimal or hex numbers Software package translates to binary
Assembler process
comments
main movlw movwf movlw movwf call 0x35 mulplr 0x2D mulcnd mpy_S
call_m
; The result is in file ; registers H_byte & L_byte ; and should equal 0x0951
opcodes
labels Comments start with ;
A simple example
What we want to compute is Y:= x+5 We must associate these variables x,y with registers. We must select machine instructions that will perform the calculation
Assign variables
X assume it is 8 bit integer We will put it in register 20h We will put Y in register 21h
General registers
7f Register bank
1.
2. 3.
YES
YES
Y:=x+5
MOVLW 5 ; w:=5 ADDWF 20h,0 ; w:= w + reg[20h] 0 indicates w is dest MOVWF 21h ; y:=w
We will now look at the instructionset of the PIC processor. There are 35 instructions
Register addition
ADDWF f,d Add reg[f] to w and store in either w or reg[f] depending on d, if d=0 then store in w, else in reg[f] If reg[24h] =6 and w=4 then ADDWF 24h,1
Sets reg[24h] to 10
Addition of a constant
ADDLW const Add const to w and store in w If w=4 then ADDLW 24h Sets w to 28h
andwf
ANDWF f,d And reg[f] with w and store in either w or reg[f] depending on d, if d=0 then store in w, else in reg[f] If W = 0001 1111 and reg[20h]= 1111 0100 ANDWF 20h,0
will set w to 0001 0100
ANDLW
ANDLW const And const with w and store in w If W = 0001 1111 and const= 6=0000 0110 ANDLW 6 will set w to 0000 0110
Clear registers
Clrf f
Clrw
Eg CLRF
MOVE OPERATIONS
MOVFW
NOP
NOP stands for NO oPeration It is an opcode that does nothing Its binary pattern is
0000 0000
Destination=w
00000 0
This is similar to MOVWF whose pattern is 00000 1 Destination bit FFFF FFFF
Destination register
subtractions
This can be done by using complement or subtract operations, subtract is not strictly needed
COMF f,d This sets either reg[f] or w to reg[f] For example if x is in reg[32] and y in reg[33] then x:=x-y would be done by COMF 33,0 ; w:=-y ADDWF 32,1 ; x:=x+w
Complement continued
Suppose we want reg[32]:=reg[33]-reg[40]
Initial values Binary
Code
10
4
00000100
Carry bit
SUBWF
Subtract w from f SUBWF f,d This has two forms SUBWF f,0 ; w:= reg[f]-w SUBWF f,1 ; reg[f]:= reg[f]-w
MOVFW 33 ;w:=y SUBWF 32,1;x:=x-w
Instead of
Decrement register
Decf f, d Decrements reg[f] and stores result in either reg[f] or w depending on d DECF 50,1
Subtracts 1 from register 50 DECF 50,0 Sets w := reg[50] -1
Incrementing
INCF and INCFSZ work like DECF and DECFSZ except that they increment In this case you would load a negative number into your count register and count up towards zero. Alternatively, count up, and skip when the result would have been 256.
Inclusive or
IORWF f,d Example If w=1100 0001 and reg[40]=0001 0001 IORWF 40,0
Will set w= 1101 0001
11000001 00010001 or 11010001
Inclusive or Literal
IORLW const Example If w=1100 0001 IORLW 7
Will set w= 1100 0111
11000001 00000111 or 11000111
Exclusive or
XORWF f,d Example If w=1100 0001 and reg[40]=0001 0001 XORWF 40,0
Will set w= 1101 0000
11000001 00010001 xor 11010000
Exclusive or Literal
XORLW const Example If w=1100 0001 XORLW 7
Will set w= 1100 0110
11000001 00000111 xor 11000110
Bit operations
BCF f,b set bit b of register f to 0 BSF f,b set bit b of register f to 1 Eg BCF 34,1 Clears bit 1 of register 34
Test instructions
BTFSC f,b ; bit test skip on clear BTFSS f,b ; bit test skip on set Eg INCF 33 BTFSC 33,4 GOTO OVERFLOW ; goto overflow when ; reg 33 >7
GOTO
GOTO label Eg GOTO home .. home MOVLW 7 . Transfers control to the label
CALL continued
When a call occurs the PC+1 is pushed onto the stack and then the PC is loaded with the address of the label When return occurs the stack is popped into the PC transferring control to the instruction after the original call.
at start we have
; increment reg
Next step
Address opcode 5 2007 6 2805
7
0AA2 0008
after return