7-1

7-1 6-1 5-1

ECE 3EJ4
Electronic Devices & Circuits II
Lecture Set 7 Lecture Set 7 Mixed Signal Mixed Signal
Circuits Circuits
Prof. M. Jamal Deen Prof. M. Jamal Deen
Professor and Senior Canada Research Chair
Dept. of Electrical and Computer Engineering
McMaster University Hamilton, ON L8S 4K1, Canada
7-2
7-2 6-2 5-2
Analog and Digital Analog and Digital
(Mixed) Signals (Mixed) Signals
(Only Class Notes and Cited References Available) (Only Class Notes and Cited References Available)
Control
Input
T
P
L
H
7-3
Applications of Data Converters Applications of Data Converters
Precision sensor signal conditioning and data acquisition
Industrial Process Control
Liquid/Gas Chromatography
Portable Applications
Sensors
Weigh Scale
Pressure Transducers
Pressure
Intelligent Sensors
Temperature
http://www.analog.com/library/analogDialogue/archives/39-06/Chapter%208%20Data%20Converter%20ApplicationsF.pdf
http://www.national.com/vcm/national3/en_US/global/files/national_automotive_solutions.pdf
http://www.national.com/appinfo/adc/files/ABCs_of_ADCs.pdf
Instrumentation
Gas Monitoring
Portable Instrumentation
Blood Analysis
Medical Instrumentation
Portable Instruments
Smart Transmitters
Car
Instrumentation
Safety
Environmental
Sustainability
Connectivity
7-4
Digital and Analog Digital and Analog
Digital - greater accuracy and
reliability
Versatility and cost
Comprehensive theory, algorithms
Availability of CAD tools
Manufacturing - optimized, low-cost
device processes
Digital circuits used in
Computers, data processing
Electronic calculators and
instrumentation
Control devices
Communication equipment,
telephone networks, cell phones
Entertainment CD, MP3 Players,
TV, radio, camera
Medical equipment
Analog - advantages
Most physical phenomena of
interest are analog
Required for most real situations
Transducers are simple
Potentially high precision
Analog - disadvantages
Analog components - drift,
distortion, noise, offsets, etc.
Errors in analog signals -
accumulate during processing,
transmission, and storage
Relatively simple signal
processing practical for most
applications
7-5
Digital Circuits Digital Circuits
Advantages
Signal strength easily restored
Not much degradation of signal
accuracy during processing,
transmission and storage
Components are cheap, reliable
and consume low-power
Digital signal processing can be
highly sophisticated using
special-purpose hardware or
software - programmable digital
signal processors or computers
Disdvantages
Limited signal precision - number
of bits used to encode each sample
Analog-to-digital converters and
digital-to-analog converters are
required to interface a digital
system with real-world analog
signals
7-6
7-6 6-6 5-6
Introduction Introduction Digital Digital- -to to- -
Analog Converters Analog Converters
(DACs) (DACs)
7-7
Digital Digital- -to to- -Analog Converter Analog Converter
For n-bit binary input word (b
1
, b
2
, , b
n
),
output of DAC expressed as
V
FS
- full scale voltage
V
OS
- offset voltage
Smallest voltage change that can occur at
DAC output takes place when LSB in
digital word changes from 0 to a 1
This minimum voltage change is resolution
of converter
Conversion rate - clock speed of input
signal and settling time of DAC
Digital-to-
Analog
Converter
+
-
V
ref
+
V
o
-
b
1
,b
2
,b
3
, b
n
O 2 O
1 2
1

( 2 2 ... 2 )
{1, 0}
n
FS n S
i
For b
V V b b b V

= + +

+ +
Resolution 2
n
LSB FS
V V

=
DAC Characteristics
Resolution
Linearity
Speed
Settling Time
Reference Voltages
Errors
2 1
2
n
FS REF
n
V V

=


' '
7-8
Practical Issues Practical Issues
DAC Errors
Gain Error
Offset Error
Settling time
t
settling
LSB
+
-
Analog
Output
Voltage
Time
7-9
Practical Issues Practical Issues
DAC with linearity errors DAC with non-monotonic output
Inflection in the transfer function
For one output value, two binary
input are possible.
DAC Errors
Non-Linearities
Monotonicity
7-10
DAC Realization DAC Realization - - 1 1
Weighted-R DAC circuit
Disadvantages
Maintain accurate R ratios over wide range
Switch on resistance very low
Current drawn from voltage reference varies
with binary input pattern.
Varying I causes change in V drop in
Thevenin equivalent R
source
of voltage
reference data-dependent errors
REF
n
n o
V b b b v ) 2 ... 2 2 (
2
2
1
1

+ + + =
n
n
I I I I
1
3 2 1
2 ... 4 2

= = = =
)
)
1 1 2 2
1 2
1 1 2
1 2
1 2
...
2 2 2 ... 2
2 2 ... 2
n n
n
n
n REF
n
I b I b I b I
I b b b
V
b b b
R


= + + +
= + + +
= + + +
1
2
REF
I V R =
)
1 2
1 2
2 2 ... 2
n
o n REF
v IR b b b V

= = + + +

+
V
REF


V
o

R R
2 R 2 R
..
I
R
b
1
b
2
b
n


2R
Inverted R-2R ladder
Wide range of R values avoided
Currents in ladder and V
REF
are
independent of digital input
power dissipation does not change
7-11
Binary Weighted Resistor DAC Binary Weighted Resistor DAC
Inverting summing Op-Amp
Set input R values at multiple
powers of 2
KCL and Op-Amp properties
V
(-)
= V
(+)
= 0 V
Start, V
1
to V
3
- give each
V
input
exactly effect on
output as voltage before
3 1 2
2 4
out
V V V
V R
R R R

= + +

' '
I
1
I
2
I
3
I
1
+I
2
+I
3
7-12
Example Example Weighted Weighted- -R DAC R DAC
)
3 2 1 0
8 4 2
8
REF
out
V
V b b b b

= + + +
4 = n
? A
8(0) 4(0) 2(1) 1(1)
8
3
8
REF
out
REF
V
V
V

= + + +

=
)
1 2 1 0
1 2 1 0
1
2 2 ... 2 2
2
n n
REF
out s n n
n
V
V V b b b b

= = + + + +
4
4
2 1
0.9375
2
FS REF REF
V V V

= =


' '
Binary Weighted Resistor DAC
V
REF
V
out
R
2R
4R
8R
LSB
MSB
0
0
1
1
R
2 1
2
n
FS REF
n
V V

=


' '
7-13
R R- -2R Ladder DAC Analysis 2R Ladder DAC Analysis
3 0 2 1
O
2 4 8 16
F
REF
D D R D D
V V
R

= + + +

' '
Take the case of V
LSB
connected to V
REF
2
REF
V
4
REF
V
8
REF
V
16
REF
V
16
f
REF
R
V
R
16
REF
V
REF
V
7-14
Example R Example R- -2R Ladder Network 2R Ladder Network
Determine the voltage output by the following R-2R ladder network
given the switch states shown in table
SW
0
SW
1
SW
2
SW
3
V
out
Ground Ground Ground V
ref
8 volts
Ground Ground V
ref
Ground 4 volts
Ground V
ref
Ground Ground 2 volts
V
ref
Ground Ground Ground 1 volt
Ground Ground Ground Ground 0 volts
011010010101010100101
101010101011111100101
000010101010111110011
010101010101010101010
111010101011110011000
100101010101010001111
Digital Input
0 bit
n
th
bit
n bit
DAC
Low-
pass
Filter
Piece-wise
Continuous Output
Analog
Continuous Output
7-15
7-15 6-15 5-15
Analog Analog- -to to- -Digital Digital
Converters (ADCs) Converters (ADCs)
7-16
ADC Characteristics ADC Characteristics
Full scale voltage - determined using V
REF
2 1
2
n
FS REF
n
V V

=


' '
Resolution
2
n
REF
V V =
V
REF
(V) Resolution 1LSB (mV)
1 8 3.9062
1 12 0.24414
2 8 7.8125
2 10 1.9531
2 12 0.48828
2.048 10 2
2.048 12 0.5
4 8 15.625
4 10 3.9062
4 12 0.97656
Suppose binary number with N
bits - represent analog value
ranging from 0 to A
There are 2
N
possible numbers
Resolution = A / 2
N
7-17
Analog Analog- -to to- -Digital Conversion Digital Conversion
Basic concept
Step 1 sampling: get discrete signal from analog
signal (Nyquists critical frequency)
Step 2 quantizing: assign an integer value to each
sampling point (quantization error introduced)
Step 3 coding: convert any integer value to binary
system
1 1
| 2 |
2
n
i FS
x FS i i
n i
V
v V b b selected

+ =

Analog-to-
Digital
Converter
+
-
v
x
+ V
REF
-
b
1
, b
2
, b
3
, b
n
Code sequences for a 3-bit successive
approximation ADC
100
110
111
110
111
101
100
011
010
001
000
101
011
001
010
T 2T 3T 4T
Final
Code
Time
Successive approximation converter
A
n
a
l
o
g

I
n
p
u
t
v
x
V
REF
v
0
=1 if
v
x
< V
REF
7-18
Analog Analog- -to to- -Digital Conversion Digital Conversion
Parallel (flash) ADC - make //, not serial
comparisons simultaneously
n-bit DAC
Successive
Approximation
Logic
ADC Output Code
10 11 00 01 10
V
x
Clock
f
c
R
R
R
R
R
R
R/2
V
REF
V
x
b1
b2
b3
+
-
+
-
+
-
+
-
+
-
+
-
+
-
C
o
m
b
i
n
a
t
i
o
n
a
l

L
o
g
i
c
3R/2
N = # of bits in output word (2
N
-1)
comparators needed
Modern Qelectronics - possible, expensive
)
1
0.5 2

n
FS
T c
Signal must not change by LSB V
during conversion time T n f
+
>
=
)
)
)
0
0 0
1
1 2

2 2
sin
2
FS
FS
n
FS
T FS
n
c
n
c
V d
T Max V
V f
f
n
n
o V
f
t
d
r
t
+
+ +
|

, `

|
| )

x
SAR ADC SAR ADC
7-19
End-of-convert (EOC), data-ready
(DRDY), or busy signal (actually, not-
BUSY indicates end of conversion)
DAC set either or scale depending on
value of bit 1, and comparator makes
decision for bit 2 of conversion.
Result is stored in register, and process
continues until all bit values determined
When all bits have been set, tested, and reset
or not as appropriate, contents of SAR
correspond to value of the analog input, and
conversion complete.
Comparator SHA output > or < the
DAC output, and result (bit 1, MSB
of conversion) stored in SAR
7-20
3-Bit Flash ADC
Making all comparisons between
digital states and analog signal -
fast conversion cycle
Resistive voltage divider - provide
digital reference states needed
Eight reference values (including
zero) for the 3-bit converter
Voltage reference states - offset -
midway between reference step
values
Analog signal - compared with
each reference state
Separate comparator required for
each comparison
Digital logic - combines several
comparator outputs - appropriate
binary code
Combinational
Logic
D
i
g
i
t
a
l

W
o
r
d
1
0
1
1
1
0
0
0
1
0
7-21
Aliasing Aliasing
ADC's sample time - fast enough to capture
essential changes in analog waveform
Data acquisition terminology - highest-
frequency waveform that ADC can theoretically
capture is so-called Nyquist frequency - equal
one-half of ADC's sample frequency
If ADC circuit has sample frequency of 5000 Hz,
highest-frequency waveform it can successfully
resolve is Nyquist frequency of 2500 Hz
If analog input signal frequency > Nyquist
frequency for ADC, converter will output
incorrect digitized signal - lower frequency
Phenomenon is known as aliasing
See illustration - aliasing
Practically do not expect ADC to resolve
frequency > 1/5 to 1/10 of sample frequency
7-22
Anti Anti- -aliasing Filter aliasing Filter
ADC - usually equipped with
analog low-pass filters to pre-
condition signal prior to
digitization
Prevents signals with
frequencies greater than
sampling rate from being seen
by ADC prevent detrimental
effect - aliasing
Analog pre-filters - known as
anti-aliasing filters
Determine which of following
Sallen-Key active filters is the
correct type for an anti-aliasing
filter
7-23
Resolution
Temperature range of 0 K to 300 K to be linearly converted to a
voltage signal of 0 to 2.5 V, then digitized with an 8-bit A/D
converter, what is the voltage step size and temperature resolution?
2.5 V / 2
8
= 9.8 mV, or ~ 10 mV per step
300 K / 2
8
= 1.2 K per step
If a 10-bit A/D converter is used instead, what is the new step size
and temperature resolution
2.5 V / 2
10
= 2.44 mV, or ~ 2.4 mV per step
300 K / 2
10
= 0.29 K per step
Is the noise present in the system well below 2.4 mV?
7-24
Noise
Quantization noise - results from quantization process- process of assigning
an output code to a range of input values
Each conversion has average uncertainty of one-half of the step size, (A/2
N
)
Quantization error places an upper limit on signal-to-noise ratio
Maximum (ideal) SNR 6.02 N + 1.76 dB (N = # bits)
e.g. 8 bit 49.92 db, 10 bit 61.96 db
Signal level of 1V
RMS
and a noise level of 100V
RMS
SNR of 10
4
= 80dB
Noise level - integrated over half clock frequency
7-25
Dynamic Range
Dynamic range - ratio of the largest to the smallest possible signals
that can be resolved
Dynamic Range = 20 * Log(2
n
- 1)
Resolution (Bits) Dynamic Range (dB)
6 36.0
8 48.1
10 60.2
12 72.2
14 84.3
16 96.3
18 108.4
20 120.4
7-26
Practice Problems
The op-amp in the figure shown has an
offset voltage of +5mV and the
feedback resistor has a value of 1.05R.
What are the offset and gain errors of
this ADC?
How many resistors are required to realize a 10-bit weighted-resistor DAC? What is
the ratio of the largest to the smallest resistor?
Tabulate the output voltages for the eight
binary input words for the 3-bit DAC
shown at the right. Find the linearity errors
is V
REF
= 5 V, R
REF
= 250 ; and R = 1.2188
k;?
Suppose each switch in the DAC has an
on-resistance of 200 ; and. What value of
R is required for zero gain error? Find the
linearity errors if V
REF
= 5 V, R
REF
= 250 ;
7-27
Practice Problems
A four-bit weighted current source array with
I
FS
= 2 mA is connected to the summing
junction of the op-amp shown. (a) Make a
table of the output voltages versus input code
if R = 5k;, R
O
= 1 k;and V
REF
= 1 V. (b) What
is the equivalent offset current if the op-amp
has an offset voltage of + 5mV?
A 3-bit inverted R-2R ladder R = 2.5 k; and V
BB
=
-2.5V is connected to the input of the op-amp in
the figure shown at the right. Draw a schematic
of the complete DA converter. Make a table of the
output voltages versus input codes if R
1
= 5k ;
A 14-bit ADC with V
FS
= 5.12 V has an output code of 10101010110010. What is the possible range
of input voltages?
A 20-bit ADC has V
FS
= 2 V. (a) What is the value of the LSB? (b) What is the ADC output code for
an input voltage of 1.630000 V? (c) What is the ADC output code for an input voltage of 0.997003V?
7-28
Practice Problems
A 12-bit successive approximation ADC
with V
FS
= 2 V is designed using the
circuit shown. What is the maximum
permissible offset voltage of the
comparator if the offset error is to be
less than 0.1 LSB. (b) repeat this
question for a 20-bit ADC.
A 16-bit successive approximation ADC is designed to operate at 50,000 conversions
per second. What is the clock frequency? How rapidly must the unknown and
reference voltage switches change state if the switch timing delay is to be equivalent
to less than 0.1 LSB time?
7-29
Generic use
Circuit Components
Digital Audio
Function Generators/Oscilloscopes
Motor Controllers
Digital to Analog Converters Digital to Analog Converters
- -Common Applications Common Applications
7-30
Voltage controlled Amplifier
digital input, External Reference Voltage as control
Digitally operated attenuator
External Reference Voltage as input, digital control
Programmable Filters
Digitally controlled cutoff frequencies
Digital to Analog Converters Digital to Analog Converters
- -Common Applications Common Applications
- -Circuit Components Circuit Components
-31
Digital to Analog Converters Digital to Analog Converters
- -Common Applications Common Applications
- -Function Generators Function Generators
Digital
Oscilloscopes
Digital Input
Analog Ouput
Signal Generators
Sine wave generation
Square wave generation
Triangle wave generation
Random noise generation
1
1. http://www.electrorent.com/products/search/General_Purpose_Oscilloscopes.html
2
2. http://www.bkprecision.com/power_supplies_supply_generators.htm
7-32
Cruise Control
Valve Control
Motor Control
Digital to Analog Converters Digital to Analog Converters
- -Common Applications Common Applications
- -Motor Controllers Motor Controllers
1
1. http://auto.howstuffworks.com/cruise-control.htm
2
2. http://www.emersonprocess.com/fisher/products/fieldvue/dvc/
3
3. http://www.thermionics.com/smc.htm
7-33
R-2R Theory
For linear circuits,
superposition applies.
Calculate contribute of bit n by
setting all other inputs to zero.
Equivalent resistance looking
left or right is R ohms!
Use Thevenin equivalent to
show division by 2n
7-34
DA Summary
Output from digital to analog conversion are discrete levels.
More bits means better resolution.
An example of DA conversion
Current audio CDs have 16 bit resolution or 65,536 possible output
levels
New DVD audio samples at 192 khz with 24 bit resolution or 224=
16,777,216
7-35
Analog to Digital Conversion (ADC)
Successive approximate conversion steps
Scale the input to 0-3 volts (example)
Sample and hold the input
Internally generate and star case ramp and compare
Flash Compare
Compare voltage to one of 2npossible voltage levels.
8 bit ADC would have 255 comparators.
Note that by definition, ADC have quantizing errors (number of bits
resolution)
7-36
Successive Approximation AD
7-37
DAC Realization DAC Realization - - 1 1
Weighted-R DAC circuit
Disadvantages
Maintain accurate R ratios over wide
range
Switch on resistance very low
Current draw from voltage reference
varies with binary input pattern.
Varying I causes change in V drop in
Thevenin equivalent R
source
of voltage
reference data-dependent errors
Inverted R-2R ladder
Wide range of R values avoided
Is in ladder and reference are
independent of the digital input
power dissipation does not change
REF
n
n o
V b b b v ) 2 ... 2 2 (
2
2
1
1

+ + + =
n
n
I I I I
1
3 2 1
2 ... 4 2

= = = =
)
1 2
1 1 2 2 1 1 2
... 2 2 2 ... 2
n
n n n
I b I b I b I I b b b

= + + + = + + +
) 2 /(
1
R V I
REF
=
)
1 2
1 2
2 2 ... 2
n
REF
n
V
I b b b
R

= + + +
)
1 2
1 2
2 2 ... 2
n
o n REF
v IR b b b V

= = + + +
7-38
Some DAC Characteristics Some DAC Characteristics
7-39
R R- -2R Ladder DAC Analysis 2R Ladder DAC Analysis
Weighting factors -Thevenin Analysis
Summing Op-Amp Properties
Only two resistor values- R and 2R
Does not need the kind of precision as
Binary weighted DACs
Easy to manufacture,
More popular, Less errors
7-40
7-41
If we Thvenize all sections to
the left of the activated section,
replacing it with a single
resistance to ground, we see the
network becomes far simpler
Explain how we may apply Thvenin's theorem once
again to the shaded section of this next circuit (simplified
from the previous circuit shown above) to simplify it even
more, obtaining a final result for V
out
:
7-42
A type of resistor network
known as an R-2R ladder is
often used in digital-to-analog
conversion circuits
When all switches in the R-2R
ladder are in the "ground"
position, the network has a very
interesting property regardless
of its size.
Analyze the Thvenin
equivalent resistance (as seen
from the output terminal) of the
following R-2R ladder
networks, then comment on the
results you obtain:
7-43
When only the most significant bit (MSB) of an R-2R ladder resistor
network is activated (all other bits inactive, their switches connecting
to ground), the output voltage will be the same, regardless of how
many bits the network has
Explain why this output voltage magnitude stands independent of the
number of bits (sections) in the R-2R ladder network.
V
out
= V
ref
/2
7-44
A type of resistor network
known as an R-2R ladder is
often used in digital-to-analog
conversion circuits
When all switches in the R-2R
ladder are in the "ground"
position, the network has a very
interesting property regardless
of its size.
Analyze the Thvenin
equivalent resistance (as seen
from the output terminal) of the
following R-2R ladder
networks, then comment on the
results you obtain:
7-45
When only the most significant bit (MSB) of an R-2R ladder resistor
network is activated (all other bits inactive, their switches connecting
to ground), the output voltage will be the same, regardless of how
many bits the network has
Explain why this output voltage magnitude stands independent of the
number of bits (sections) in the R-2R ladder network.
V
out
= V
ref
/2