DEPARTMENT OF TECHNICAL EDUCATION

ANDHRA PRADESH
Name : K Padmavathi
Designation : lecturer
Branch : E.C.E
Institute : Government polytechnic for women
kakinada
Year/semester : III semester
Subject : Digital Electronics
Subject code : CM -305
Topic : Logic Families
Duration : 60 Minutes
Sub Topic : ECL Gates
Teaching Aids : Tabular forms diagrams
CM305. 26 1
OBJECTIVES

• On completion of this period, you would

be able to
• Know the working of ECL gate circuit.
• Compare ECL gates with TTL and CMOS gates.

CM305. 26 2
 RECAP

Performance of TTL and CMOS gates

List of TTL and CMOS ICs

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 Vcc=GND Vcc=GND

220ohm 245ohm

NOR
output Y1

OR
VBB=-1.3V
output Y2
50kohm
50kohm 50kohm 779ohm

A B C VEE=-5.2V

Emitter Coupled Logic

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• The emitter Coupled Logic (ECL) is the fastest of all

the logic families.

• The basic component is a current switch or a

difference amplifier with an out - of phase output.

• ECL is also known as current mode logic.

• In this logic the transistor operates in the non -

saturated condition at a limited collector current.

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• The Emitter Coupling does not allow the transistor to
saturate.

• Hence it is possible to achieve propagation delay

as low as 1-2 nanoseconds.

• The two voltage levels for the output are about -0.8V
for the high state and -1.8V for the low state.

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• ECL family advantages
1. lowest propagation delay
2. fast switching speed
3. High Fan-Out.

• ECL family disadvantages

1. The highest power dissipation per gate(25mW).
2. It also requires additional reference voltage source.
3. The noise margin is about 0.3V.

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• For the above reasons ECL is only practicable for
use in fast computing applications.

• The basic ECL gate outputs provide OR and NOR

functions

• If any one of the input or all the inputs are high

then the output is low because one or more
transistors conduct.

• The output is high only when all the inputs are low

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• Basically ECL is realized using difference amplifier in
which the emitters of the two transistors are connected.

• Hence it is referred to as Emitter coupled logic.

• Emitter followers are used for dc level shifting of the

outputs so that v(0) and v(1) are same for the inputs
and the outputs.

• The two outputs Y1 and Y2 are complementary.

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Comparison of ECL gates with TTL and CMOS
gates

• ECL family has the lowest propagation delay and fast

switching speed when compared to other gates

• High fan- out is possible in ECL gate because of high

input impedance of the differential amplifier and low out

put impedance of the emitter follower.

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• The noise margin is about 0.3 volts and not as
good as in TTL gate.

• The power dissipation is 25 mw in ECL where as in

CMOS it is 0.01mw

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• The CMOS fabrication process is simpler than TTL
and ECL and it provides a greater packing density

• The speed power product of ECL is 50,which is about the

same as for the short key TTL.

• The basic TTL is NAND gate where as the basic ECL is

OR-NOR gate. The basic circuit of CMOS is inverter.

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Comparision of TTL,CMOS and ECL Families

Logic Noise Fan-in Fan-out Propagati Power

family immunity on delay dissipatio
V in(v) (ns) n(mw)

TTL 0.5 12 to 14 >10 15 0.1

ECL 0.16 >10 >10 <3 175

CMOS 1.5 >10 >10 15 0.01

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SUMMARY

• ECL is the fastest logic family

• ECL is the non-saturated logic family

• The basic circuit of ECL is OR-NOR gate

• High fan out is possible in the ECl gate

• ECL power dissipation is 25mW.

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Quiz

1. Which of the following is fastest logic family.

(c) TTL

(e) CMOS

(g) ECL

(i) NMOS

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 Frequently asked questions

1. Draw the circuit of ECL gate and explain its working

2. Compare ECL gates with TTL and CMOS gates

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