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ANDHRA PRADHESH
Name : K Padmavathi
Designation : Lecturer
Branch : E.C.E
Institute : Government Polytechnic for
women, Kakinada
Year/Semester : III Semester
Subject : Digital Electronics
Subject Code : CM-305
CM305.24 2
Recap
• TTL NAND gate with totem pole output
CM305.24 3
Fig 2.5 CMOS NAND Gate
+V dd
T1
A T2
Y
T3
B
.
T4
CM305.24 4
• T1 and T2 are P channel MOSFETs,T3 and T4 are
N channel MOSFETs.
turned to ON condition.
B is low.
CM305.24 6
• If both the inputs are low , then both the
CM305.24 7
Comparison of TTL NAND gate with CMOS NAND
gate
• The CMOS fabrication process is simpler than
TTL and provides a greater packing density.
CM305.24 9
Quiz
CM305.24 10
QUESTIONS
CM305.24 11