Nizwa College of Technology Department of IT Computer Architecture

Processor Basics

Internal Architecture of the Processor

ALU: Performs all arithmetic and logic operations Processors has general purpose registers Status register: It keeps status of different arithmetic and logical operations Program counters: Holds the address of next instruction to be fetched from external memory Stack pointer indicates the address of the stack-top.

Internal Architecture of the Processor

Control Unit:

Generate control signals. Coordinate or orchestrate the various processor units participating in the execution of an instruction. For example, the Read / Write signal allows the memory to be told that the processor wants to read or write information. Send clock pulses. Number of pulses per second, written in Hertz (Hz). 200 MHz computer has a clock that sends 200,000,000 pulses per second. With each clock pulse processor performs operation

Internal clock

General internal Architecture of the computer

Clock Pulse

Basic Functions of Processor

Fetch, decode and execute instructions as long as it is powered on. Apart from that load or store operands in the external memory. The operation of the processors is sequential. Sometimes it is diverted to other sequence due to branch, subroutine or any external interrupt signal.

Peripheral device and external communication

Not only memory devices are connected with processor I/O devices are also connected through bus Three types of bus

Address bus Unidirectional, it carries address signal from processor to all external devices, memory, and I/O. Data bus Bidirectional, data move in and out the processor Control bus Control signals also move out the processor

External signals of a generic processor

Address bus and Addressing

Number of address lines in the processor determines maximum memory size capability. n address lines 2n memory locations 16 address lines 216 or 64k locations

Data bus & Data flow control

Simultaneously handling capability of maximum number of bits 8-bit processor 8 bit of data at a time Flow of data is bidirectional

Control bus

Condition of these control signals indicates processor current operation Two important control signals READ/WRITE Four READ/WRITE signals are offered Two more input signals: clock & Reset Few external interrupt signals

Processor Operations

The job of processor is to execute programs Programs composed of set of instructions HLL programs machine code which understandable by the processor Machine instructions are simple. Example

Copy a data byte from external memory to internal register Add two numbers If result is zero , then skip next three instructions

Instruction Cycle

To execute any type of instruction the processor should perform the following steps.

Fetch Decode Execute

Combination of these steps known as instruction cycle.

Flowchart for simplified instruction set

Instruction fetch

Fetch the instruction from the memory Memory is very vast area containing many bytes of instructions Every memory has unique memory address Processor must pin-point the correct location to extract the target byte. Processor place memory address on the address bus and send read control signal. When signal reach memory, the data sent to the processor automatically.

Timing diagram for instruction fetch

How so many devices interact with data, control and address bus? Every device has a chip select input and if this input is not activated, the device does not react with the system bus communication.

Instruction Decode

After processor receives the instruction, it becomes busy to understand it. It is called instruction decode. It is carried out within the processor

Instruction Execute

Last phase is instruction execution Depending upon the instruction, one or several operations are implemented by the processor. Once this part is completed, the processor goes to next instruction.

Machine cycle and T-states

Machine Cycle It is time slice during which 1-byte or one word of data transacted between processor and external device. T-state Each machine cycle is composed of several T-states An instruction cycle needs one or more machine cycle.

Instruction cycle, Machine cycle and T-state correlation

Execution of an instruction increment a memory location by one.

Register Set

To perform internal operations, processors have internal registers. To store temporary information or some operands What is a register? Combination of flip-flop. Some registers are user accessible registers and others are not.

Register Set

Status Register

Processor performs arithmetic & logic operations. Depending on the result (zero, negative, produced carry or odd/even parity) programmers have to take additional actions Status register solves this problem by offering result status of the last performed arithmetic & logic operations

Accumulator

All arithmetic and logic operation result is available in accumulator.

Register Set

Program counter
Holds address memory location for next instruction byte/ word to be fetched by the processor.

Stack pointer
Always Points top of stack area

Stack Organization

Stack is an area within the system RAM. It is used for special storage by the program or programmer. Stack is used to stored some important address and data sets. The register stack pointer holds the address of stacktop. If any new data to be stored within in the stack, it must be stored in the address pointer by the stack pointer. Stack flow Last-In-First-Out(LIFO) data movement technique.

Stack storage area

Every processor offers two instruction to handle the stack directly.

PUSH- Place the data on the stack-top POP-Take it out from the stack- top

Whenever any data are placed on the stack-top or taken out from it, Stack Pointer automatically changed by the processor by itself.

Stack and its operation

Functioning of stack during subroutine call and return

Interrupts

Processors has some input pins which receive signal from external devices. These inputs of the processor are designated as interrupt inputs. Processor gives immediate attention to interrupts. Procedure through which the immediate need is fulfilled is known as interrupt handling. To service any interrupt, the processor must execute a special routine developed to provide the need of the interrupting device. It is known as interrupt service routine (ISR)

Modified for instruction cycle