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555 timer IC is an integrated circuit (chip) used in a variety of timer, pulse generation and oscillator applications




1 2

Connects to the 0v power supply Rises, and interval starts, when this input falls below 1/3 VCC. Goes HIGH and LOW. Internally connected HIGH via 100k. Must be taken below 0.8v to reset the chip. A voltage applied to this pin will vary the timing of the RC network The interval ends when the voltage at THR is greater than at CTRL May discharge a capacitor between intervals. Voltage is usually between 3 and 15 V.

3 4 5 6 7 8



V +, V CC Positive supply

555 has four operating modes : a. Monostable b. Astable c. Bistable d. Buffer or Schmitt trigger

i. monostable ii. astable multivibrators, iii. dc-dc converters, iv. digital logic probes, v. waveform generators, vi. analog frequency meters vii. tachometers, viii. temperature measurement ix. control devices, x. voltage regulators etc.

Acts as a one-shot pulse generator. Receives a signal at the trigger input that falls below a third of the voltage supply.

When the output is low, transistor Q1 is ON and the capacitor C is shorted out to ground. When a negative trigger pulse to pin 2, transistor Q1 is turned OFF, which releases the short circuit across the external capacitor C and drives the output high. The capacitor C now starts charging up towards VCC through R. When the voltage across the capacitor equals 2/3 VCC, comparator 1s output switches from low to high, which inturn drives the output to its low state via the output of the flip-flop. At the same time the output of the flipflop turns transistor Q1 ON and the capacitor C rapidly discharges through the transistor. The output of the monostable remains low until a trigger pulse is again applied. The cycle repeats. The time during which the output remains high is given by Tp= 1.1 RC

Input triggers timer on negative edge

Determine the period of the output waveform in Figure 1 when triggered by a negative pulse.

7.5 k


Figure 1

Tp = 0.825 ms


Does not require any external trigger to change the state of the output, hence the name free-running. An astable multivibrator can be produced by adding resistors and a capacitor to the basic timer IC, as illustrated in figure above.

The time during which the capacitor C charges from 1/3 VCC to 2/3 VCC is equal to the time the output is high.

TH = 1 1 .1 (RA + RB)C

The time taken by the capacitor to charge from 0 to +2/3 VCC

TL = 1 1(RB)C .1

Period of oscillations,

T = TH + TL = 1 1 + 1 C .1 (RA RB)
1 1 .1 + RB )C 1

The frequency of oscillations being the reciprocal of the overall period of oscillations T is given as

1 f = = T ( R

Percentage of duty cycle

RA + RB % Duty Cycle = 11 1 RA + 1 B R

Charging time

Discharging time


Based on the Figure 2, get the following items. i. TH ii. TL iii. Frequency iv, % duty cycle iv. Draw the waveform at the pin 2 and pin 3.

VCC 1.3 k
6 4 555 8 3


3.3 k

2 5 7 1

0.1 F 0.01 F

Figure 2

i. ii. iii. iv. v.

Th = 0.32 ms Tl = 0.23 ms F = 1.82 kHz % Duty Cycle = 58.23 % Input and output waveforms
Charging time

Discharging time


A 555 timer is connected as a astable multivibrator. A 0.01 F which is used as a noise divertor is connected to pin 5 and is grounded. If a frequency and duty cycle of 30 kHz and 75% respectively are required at the output. i. Calculate the values of resistors when a 0.1 F capacitor is used. ii. Draw and label a complete circuit diagram (block diagram) of astable multivibrator which include the values of devices and pins number. iii. Draw the signal waveform at pin no. 2 or pin no.6 and pin no. 3.

i. Ra = 240 Rb = 120 ii.

6 4 555 8 3




2 5 7 1

0.1 F 0.01 F

Charging time Discharging time



The name: "Bi" meaning two The bistable has two stable states, high and low. Maintain a given output state indefinitely unless an external trigger is applied. They are more commonly known as Latches and Flip-flops for use in sequential type circuits.

It has two inputs: Trigger (Pin 2) makes the output high. Trigger is 'active low', it functions when <1/3Vs. Reset (Pin 4) makes the output low. Reset is 'active low', it resets when <0.7V.
Bistable mode

It is an inverting buffer or NOT gate because the output logic state (low/high) is the inverse of the input state: Input low (<1/3Vs) makes output high, +Vs Input high (>2/3Vs) makes output low, 0V


the input voltage is between 1/3 and 2/3 Vs the output remains in its present state. This intermediate input region is a deadspace where there is no response, a property called hysteresis

Schmitt trigger is a generic name of threshold circuits with positive feedback having a loop gain > 1. 2 types :- inverting - noninverting

Symbol of Schmitt Trigger

One application for a comparator is to compare an input signal Vin to a reference voltage Vr. If the input signal is noisy, the output can make many undesirable transitions each time the signal crosses through the reference Vin (t) level.




Inverting Schmitt Trigger

Noninverting Schmitt trigger operation

The value of Vout depends on the load resistance and the supply voltages

Inverting Schmitt trigger operation

As shown above, the UTP is determined by the values of +Vout . When the circuit input exceeds the UTP, the output from the circuit goes to Vout. When the input makes a negative- going transition past the LTP, the output from the op-amp returns to +Vout .


- producing a square

wave Monostable - producing a single pulse when triggered Bistable - a simple memory which can be set and reset Buffer - an inverting buffer (Schmitt trigger)

The 556 is a dual version of the 555 housed in a 14-pin package, The two timers (A and B) share the same power supply pins. The 556 can be used with a supply voltage (Vs) in the range 4.5 to 15V (18V absolute maximum) which is same with 555.