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Temperature The most frequently controlled variable in industrial processes. A prime importance in drying processes, melting processes, heat-treating processes, chemical processes, etc. Thermocouple The preferred transducer when the process temperature is a few hundred degrees Fahrenheit. One of the most temperature control schemes is a thermocouple input into a proportional plus reset electronic temperature controller, with the final correcting device being a variable-position fuel valve.
The 6.2-V zener diode, ZDI, provides the stable dc supply voltage to the bridge. The bridge is designed so the voltage at the top R3 equals the voltage at the top of R5; both of these voltages are measured relative to ground, the bottom of the bridge. The 50k zero pot, P2 is adjusted to accomplish this. Causing these two voltages to be equal ensures that an extreme setting on the setpoint pot P1 exactly balances a 0-V signal from the thermocouple. That is when P1 is dialed all the way down with its wiper touching the junction of P1 and R5; the error signal will be zero when the thermocouple puts out a zero signal. This will happen only if the voltage across R3 equals the voltage across the series combination of P2 and R5 The system operator selects the desired set-point temperature by adjusting the position of P1, the set-point pot. This pot has a pointer attached to its shaft, which points to a marked temperature scale. The marked temperature scale is not shown in an electronic schematic diagram.
Once the set-point pot has been adjusted, the system seeks to bring the measured temperature into agreement with the set-point. When the two are in agreement, the thermocouple signal voltage exactly equals the voltage between the wiper and the bottom terminal of P1. If the measured temperature should rise above the set-point, the thermocouple (T/C) signal will be greater than the set-point signal and the error voltage will be positive, as marked in Fig. 15-4(a). If the measured temperature should drop below the set point, the T/C signal will be smaller than the set-point signal and the error voltage will be negative. Its polarity would then be the opposite of the polarity shown in Fig. 15-4(a). The greater the deviation between the measured temperature and set-point temperature, the greater is the difference between these two voltages and the greater is the magnitude of the error signal.
The FET therefore alternates between an open switch and a closed switch. When it is an open switch, the top line of the error signal (the T/C voltage) is connected to the preamp coupling capacitor, C1. When the FET is closed switch, it effectively applies the bottom of the error signal (the set-point voltage) to the preamp input. This is true because the bottom line is coupled to the preamp input through a Thevenin resistance of about 2k , whereas the top line (T/C signal) is coupled through a Thevenin resistance of about 18k . Therefore the bottom line signal overwhelms the top line signal when the FET is ON (when it is a closed switch from source to drain). The signal delivered to C1 is therefore a square waveform whose peak-to-peak value equals the magnitude of the dc error signal. The chopped error signal is coupled through C1 and R9 into the base of transistor Q2. Transistors Q2, Q3, and Q4 constitute a high-gain ac amplifier. There are no stabilizing resistors in the emitter leads of Q2, Q3, and Q4. Instead, bias stability is provided by negative dc feedback from the collector of Q4 into the base divider (R10 and R11) of Q2. The absence of degeneration resistors in the emitter leads provides a high voltage gain in this three-stage amplifier.
Notice that Q2 and Q3 stages are decoupled from the Q4 stage by R19 and C6. This technique minimizes the appearance of dc supply line noise in the initial stages of the preamplifier, which is where it could do the most harm. The ac signal appearing at the collector of Q4 rides on a dc level of about 6.5 V, which is the Q4 collector bias voltage. The dc component is removed by output coupling capacitor C2. The ac output signal is therefore centered on ground when it appears at R15. The ac signal is converted to a dc signal by the action of Q5, an FET demodulator. This FET is also being used in a switching mode. Its gate is driven by the square wave at the collector of Q8, which is 1800 out of phase with the square wave form at Q7 which drives the gate of the FET chopper (Q1). As Q5 alternately switches open and closed, it removes one half of the ac signal appearing at the left end of R15. When it turns ON, Q5 shorts the R15 R16 junction to ground, causing the instantaneous voltage on the left of R15 to be removed. When Q5 turns OFF, it disconnects the R15-R16 junction from ground and allows the instantaneous voltage on the left of R15 to come through R15 little bit diminished.
The initial polarity of the dc error signal from the bridge determines whether the FET demodulator removers the negative half cycle or the positive half cycle of the ac waveform. If the dc error signal is positive as shown, the FET demodulator receives the negative half cycle of the output. If the dc error signal is negative (measured temperature is below set point), then the FET demodulator removes the positive half cycle of the output. Try to reason these last statements out for yourself. The voltage waveform which appears at point A is filtered by R16 and C3. this low-pass filter converts the square waveform at point A into a dc voltage with just a slight ripple component. This voltage is called the amplified error signal. The amplified error signal may be positive or it may be negative, depending on the polarity of the original dc error signal. It will have the same polarity as the original dc error. The amplified error signal is applied to Q6; an emitter follower, which furnishes a high input impedance. The voltage appearing at the emitter of Q6 is 0.7 V more negative than the amplified error signal because of the voltage drop across the base-emitter junction. This 0.7 V is restored by the R18-D2 combination; there is a 0.7 rise across a silicon diode D2. The purpose of passing the amplified error signal through Q6 and D2 is to buffer it to the demodulator. This results in an amplified error signal which can deliver a fairly large current into the circuit that it drives without disturbing the demodulator.
Knowing that the circuit always acts to bring Vout1 to zero, we can rewrite the preceding equation as 0 = 10k (Verror) + 10k (Vvp) 10k 68k -Vvp = 6.8(Verror) This equation expresses the proportional nature of the control. It tells us that the greater the magnitude of Verror, the greater the magnitude of Vvp. Thus the value correction is proportional to the amount of deviation from set point. This is the essence of proportional control.
Reset action
As with any purely proportional controller, the correction imparted to the valve will never quite return the temperature to set point to drive. All it will do is drive the temperature back toward set point. To get the actual measured temperature back to set point, the reset mode of control must be added. In Fig. 15-4(b) the reset control action is supplied by op amp 3 and op amp 4 and their associated components. To understand how this circuitry works, consider the positive Verror which appeared before. The appearance of the positive Verror resulted in a readjustment of the fuel valve in the closed direction; the corresponding reduction in fuel flow caused the measured temperature to return to the neighborhood of the set point. However, a small positive Verror will persist.
Group 3
Prepared by: Raymart Paraiso Kharen Vincel Santos Jhaica Janelle Alincastre King James Manuel Lota Angelica Fernandez