BJT Small-Signal Analysis

Contents
      

Common-Emitter fixed-bias configuration Voltage divider bias CE Emitter bias Emitter-follower configuration Common-base configuration Collector-feedback configuration Hybrid equivalent circuit and model

Typical amplifier operation.

A generic dc load line.

VCC  VCE IC ! RC

I C (sat)

VCC ! RC

VCE (off ) ! VCC

Plot the dc load line for the circuit shown in Fig.

Plot the dc load line for the circuit shown in Fig. Then, find the values of VCE for IC = 1, 2, 5 mA respectively.

VCE ! VCC  I C
IC (mA) 1 2 5 9 8 5

VCE (V)

Optimum Q-point with amplifier operation

IC ! I B

VCE ! VCC  I C

Base bias (fixed bias).

IB VCC  VBE RB

IC ! I B
VCE ! VCC  I C
C

F = dc current gain = hFE

Example
IB ! VCC  0.7V
B

8V  0.7V 360k

! 20.28 A

I C ! hFE I B ! 100 20.28 A

! 2.028mA
VCE ! VCC  I C RC ! 8  2.028m ! 3.94
The circuit is midpoint biased.
9

2k

Example
Construct the dc load line for the circuit shown in Fig, and plot the Q-point from the values obtained in Example Determine whether the circuit is midpoint biased.

I C (sat )

VCC 8 ! ! RC 2k

! 4m

VCE off ! VCC ! 8V

10

Example (Q-point shift.)

The transistor in Fig. 7.12 has values of hFE = 100 when T = 25 C and hFE = 150 when T = 100 C. Determine the Qpoint values of IC and VCE at both of these temperatures.

Temp(C) 25 100

IB (QA) 20.28 20.28

IC (mA) 2.028 3.04

VCE (V) 3.94 1.92

11

Base bias characteristics. (1)

Circuit recognition: A single resistor (RB) between the base terminal and VCC. No emitter resistor.

Advantage: Circuit simplicity. Disadvantage: Q-point shift with temp. Applications: Switching circuits only.

12

Base bias characteristics. (2)

Load line equations:
I C (sat ) VCE (o VCC $ RC
)

! VCC

Q-point equations:

IB !

VCC  VBE
B

I C ! hFE I B VCE ! VCC  I C

C

13

Voltage divider bias. (1)

Assume that I2 > 10IB.

R2 VB ! VCC R1  R2

VE ! VB  0.7V VE IE ! RE
Assume that ICQ $ IE (or hFE >> 1). Then

VCEQ ! VCC  I CQ RC  RE
14

Which value of hFE do I use?

Transistor specification sheet may list any combination of the following hFE: max. hFE, min. hFE, or typ. hFE. Use typical value if there is one. Otherwise, use

hFE (ave) ! hFE (min) v hFE (max)

15

Stability of Voltage Divider Bias Circuit

The Q-point of voltage divider bias circuit is less dependent on hFE than that of the base bias (fixed bias).

For example, if IE is exactly 10 mA, the range of hFE is 100 to 300. Then At hFE ! 100, I B ! 10mA IE ! $ 100 A and I CQ ! I E  I B $ 9.90mA 101 hFE  1

At hFE ! 300, I B !

IE 10mA ! $ 33 A and I CQ ! I E  I B $ 9.97mA hFE  1 301

ICQ hardly changes over the entire range of hFE.

16

Load line for voltage divider bias circuit.

I C (sat )

VCC 10V ! ! RC  RE 260 +240

! 20mA

Circuit values are from Example 7.9.

VCE (o

! VCC ! 10

17

Emitter bias.

VEE  0.7V IB ! RB  hFE  1 RE

18

Load Line for Emitter-Bias Circuit

I C (sat ) VCC  (VEE ) VCC  VEE ! ! RC  RE RC  RE

VCE ( off ) ! VCC  VEE ! VCC  VEE

19

Emitter-bias characteristics
Circuit recognition: A split (dualpolairty) power supply and the base resistor is connected to ground. Advantage: The circuit Q-point values are stable against changes in hFE. Disadvantage: Requires the use of dualpolarity power supply. Applications: Used primarily to bias linear amplifiers.

20

Collector-feedback bias.
VCC ! I C  I B RC  I B RB  VBE VCC  VBE IB ! ( hFE  1) RC  RB
I CQ ! hFE I B

VCEQ ! VCC  hFE  1 I B RC

$ VCC  I CQ RC

21

Circuit Stability of Collector-Feedback Bias

hFE increases

IC increases (if IB is the same)

VCE decreases

IB decreases

IC does not increase that much. Good Stability. Less dependent on hFE and temperature.
22

Collector-Feedback Characteristics (1)

Circuit recognition: The base resistor is connected between the base and the collector terminals of the transistor. Advantage: A simple circuit with relatively stable Q-point. Disadvantage: Relatively poor ac characteristics. Applications: Used primarily to bias linear amplifiers.

23

Emitter-feedback bias.
VCC  VBE IB ! RB  hFE  1 RE I CQ ! hFE I B

I E ! hFE  1 I B VCEQ ! VCC  IC RC  I E RE $ VCC  ICQ RC  RE

24

Circuit Stability of Emitter-Feedback Bias

hFE increases IC increases (if IB is the same)

VE increases

IB decreases

IC does not increase that much. IC is less dependent on hFE and temperature.
25

Emitter-Feedback Characteristics (1)

Circuit recognition: Similar to voltage divider bias with R2 missing (or base bias with RE added). Advantage: A simple circuit with relatively stable Q-point. Disadvantage: Requires more components than collectorfeedback bias. Applications: Used primarily to bias linear amplifiers.
26

Emitter-Feedback Characteristics (2)

Q-point relationships:

VCC  VBE IB ! RB  ( hFE  1) RE

I CQ ! hFE I B

VCEQ $ VCC  I CQ RC  RE

27

BJT Small Signal Analysis

re transistor model employs a diode and controlled current source to duplicate the behavior of a transistor in the region of interest. The re and hybrid models will be used to analyze smallsignal AC analysis of standard transistor network configurations. Ex: Common-base, common-emitter and common-collector configurations. The network analyzed represent the majority of those appearing in practice today.

AC equivalent of a network is obtained by:

1. Setting all DC sources to zero 2. Replacing all capacitors by s/c equiv. 3. Redraw the network in more convenient and logical form

Common-Emitter (CE) Fixed-Bias Configuration

The input (Vi) is applied to the base and the output (Vo) is from the collector. The Common-Emitter is characterized as having high input impedance and low output impedance with a high voltage and current gain.

Common-Emitter (CE) Fixed-Bias Configuration

Removing DC effects of VCC and Capacitors

Common-Emitter (CE) Fixed-Bias Configuration

re Model

Determine F, re, and ro: F and ro: look in the specification sheet for the transistor or test the transistor using a curve tracer. 26mV re: calculate re using dc analysis: r !
e

The Norton Equivalent Circuit

Get the Norton Equivalent Circuit from the Thevenin by Source Transformation.

36

Common-Emitter (CE) Fixed-Bias Configuration

Impedance Calculations

Input Impedance:

Output Impedance:

Zi ! R B || F re
i

Z o ! R || rO

$ Fre

R u 10 Fre

Z o $ Rc

ro u 10 Rc

Common-Emitter (CE) Fixed-Bias Configuration

Gain Calculations
Voltage Gain (Av):

Vo (R C || ro ) Av ! ! Vi re RC Av !  re

ro u 10R C

Current Gain (Ai):

Io F R B ro Ai ! ! Ii (ro  R C )(R B  Fre )

Ai $ F
Current Gain from Voltage Gain:

ro u 10R C , R B u 10 F re

Zi A i ! A v RC

Common-Emitter (CE) Fixed-Bias Configuration

Voltage Gain
VO Av ! Vi VO !  I b (R C || ro ) Vi ! I b re

 I b (R C || ro ) Av ! I b re
(R C || ro ) ! re if ro ! g; or u 10R C RC Av ! re

Common-Emitter (CE) Fixed-Bias Configuration

Current gain
The current gain is determined by applying the current - divider rule to the input and output circuits Io ! Ib ! I r ro I b and o ! o I b ro  R C ro  R C R B Ii I RB and b ! R B  re I i R B  re

R B I o I o I b ro A i ! ! ! I I r  R R  r I i b i o C B e I ro R B @ Ai ! o ! Ii ro  R C R B  re

if ro u 10R C and R B u 10 re ,
@ Ai !

Io r R $ o B ! Ii ro R B Zi RC

or we can use this equation too

@ A i ! A v

Common-Emitter (CE) Fixed-Bias Configuration

Phase Relationship

The phase relationship between input and output is 180 degrees. The negative sign used in the voltage gain formulas indicates the inversion.

CE Voltage-Divider Bias Configuration

CE Voltage-Divider Bias Configuration

re Model

You still need to determine F, re, and ro.

CE Voltage-Divider Bias Configuration

Impedance Calculations

Input Impedance:

Output Impedance:

R1R2 R d R1 || R2 ! ! R1  R2

Zo ! RC || ro
Zo $ RC ro u 10RC

Zi ! R d re || &

CE Voltage-Divider Bias Configuration

Gain Calculations
Voltage Gain (Av):

Vo  R C || ro Av ! ! Vi re
Current Gain (Ai):

Vo RC Av ! $ Vi re

ro u 10R C

Io FR d ro Ai ! ! I i (ro  R C )(R d Fre ) 

Io Rd Ai ! $ I i R d F re 

ro u 10R C

Current Gain from Voltage Gain:

Io Ai ! $ F Ii

u ro u 10R C , R d 10 F re

Zi A i ! A v RC

CE Voltage-Divider Bias Configuration

Voltage Gain
VO ! ( I b )(R C || ro ) Vi Ib ! re

Vi Vo !  (R C || ro ) r e  (R C || ro ) @Av ! re
if ro ! g; or u 10R C

 RC @Av ! re

CE Voltage-Divider Bias Configuration

Current gain
since the network is so similar to that common - emitter fixed - bias configuration, except for the R' , the equation for the current gain will have the same format. R' ! R 1 || R 2 ! R Io R' ro Ai ! ! I i ro  R C R' re for ro u 10R C , Ai ! Io R' ro $ I i ro R' re R' $ R' re

CE Voltage-Divider Bias Configuration

And if R' u 10 A
i

re ,

Io ! ! Ii
i

R' R'

@ A

Io ! $ Ii ! A Zi R C

as an option @ A
i V

CE Voltage-Divider Bias Configuration

Phase Relationship
A CE amplifier configuration will always have a phase relationship between input and output is 180 degrees. This is independent of the DC bias.

CE Emitter-Bias Configuration
Unbypassed RE

CE Emitter-Bias Configuration

re Model

Again you need to determine F, re.

CE Emitter-Bias Configuration

Impedance Calculations

Input Impedance:

Output Impedance:

Z b ! F re  ( F  1)R E

Zo ! R C

Z b $ F (re  R E )
Z b $ FR E R E "" re

Zi ! R B || Z b

CE Emitter-Bias Configuration

Defining the input impedance of a transistor with an unbypassed emitter resistor

Applying KVL to the input side : Vi ! I b re  I e R E Vi ! I b re  (  1) I b R E Vi @ Zb ! ! re  (  1) R E Ib since is normally greater th an 1, @ Z b $ re  R E since R E is much greater th an re , eqn above can be reduced to @ Zb $ R E

CE Emitter-Bias Configuration

Gain Calculations
Voltage Gain (Av):

Vo FR C Av ! ! Vi Zb

Vo RC Av ! ! Vi re  R E
or

Z b ! F (re  R E )
Z b $ FR E

Vo RC Av ! $ Vi RE

Current Gain (Ai):

Io FR B Ai ! ! Ii R B  Z b
Current Gain from Voltage Gain:

Zi A i ! A v RC

CE Emitter-Bias Configuration

Voltage Gain
Vi Ib ! Zb Vo ! I o R C !  I b R C Vi !  R C Z b V  RC @AV ! o ! Vi Zb substituting Zb ! (re  R E ) gives @AV ! Vo  RC ! Vi re  R E Vo  R C ! Vi RE

and for the approximation Z b $ R E @AV !

CE Emitter-Bias Configuration

Current Gain
The magnitude of R B is often too close to Z b to permit the approximat ion I b ! I i . Applying the current - divider rule to the input circuit wi ll result in : Ib ! R B Ii R B  Zb

Ib RB ! Ii R B  Zb Io ! FI b Io !F Ib
@ Ai !

Io Io I b RB ! !F Ii I b Ii R B  Zb Zi RC

@ Ai ! A v

CE Emitter-Bias Configuration

Phase Relationship
A CE amplifier configuration will always have a phase relationship between input and output is 180 degrees. This is independent of the DC bias.

CE Emitter-Bias Configuration
Bypassed RE

This is the same circuit as the CE fixed-bias configuration and therefore can be solved using the same re model.

Emitter-Follower Configuration

You may recognize this as the Common-Collector configuration. Indeed they are the same circuit. Note the input is on the base and the output is from the emitter.

Emitter-Follower Configuration

re Model

You still need to determine F and re.

Emitter-Follower Configuration

Impedance Calculations

Input Impedance:

Zi ! R B || Z b
Z b ! F re  ( F  1)R E

Z b $ (re  R E )

Zb $ R E

Emitter-Follower Configuration

Calculation for the current Ie

Vi Ib ! Zb Vi I e ! (  1)I b ! (  1) Zb subtitutin g for Z b gives (  1)Vi Ie ! re  (  1)R E R re E (  1) r r and e $ e ! re (  1) @ Ie ! Vi re  R E ! Vi but (  1) $

Emitter-Follower Configuration

Impedance Calculations (contd)

Output Impedance:

efining the output impedence for the emitter follower configuration

@ Ie !

Vi re  R E

Z o ! R E || re

Z o $ re

R E "" r e

Emitter-Follower Configuration

Gain Calculations
Voltage Gain (Av):

Vo RE Av ! ! Vi R E  re
Current Gain (Ai):

Vo Av ! $1 Vi

R E "" re , R E  re $ R E

FR B Ai $  R B  Zb
Current Gain from Voltage Gain:

Zi A i ! A v RE

Emitter-Follower Configuration

Voltage gain
R E Vi Vo ! R E  re Vo RE @Av ! ! Vi R E  re R E usually much greater than re , R E  re $ R E Vo @Av ! $1 Vi

Emitter-Follower Configuration

Current Gain
R B Ii Ib ! R B  Zb Ib RB ! Ii R B  Zb I o !  I e !  ( F  1) I b Io !  ( F  1) Ib RB Io Io Ib ! !  ( F  1) Ai ! Ii Ib Ii R B  Zb since ( F  1) $ F ,

@ Ai $ 
or

FR B R B  Zb

Zi A i ! A v RE

Emitter-Follower Configuration

Phase Relationship
A CC amplifier or Emitter Follower configuration has no phase shift between input and output.

Vo

Common-Base (CB) Configuration

The input (Vi) is applied to the emitter and the output (Vo) is from the collector. The Common-Base is characterized as having low input impedance and high output impedance with a current gain less than 1 and a very high voltage gain.

Common-Base (CB) Configuration

re Model

You will need to determine E and re.

Common-Base (CB) Configuration

Impedance Calculations

Input Impedance:

Output Impedance:

Zi ! R E || re

Zo ! R C

Common-Base (CB) Configuration

Gain Calculations
Voltage Gain (Av):

Vo ER C R C Av ! ! $ Vi re re
Current Gain (Ai):

Io A i ! ! E $ 1 Ii

Common-Base (CB) Configuration

Voltage & Current gain

Vo ! I o R C ! ( I c R C ) ! IeR C Vi Ie ! re Vi Vo ! R C r e Vo RC RC @ AV ! ! $ Vi re re

I e ! Ii I o ! EI e ! EI i Io @ A i ! ! E ! 1 Ii

Common-Base (CB) Configuration

Phase Relationship
A CB amplifier configuration has no phase shift between input and output.

Vo

Collector DC Feedback Configuration

The network has a dc feedback resistor for increased stability, yet the capacitor C3 will shift portions of the feedback resistance to the input and output sections of the network in the ac domain. The portion of RF shifted to the input or output side will be determined by the desired ac input and output resistance levels.

Collector DC Feedback Configuration

Impedance Calculations

Substituting the re equivalent circuit into the ac equivalent network Input Impedance: Output Impedance:

Zi ! R F1 || re

Z o ! R C || R F2 || ro
Z o $ RC || RF 2

Collector DC Feedback Configuration

Voltage Gain
R' ! ro || R F2 || R C Vo !  I b R' Vi Ib ! re Vi Vo !  R' re Vo ro || R F2 || R C @Av ! ! Vi re for ro u 10R C , Vo R F2 || R C @Av ! ! Vi re

Collector DC Feedback Configuration

Current Gain
For the input side Ib ! R FIi or R F  re R' I b R'  R C Ib RF ! I i R F  re Io R' ! I b R'  R C

and for the output side using R' ! ro || R F2 Io ! or

the current gain , Ai ! Io Io Ib R' R F1 . ! . ! I i I b I i R'  R C R F  re Io R' R F1 ! I i R'  R C R F1  re

@ Ai !

since R F1 is usually much larger tha n re , R F1  re $ R F1 Ai ! Io R F1 (ro || R F2 ) $ I i R F1 ro || R F2  R C Io $ Ii 1  RC ro || R F2

@ Ai !

or @ A i !

Io Z ! A V i Ii RC

Approximate Hybrid Equivalent Circuit

The h-parameters can be derived from the re model: hie = Fre hfe = F hoe = 1/ro hib = re hfb = -E

The h-parameters are also found in the specification sheet for the transistor.

Approximate Common-Emitter Equivalent Circuit

Hybrid equivalent model

re equivalent model

Approximate Common-Base Equivalent Circuit

Hybrid equivalent model

re equivalent model

Troubleshooting
1. Check the DC bias voltages if not correct check power supply, resistors, transistor. Also check to ensure that the coupling capacitor between amplifier stages is K. 2. Check the AC voltages if not correct check transistor, capacitors and the loading effect of the next stage.

Practical Applications
Audio Mixer Preamplifier Random-Noise Generator Sound Modulated Light Source

Chapter 7: BJT Transistor Modeling

Disadvantages
Re model
Fails to account the output impedance level of device and feedback effect from output to input

Hybrid equivalent model

Limited to specified operating condition in order to obtain accurate result

84

V CC

DC supply 0 potential I/p coupling capacitor s/c Large values Block DC and pass AC signal
C1

R1

RC

C2 RS

+
Vo

+
Vi R2 RE C3

O/p coupling capacitor s/c Large values Block DC and pass AC signal

VS

Voltage-divider configuration under AC analysis

Bypass capacitor s/c Large values

R1

RC

+
RS

+
Vi R2

Vo

VS

Redraw the voltagedivider configuration after removing dc supply and 85 insert s/c for the capacitors

Modeling of BJT begin HERE!

Ii B
R1 RC

+
+
RS Vi

Transistor smallsignal ac equivalent cct E

Io

Zi R1 R2

+
Rc Zo Vo

RS

+
Vi R2

Vo

VS

VS

Redrawn for small-signal AC analysis

86

AC bias analysis : 1) Kill all DC sources 2) Coupling and Bypass capacitors are short cct. The effect of there capacitors is to set a lower cut-off frequency for the cct. 3) Inspect the cct (replace BJTs with its small signal model:re or hybrid). 4) Solve for voltage and current transfer function, i/o and o/p impedances.
87

IMPORTANT PARAMETERS Input impedance, Zi Output impedance, Zo Voltage gain, Av Current gain, Ai Input Impedance, Zi(few ohms M;) The input impedance of an amplifier is the value as a load when connecting a single source to the I/p of terminal of the amplifier.
88

Two port system -determining input impedance Zi

Rsense + Ii Zi + Vi Two-port system

VS

Vi Zi ! Ii
Vs  Vi Ii ! R sense

Determining Zi

The input impedance of transistor can be approximately determined using dc biasing because it doesnt simply change when the magnitude of applied ac signal is change.

89

Demonstrating the impact of Zi

Rsource +
600

VS=10mV
-

1.2 k

Zi

+ Vi Two-port system

Ideal source, Rsource ! 0 Full 10mV applied to the system With source impedance, Rsource ! 600 ZiV s 1.2 k (10 m ) Vi ! ! ! 6.6 mV Zi  Rsource 1.2 k  600

90

Example 6.1: For the system of Fig. Below, determine the level of input impedance
1k

Rsense

VS=2mV
-

Zi

+ Two-port system

Vi=1.2mV -

Solution : V s  V i 2 m  1 .2 m 0 .8 m Ii ! ! ! ! 0.8QA Rsense 1k 1k V i 1 .2 m Zi ! ! ! 1 .5 k ; Ii 0 .8Q

91

Output Impedance, Zo (few ohms

2M;)

The output impedance of an amplifier is determined at the output terminals looking back into the system with the applied signal set to zero.
Rsourc + Vs V Two- ort s st Vo Rs Io Zo
s

V
-

V  Vo Io ! R sense

Deter i i

Zo

Vo Zo ! Io
Zo u RL Zo become open cct
92

lifie r

IL IR o Z o= R o RL

For Ro u RL IL u IRo

Voltage Gain, AV DC biasing operate the transistor as an amplifier. Amplifier is a system that having the gain behavior. The amplifier can amplify current, voltage and power. Its the ratio of circuits output to circuits input. The small-signal AC voltage gain can be determined by:

Vo Av ! Vi

93

By referring the network below the analysis are:

no load
Rsource + Zi + Vi AvNL + Vo -

A vNL

VS
-

Vo ! Vi

RL !g

(open cct)

with source resistance :

Determining the no load voltage gain

A vs

Vo Zi ! ! A vNL Vs Zi  R s

94

Current Gain, Ai This characteristic can be determined by:

Ii + Vi Zi BJT amplifier Io + RL Vo -

Vo Io !  RL

Determining the loaded current gain

Io Ai ! Ii

Vo / RL VoZi ! ! Vi / Zi ViRL

Zi Ai ! Av RL
95

re TRANSISTOR MODEL employs a diode and controlled current source to duplicate the behavior of a transistor. BJT amplifiers are referred to as current-controlled devices. Common-Base Configuration Common-base BJT transistor re model re equivalent cct.

96

Ic

Ie

26mV re ! IE is the DC level of IE(dc) emitter current

C o m m o n - b a s e B J T tr a n s is to r - p n p

Ie

Ic c Ic !

Therefore, the input impedance, Zi = re that less than 50 .

Ie b

r e m o d e l fo r th e p n p c o m m o n -b a s e c o n fig u ra tio n

For the output impedance, it will be as follows;

Ie=0A e Vs=0V re
Ic ! 0A

Ic c

Ie

Ic c Ic ! Ie

re b

isolation part, b Zi=re

Determining Zo for common-base

common-base r e equivalent cct

Zo $ g;

97

The common-base characteristics

98

Ie + Vi Zi b e re

BJT common-base transistor amplifier

Ic !

Ie

Io RL + Vo -

Zo ! g ;

efining A v V o/V i for the common-base configuration

V o !  IoR L !   Ic R L ! E IeR L V i ! IeZi ! Iere

Vo E IeR L Av ! ! Vi Iere
Voltage gain,

ERL RL Av ! $ re re
99

Ic ! Ie
Zo ! g;

Io  Ic E Ie Ai ! ! ! Ii Ie Ie Current gain, Ai ! E $ 1
100

Example 6.6: For a common-base configuration in figure below with IE=4mA, E=0.98 and AC signal of 2mV is applied between the base and emitter terminal: a) Determine the Zi b) Calculate Av if RL=0.56k; c) Find Zo and Ai
e Ie Ic c re b com m on-base r e equivalent cct Ic ! Ie b

101

Solution:
26m 26 m ! ! 6 .5 ; a) Z i ! re ! IE 4m E R L 0 .98 ( 0 .56 k ) b) A v ! ! ! 84 .43 re 6 .5 c) Z o $ g Io Ai ! !  E !  0 .98 Ii

102

I i ! Ie e
re b

Ic c
Ic ! Ie

b c o m m o n - b a s e r e e q u iv a le n t c c t
103

Example 6.7: For a common-base configuration in previous example with Ie=0.5mA, E=0.98 and AC signal of 10mV is applied, determine: a) Zi b) Vo if RL=1.2k; c) Av d)Ai e) Ib
Solution : Vi 10 m a) Z i ! ! ! 20 ; Ie 0 .5 m b) Vo ! IcRL ! EIeRL ! 0.98(0.5m)(1.2k) ! 588mV
c) A v ! V o 588 m ! ! 58 . 8 Vi 10 m d) A i !  E !  0 . 98 e) I b ! I e - I c
! Ie - E Ie ! 0 . 5 m (1  E ) ! 0 . 5 m (1  0 . 98 ) ! 10 Q A

104

Common-Emitter Configuration Common-emitter BJT transistor re model re equivalent cct. Still remain controlled-current source (conducted between collector and base terminal) Diode conducted between base and emitter terminal
Input Base & Emitter terminal Output Collector & Emitter terminal

105

c
C Ic Ib

Ic b Ib
Ic ! F Ib

E common-emitter BJT transistor

Vi Zi ! Ii
Vi ! Vbe ! Iere $ F Ibre a s btit t i t (1) giv s

re model npn common-emitter configuration

(1)
c Ic b + Vi e
r t 6 ~ 7k;

Ii I b + V be -

Ic ! F Ib

V be F Ib re Zi ! $ Ib Ib

Ie re e

Zi ! F r e
Z i ra ges b tw

etermining Z i using r e equivalent model

106

The output graph

107

Output impedance Zo
b I i= I b c F Ib

re e

ro e

r e m o d e l fo r th e C -E tra n s isto r c o n fig u ra tio n

Ii=Ib = 0A c
Ib ! 0A

Vs=0V e

re

ro e

Zo

Z o ! ro if ro is ignored thus the Zo ! g (open cct, high impedance)

108

Io ! Ic ! F Ib

Zo ! g; Zi ! F re

V o !  IoR L !  Ic R L ! F Ib R L V i ! Ii Z i ! Ib F r e
Voltage gain, Vo F Ib R L Av ! !  Vi Ib F re

Current gain, Io Ic F Ib Ai ! ! ! Ii Ib Ib Ai ! F

RL Av !  re

109

Hybrid Equivalent Model

re model is sensitive to the dc level of operation that result input resistance vary with the dc operating point Hybrid model parameter are defined at an operating point that may or may not reflect the actual operating point of the amplifier

110

Hybrid Equivalent Model

The hybrid parameters: hie, hre, hfe, hoe are developed and used to model the transistor. These parameters can be found in a specification sheet for a transistor.

111

Determination of parameter
Vi ! h11Ii  h12 Vo h11 ! h12 ! Vi Ii Vi Vo

Vo ! 0V

Vo ! 0V

IO ! h21Ii  h22 Vo Solving Vo ! 0V , h21 ! h22 ! Ii Io

Vo ! 0V

Io Vo

Io ! 0A

H22 is a conductance!

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General h-Parameters for any Transistor Configuration

hi = input resistance hr = reverse transfer voltage ratio (Vi/Vo) hf = forward transfer current ratio (Io/Ii) ho = output conductance

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Common emitter hybrid equivalent circuit

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Common base hybrid equivalent circuit

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Simplified General h-Parameter Model The model can be simplified based on these approximations: hr $ 0 therefore hrVo = 0 and ho $ g (high resistance on the output)

Simplified

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Common-Emitter re vs. h-Parameter Model

hie = Fre hfe = F hoe = 1/ro

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Common-Emitter h-Parameters

hie ! &re h fe ! & ac

[Formula 7.28]

[Formula 7.29]

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Common-Base re vs. h-Parameter Model

hib = re hfb = -E

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Common-Base h-Parameters

hib ! re h fb ! E $ 1

120