DECF INSTRUCTION

;program -1 ;Program -2

MOVLW 8H MOVLW 8H
MOVWF 50H MOVWF 50H
DECF 50H, F DECF 50H, W
DECF 50H, F DECF 50H, W
DECF 50H, F DECF 50H, W
 MOVF INSTRUCTION
MOVF FILEREG, D
If D = 0, content of file register will be moved to WREG.
If D = 1, content of the file register will be moved to itself.
(Affects the flag register, to check file reg. content)

LA1 MOVF PORTB, W ;Copy content of the port B to WREG

MOVWF PORTC
GOTO LA1
 MOVFF INSTRUCTION
MOVFF FILEREG_S, FILEREG_D
Copy data from FILEREG_S to FILEREG_D

REPT MOVFF PORTB, PORTC ;Copy content of the port B to

port A
GOTO REPT

MOVFF 35H, 59H

MOVFF INSTRUCTION
Bits of Status Register
 Status Register……..
- Conditional FLAGS..

C – Carry flag : Set when there is a carry from D7 bit

(Usually with unsigned number operations.)

DC - Digital Carry: Set, If there is a carry from D3 to D4

OV - Overflow : Set whenever the result of a signed number

operation is too large, causing the high order bit to overflow
to the sign bit.

N - Negative : Set when the result is negative.

Status Register……..
MOVLW 38H ;0011 1000
ADDLW 2FH ;0010 1111
0110 0111
C = 0; No carry from D7
DC = 1 ; carry from D3 to D4
Z = 0 ; Result is not zero

MOVLW 9CH ;1001 1100

ADDLW 64H ;0110 0100
0000 0000
C = 1; A carry beyond D7 bit.
DC = 1 ; carry from D3 to D4
Z = 1 ; Result is zero
Status Register……..
See the table in Mazidi…..

Arithmetic operations : affects all flags.

(ADD…, SUB…., INCF, DECF etc..)

Logical operations : Z and N flags

(ANDLW, ANDWF, IOR …, XOR….)

MOVF : Only zero flag.

Flags and decision making
- Conditional jump (branch)

BC ;Branch if C = 1
BNC ;Branch if C = 0
BZ
BNZ
BN
BNN
BOV
BNOV.
 Branching on Flag’s status…..
; TO DEMONSTRATE THE CONDITIONAL BRANCHING
;COUNTER IMPLEMENTATION.
;Multiply: 10*5 and store the result in address 20H.

#include<P18F452.INC>
ORG 0
MOVLW 5H
MOVWF 50H
CLRF WREG ; to clear w
ABOVE ADDLW 10H
DECF 50H, F
BNZ ABOVE ;Address to where it has to jump
MOVWF 20H
END
Branching on Flag’s status…..

The result is 50H

 Data types……
- Four ways of representing a byte
HEXADECIMAL : MOVLW 34H ;Can be 34h also
MOVLW 0X34 ; 0x34 Also.
MOVLW 34
MOVLW h’34’
Binary :
MOVLW B’10110010’
Decimal :
MOVLW D’137’
MOVLW .45
ASCII :
MOVLW A ’8’ ;WREG = 38H
MOVLW ’2’ ;WREG = 32H
What we need for using a PIC

Assembler, Interpreter or Compiler

Programming Hardware
Programming Software

Jagadanand NITC
Assembling and linking a program:
Embedded C ASM file

Compiler Assembler

OBJ OBJ

LINKER/ LOCATER

Executable file

Target system
Assembling and linking a program:
 Choices include
MPLAB, a free IDE from Microchip

MPASM a free assembler included with MPLAB

MPSIM a free simulator included with MPLAB

Hi-Tech PICCLite, a free professional grade ANSI C

compiler for 16F84A and a few other PIC’s. The standard
package has support for all PIC chips, but retails for
about US$900. A demo version is available which works
for a few weeks.
and ...
IcProg, a free programming software which
works with a large variety of chips and
programming hardware.

JDM programmer, an extremely simple and a

very popular hardware circuit for
programming PICs. This can be connected to
a PC through the serial port and doesn’t even
need a power supply. The circuit can be
assembled for less than Rs.100/-
 and ...
We are using a Universal Programmer,
which can program a variety of Ics,
including PIC, EPROM, ATMEL, FPGA etc..
 Structure of Assembly
language programming:

[Label] mnemonic [operands] [;comment]

ABOVE ADDLW 10H ; Add 10 to WREG.

Rules in the labels in Assembly:
• Must be unique.

• Consist of Alphanumeric and special

characters.

• First character must be a alphabet.

• No reserved words must be used.

ASSEMBLER DIRECTIVES
EQU

NUMB EQU 0x34

REG1 EQU 0X52
MOVLW NUMB
ADDWF REG1

SET
Similar to EQU, value assigned by SET can be reassigned
later.
 ASSEMBLER DIRECTIVES
ORG address ;(in HEX)
Represent the beginning address. (For code and data)

END
Last line of the assembly program. Anything after this
will be ignored by the compiler.

LIST
LIST P = 18F452 ;Tell the compiler the specific chip
to which the program is to be assembled.
ASSEMBLER DIRECTIVES
#include <..>: library associated with the
specific PIC.
#include<P18F452.INC>

_config : Configuration bits.

CONFIG WDT = OFF, PWRT = ON

radix : Number system is decimal / hex. (By

default, it is hex)
RADIX DEC
 ASSEMBLER DIRECTIVES
;Multiply: 10*5 (decimal) and store the result in address 20H.
#include<P18F452.INC>
RADIX DEC ;Decimal number system is selected.
ORG 0
MOVLW 5
MOVWF 50H
CLRF WREG ; to clear w
ABOVE ADDLW 10
DECF 50H, F
BNZ ABOVE
MOVWF 20H
END
 ASSEMBLER DIRECTIVES

Observe the difference in the result, due to radix

change.
32H = 50 Decimal.
 Program Counter (PC)
Register containing the Address of the next
instruction to be executed.

HW : Determine the address range in PIC18F2220,

PIC18F2410, And PIC18F458.
 Where PIC will wake up on power-ON?.....
• PC Contains 00000H.

• Hence, write the first instruction to be

executed on power ON in this address :
00000H

• User .ORG directive to do this.

• Can Verify this in List (*.lst) file.

 Example list file
LOC OBJECT CODE LINE SOURCE TEXT Value

00001
00002 ;PIC Asm Language Program To Add Some Data
00003 ;store SUM in fileReg location 10H
00004 SUM EQU 10H ; RAM loc 10H for Sum
00005
00006 ORG 0H ;start at address 0
000000 0E25 00007 MOVLW 25H ;WREG = 25
000002 0F34 00008 ADDLW 0x34 ;add 34H to WREG
000004 0F11 00009 ADDLW 11H ;add 11H to WREG
000006 0Fl2 00010 ADDLW D'18' ;W = W +12H = 7CH
000008 0FlC 00011 ADDLW 1CH ;W = W +1CH = 98H
00000A 0F06 00012 ADDLW B'00000110' ;W = W+ 6 = 9EH
00000C 6E10 00013 MOVWF SUM ;save the sum in loc 10H
00000E EF07 F000 00014 HERE GOTO HERE ;stay her for ever
00015 END ;end of .asm source file
PROGRAM MEMORY MAP AND STACK FOR
PIC18F452/252
 The 21-bit program counter is
capable of addressing the
2-Mega byte (221) program
memory space.

 Accessing a location
between the physically
implemented memory and the 2-
Mbyte address will cause a read
of all ’0’s (a NOP instruction).

 PIC18FX52 devices can store up

to 16k of single word
instructions
Jagadanand NITC
Program ROM Width for the PIC18

Jagadanand NITC
PIC18 Program ROM Contents for
Program
MNEMONICS OP ADDRESS
CODE
MOVLW 25H 0E25 000000
ADDLW 34H 0F34 000002
ADDLW 11H 0F11 000004
ADDLW 12H 0F12 000006
ADDLW 06H 0F06 000008

Jagadanand NITC
Little Endian Vs. Big Endian

PIC, Intel processors are Little endian.

Motorola is Big Endian, ARM –Select it
using a bit.

Lower byte in lower address and higher

byte in higher address.
 Memory Organisation…..
In the traditional Von-Neumann architecture there is
only a single memory and a single bus for transferring
data into and out of CPU.
 Memory Organisation Cont..
In Harvard Architecture, there are memories for data and
program with separate buses for each.
Since the buses operate independently, program
instructions and data can be fetched at the same time,
improving the speed.
Memory Organisation Cont..
 RISC architecture :
• Same size for instructions (Bricks of same size)

• Large number of registers – No much Stack required.

• Less no. of instructions (Only 35 for 16F, 75 for 18F).

• Single cycle execution.

• Harward architecture.

• Micro instructions are hard wired (instead of microcodes).

• Load / Store architecture – Reduced pipeline stall.