MICROPROCESSOR SYSTEMS AND

INTERFACING (EEE342)
Dr. Omer Chughtai

Assistant Professor, CUI, Wah Campus

Email: omer.chughtai@outlook.com
MICROARCHITECTURE OF 8086/8088 MICROPROCESSOR

 The microarchitecture of a processor is its internal architecture

 The circuit building blocks that implement the S/W and H/W architectures of MP
 The microarchitecture of 8088 and 8086 are similar because they both
employ parallel processing
 Bus Interface Unit (BIU)
 The interface by which MP connects to the external devices

 8-bit data bus – 8088

 16-bit data bus – 8086

BUS
EXECUTION
INSTRUCTION INTERFACE
UNIT
 20-bit address bus – 8088/8086 (EU) PIPELINE UNIT
(BIU)

 Execution Unit (EU)

SYSTEM BUS

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 EXECUTION UNIT BUS INTERFACE UNIT
(EU) (BIU)
ARCHITECTURE OF ---16--- ---16---

8088/8086 AH AL AX
BX
CS
DS
CX
DX ES
SI SS
DI
SP IP
BP

ADDRESS
MULTIPLEXED
GENERATION AND
BUS CONTROL BUS

Segment Registers
 Arithmetic logic unit (ALU) OPERANDS

INSTRUCTION
Instruction
 Status Pointersflags
and Control

QUEUE
Address generation
 General-purpose adder
registers
Bus control logic
 Temporary-operand registers ALU 6 Bytes (8086)
4 Bytes (8088)
 Instruction queue
 Permits the 8088 to
---8---
prefetch up to 4 bytes
and 6 bytes (for 8086) FLAGS
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 8088/8086 Memory Space
SOFTWARE MODEL OF MPU
External Memory
00000 16

8088/8086 IP address Space

CS
 As a programmer it is Code Segment
DS
important (64Kbytes)
SS
 To know various registers
ES
within the device
 To know the purpose, AX Data Segment
(64Kbytes)
functions, operating BX
capabilities, and limitations
CX
of the registers
DX Stack Segment
(64Kbytes)
SP
BP
SI
Extra Segment
DI (64Kbytes)

SR
4 16
FFFFF
8086/8088 MICROPROCESSOR

 Processor is defined in terms of bits

 How many bits does the register of a processor have?
 How many bits does it exposed to the outside world in terms of the data bus?

16-bit Processor (8086)

The 8086 has a 16-bit Data
 Has 16 Data lines Bus and a 20-bit Address Bus
that can address 220, that is 1
 All Internal Registers MB of memory.
are 16-bit long

32-bit Processor

 Has 32-bit Data bus

 All Internal Registers

are 32-bit long
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 8088/8086 REGISTERS
• AX – Accumulator – All arithmetic and logical computations AH AL
General • BX – Base – Memory pointer in DS and other addressing modes BH BL
Purpose
Registers • CX – Count – Counter Register used in loop instructions CH CL
• DX – Data – Used in divide and multiplication operations DH DL

• SI – Used primarily in String Operations SI

Index
Registers
• DI – Used primarily in String Operations DI

• BP – Points to data within the SS BP

Pointer
Registers SP
• SP – Points to a specific memory location within the SS

Flag
• Used to interpret status of Assembly Language Instructions
Registers

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PROGRAM SEGMENTS

CS 0F8Ah 0F8A:0000 Code Segment Begins

Data Segment Begins

DS 0F89h 0F89:0000

Stack Segment Begins

SS 0F69h 0F69:0000

ES

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STATUS REGISTER – FLAGS REGISTER

 Status
 Reflects the results of an instruction executed by the processor
 Control
 Enable or disable certain operations of the processor
 For example: if the IF (interrupt flag) is cleared (set to 0), inputs from the keyboard
are ignored by the processor
Control Flags Status Flags

TF DF IF OF SF ZF AF PF CF
Carry Flag

Trap Flag Interrupt- Parity Flag

Enable Flag Auxiliary Flag

Direction Flag Zero Flag

Sign Flag
Overflow Flag 8
GENERATING PHYSICAL MEMORY ADDRESS

15 0
OFFSET VALUE

Logical Address
15 15 0 0
SEGMENTSEGMENT
REGISTERREGISTER
0000

Adder

19 0
20-bit Physical Memory Address Physical Address
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GENERATING PHYSICAL MEMORY ADDRESS

10
GENERATING PHYSICAL MEMORY ADDRESS
 Segment base value = 123416
 Offset value = 002216
What would be the offset required to map to
physical address location 002C316 if the contents of
the corresponding segment register are 002A16

 123416 = 00010010001101002

 00010010001101002 Shift left 4 bits Segment

1234
Base
Logical
15 0
1 2 3 4 0 Address
19 0 0022 Offset
+ 15 0

0 0 2 2
15 0

1 2 3 6 2 Physical address
19 0

To memory
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 When a call instruction is executed, the
8088 automatically pushes the current
STACK values in CS and IP onto the stack.

 What is a stack, and why is it :

needed? PHYSICAL
:
2C4H
 The stack is a section of ADDRESS 2C3H
read/write memory (RAM) OFFSET 2C2H
• PUSH decrements the SP
(3H)
2C1H
Push
SEGMENT
used by CPU to store BASE register and copies a value 2C0H
information temporality. onto the top of stack. 2BFH
2BEH
 Stack is implemented in the 2BDH
memory of the 8088 2BCH
LOGICAL 2BBH
microprocessor. ADDRESS
OFFSET
(13H)
2BAH
• POP retrieves the value from 2B9H
 CPU needs this storage area
since there are only limited Pop the top of the stack and stores
it into destination, then
2B8H
2B7H
number of registers increments the SP register. 2B6H
2B5H
 The stack is a simple data 2B4H
2B3H
structure with a LIFO (last-in 2B2H
SEGMENT
first-out) access policy. BASE
2B1H
2B0H
:
:
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STACK SEGMENT MEMORY
 The stack is 64Kbytes long and is
Memory
organized from a software point of (word-wide)
view as 32K words. SS:FFFEH Bottom of Stack
 The segment base value in the SS :
8088/8086
register points to the lowest address :
word in the current stack. SP SS:SP Top of Stack

 The address obtained from the :

contents of SS and SP (SS:SP) is the :
Stack
physical address of the last storage SS Segment
location in the stack to which data :
were pushed :
SS:0000H End of Stack
 Data transferred to and from the
stack are word-wide, not byte-wide.
 There are no instructions such as
"PUSH AL" or "PUSH AH" 13
14
STACK-PUSHING

 Pushing and Popping Operations

 Pushing onto the stack storing the CPU register in the stack is called push.
 Example: SP = 1236, AX = 24B6, DI = 85C2, DX = 5F93.
 Instruction is executed

 PUSH AX
 PUSH DI
 PUSH DX

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STACK-POPPING

 Pushing and Popping Operations

 Popping the stack loading the contents of the stack into the CPU register is called
a pop.
 Example: assume that the stack is shown below, and SP = 18FA, show the contents
of the stack and register as each of the following instruction executes

 Pop CX
 Pop DX
 Pop BX

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STACK: PUSH, POP

17
EXAMPLE

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 POP AX
AX
POP BX 12 34

STACK SEGMENT MEMORY PUSH AX AX

AX 12 34 BX BB AA
BX
Existing stack

1062 00 11 1062 00 11 1062 00 11

Bottom of Stack
1060 22 33 1060 22 33 1060 22 33
105E 44 55 105E 44 55 105E 44 55
105C 66 77 66 77
105C 66 77 105C
TOS
105A 88 99 88 99
105A 88 99 105A
1058 AA BB AA BB
TOS
1058 AA BB 1058
1056 01 23 1056 34 12
1056 01
34 23
12
Not presently
on the stack

1054 45 67 1054 45 67
1054 45 67
1052 89 AB 1052 89 AB
1052 89 AB
1050 CD EF 1050 CD EF
1050 CD EF
01 05 SS 01 05 SS 01 05 SS
00 08 SP 00 06 SP 00 06 SP
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GENERATING PHYSICAL MEMORY ADDRESS
 For Instruction acquisition
 Source of segment base value is always the code segment (CS) register
 Source of offset value is always the instruction pointer (IP)
 The physical address  CS:IP
 For writing data in to memory during execution phase
 Segment base value is specified by the Data Segment (DS) register
 The offset value by the destination index (DI)
 The physical address  DS:DI
 To push the parameters on the stack
 SS:SP

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 PHYSICAL ADDRESS
8088/8086 Address Memory Instruction
MPU content

01000 B0 MOV AL, 15 H

01001 15
01002 XX Next instruction
IP 01003 XX
0002
0000

CS
0100
DS
SS
Before Fetch After Fetch
ES

15
XX AX
BX
Physical Address (PA) = SBA : EA
CX = Segment Base : Base + Index + Displacement
DX

SP CS
PA = SS : BX + SI + 8-bit displacement
BP
DS BP DI 16-bit displacement
SI ES
DI
EA = Base + index + Displacement
EA can be specified in the instruction

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 MOV CX, [1234h]
PHYSICAL ADDRESS
Move the contents of memory location with
8088/8086 Address Memory Instruction offset 1234h in CX
MPU content

01000 8B MOV CX, [1234H]

01001 0E
01002 34
IP 01003 12
0004
0000
01004 XX Next instruction
CS
0100
0200 DS
SS Physical Address (PA) = Segment Base : Direct address
ES
CS
02000 XX SS
AX PA = : Direct address
02001 XX DS
BX : ES
BEED
XXXX CX :
DX :
03234 ED Source operand PA = 0200016 + 123416
SP 03235 BE = 0323416
BP 03236

SI
DI

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PHYSICAL ADDRESS CS
SS
BX
BP
PA = :
DS SI
ES DI
MOV AX, [SI]
PA = 0200016 + 123416
= 0323416
PHYSICAL ADDRESS

MOV [BX] + 1234H, AL

CS
PA = SS : BX + 8-bit displacement
DS BP 16-bit displacement
ES

MOV AL, [SI] + 2000H

CS
PA = SS : SI + 8-bit displacement
DS DI 16-bit displacement
ES

MOV AH, [BX][SI] + 2000H

CS
PA = SS : BX + SI + 8-bit displacement
DS BP DI 16-bit displacement
ES