Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Presentation by:
Dr. W Jino Hans
Associate Professor/ECE
SSN College of Engineering
Session Objectives
2 v 1.1
Session Outcomes
3 v 1.1
Outline
• Introduction
• Need For Biasing
• Stability and stability Factor
4 v 1.1
Biasing for BJT
• Introduction
• DC load line and AC load line
• Thermal Run-away problem
• Need for Biasing
• Types of Biasing
5 v 1.1
Introduction
• In order to operate the transistor in active region, we
supply voltage and resistance must be properly chosen.
• The value of voltage and resistance establish set of DC
voltage VCEQ and current I CQto operate the transistor in
active region. These voltage and current are called Q-
point for transistor
• The process of giving proper supply voltage and
resistance for obtaining Q-point is called Biasing
6 v 1.1
Biasing
7 v 1.1
Q-Point:
• To produce distortion free output, supply voltage and
resistance must be suitably selected.
• The value of voltage & resistance establish set of DC
voltage and to operate the transistor in active region.
• These voltage and current are called ‘Q-Point’ of a
transistor.
Biasing:
• The process of giving proper supply voltage & resistance
for obtaining desired Q-Point is called biasing.
8 v 1.1
DC load line and AC load line
• A line drawn on the output characteristic of transistor
1
with slope of R is called DC load line
c
9 v 1.1
DC Load line
10 v 1.1
DC Load Line:
VCC I C RC VCE
VCC
• When VCE 0 ; IC
RC
• When IC 0
VCE VCC
• A line is drawn in the characteristic with slope 1
RC
AC Load Line:
• After drawing the DC load line, Q-point is located properly
so that the O/P will be amplified from the I/P signal
without any distortion.
• If Q-point is very close :
• To cut-off region-collector current is clipped at (-ve) half
cycle.
• To saturation region, is clipped at the portion of I/P signal.
11 v 1.1
Continued.
• So, Q-point is chosen at the middle of load line.
R AC RC || R L
• Slope,
1
CQD
R AC
VCEQ
I C I CQ
R AC
12 v 1.1
Requirements of Biasing:
• Q-point should be selected at middle of the load line so that
transistor neither goes to SAT nor CUT-OFF region.
• The flow of current increases heat at junction. Minority charge
carriers are ‘Temp. dependant’ and hence increases leakage
current.
I CEO 1 I CO
• doubles for every 100C and
I CEO
• increases.
2
I C I CEO
• Increase in shifts Q-point into Sat. region, thus changing
operation condition set by biasing circuit.
IC
• Hence thermal runaway problem should be eliminated.
• The performance of circuits should not be affected by changing
the transistor.ie, o/p current should be independent of
13 v 1.1
Thermal runaway problem
I CEO 1 I CBO
• As temperature increases , I CEO increases as and
hence collector current increases. This in turn increases
temperature and power dissipation at junction. The
action is cumulative.
• Finally transistor gets damaged. This is called thermal
run away problem.
14 v 1.1
Thermal runaway problem
I CEO 1 I CO
I C 2 I CEO
15 v 1.1
Stability Factor
16
17
Need for Biasing
• Q-point should be selected at middle of load line
• Thermal run away problems should be eliminated
• The performance of circuit should not be altered by
changing transistor.
18 v 1.1
Types of Biasing
• Fixed Bias
• Collector-to-base bias
• Emitter-feedback bias
• Voltage divider bias
19 v 1.1