Devices, Circuits, and Applications: Power Transistors

POWER ELECTRONICS
Devices, Circuits, and Applications

FOURTH EDITION
CHAPTER
CHAPTER 4
Power Transistors
Power Electronics: Devices, Circuits, and Applications, 4e Copyright ©2014 by Pearson Education, Inc.
Muhammad H. Rashid All rights reserved.
Learning Outcomes After completing this chapter, students should be able to do the
following:
List the characteristics of an ideal transistor switch.
Describe the switching characteristics of different power transistors such as MOSFETs,
COOLMOS, BJTs, IGBTs, and SITs.
Describe the limitations of transistors as switches.
Describe the gate control requirements and models of power transistors.
Design di/dt and dv/dt protection circuits for transistors.
Determine arrangements for operating transistors in series and parallel.
Describe the SPICE models of MOSFETs, BJTs, and IGBTs.
Determine the gate-drive characteristics and requirements of BJTs, MOSFETs, JFETs,
and IGBTs.
Describe the isolation techniques between the high-level power circuit and the low-level
gate-drive circuit.
Symbols and Their Meanings
Table 4.1 Material Properties of Silicon and WBG Semiconductor
Materials
Figure 4.1 Depletion-type MOSFETs.
Figure 4.2 Enhancement-type MOSFETs.
Figure 4.3 Power MOSFETs. (Reproduced with permission from International Rectifier.)
Figure 4.4 Cross sections of MOSFETs. [Ref. 10, G. Deboy]
Figure 4.5 Transfer characteristics of MOSFETs.
Equation 4.1 Steady-State Characteristics
• The transfer characteristics in Figure 4.5b

for n-channel enhancement MOSFETs can
be used to determine the on-state drain
current iD from [29]
Figure 4.6 Output characteristics of enhancement-type MOSFET.
Equations 4.2 and 4.3 Output Characteristics
• In the linear or ohmic region, the drain–

source νDS is low and the iD–νDS
characteristic in Figure 4.6 can be
described by the following relationship:
• which, for a small value of νDS ( VT), can

be approximated to
Equation 4.4 Output Characteristics
• The load line of a MOSFET with a load

resistance RD as shown in Figure 4.7a can
be described by
Figure 4.7 Steady-state switching model of MOSFETs.
Equation 4.6 Steady-state Switching Model
• The transconductance gain gm can be

determined from Eqs. (4.1) and (4.2) at
the operating point at νGS = VGS and iD =
ID as
Equation 4.8 Steady-state Switching Model
• For a small value of vDS( VT) in the linear

or ohmic region, Eq. (4.3) gives the drain–
source resistance RDS as
Figure 4.8a–b Parasitic model of enhancement of MOSFETs.
Figure 4.8c Parasitic model of enhancement of MOSFETs.
Figure 4.9 Switching model of MOSFETs.
Figure 4.10 Switching waveforms and times.
Figure 4.11 Cross section of a single cell of a 10 A, 10-kV 4H-SiCD MOSFET.
Figure 4.12 Parasitic devices of n-channel MOSFET [42].
Figure 4.13 Cross section of an SiC power 6H-MOSFET [39].
Figure 4.14 Cross section of COOLMOS.
Figure 4.15 The linear relationship between blocking voltage and on-resistance. [Ref. 10, G. Deboy]
Figure 4.16 Schematic and symbol of an n-channel JFET.
Figure 4.17 Schematic and symbol of a p-channel JFET.
Figure 4.18 Biasing of JFETs.
Figure 4.19 Simplified n-channel JFET structure.
Figure 4.20 Characteristics of an n-channel JFET.
Equations 4.10 and 4.11 Characteristics of an n-channel JFET.
• The drain current iD can be expressed as
• which, for a small value of VDS ( |Vp|),

can be reduced to
Equations 4.12 and 4.13 Characteristics of an n-channel JFET.
• Substituting the limiting condition νDS =

νGS − Vp into Eq. (4.10) gives the drain
current as
• The pinch-down locus can be obtained by

substituting νGS = VDS + Vp into Eq.
(4.12):
Figure 4.21 Cross section of the normally-on SiC LCJFET.
Figure 4.22 A typical structure of a SiC vertical JFET.
Figure 4.23 Cross section of the SiC VTJFET.
Figure 4.24 Cross sections of SiC BGJFET and SiC DGTJFET.
Figure 4.25 Bipolar transistors.
Figure 4.26 NPN-transistors. (Courtesy of Powerex, Inc.)
Figure 4.27 Cross sections of BJTs.
Figure 4.28 Characteristics of NPN-transistors.
Figure 4.29 Transfer characteristics.
Figure 4.30 Model of NPN-transistors.
Equations 4.14 and 4.15 Model of NPN-transistors
• The equation relating the currents is
• The ratio of the collector current IC to base

current IB is known as the forward current
gain, βF :
Equations 4.19 and 4.20 Model of NPN-transistors
• From Eqs. (4.14) and (4.16)
• Because βF 1, the collector current can

be expressed as
Equation 4.21 Model of NPN-transistors
• The constant αF is related to βF by
Figure 4.31 Transistor switch.
Equations 4.23 and 4.26 Transistor Switch
• Let us consider the circuit of Figure 4.31,

where the transistor is operated as a
switch.
• The maximum collector current in the

active region, which can be obtained by
setting VCB = 0 and VBE = VCE, is
• If the collector–emitter saturation voltage

is VCE(sat), the collector current is
• and the corresponding value of base

current is
• The ratio of IB to IBS is called the overdrive

factor (ODF):
• and the ratio of ICS to IB is called as forced

β, βforced where
Figure 4.32 Transient model of BJT.
Figure 4.33 Switching times of bipolar transistors.
Figure 4.34 Charge storage in saturated bipolar transistors.
Equations 4.33 and 4.34 Charge Storage
• The saturating charge, is proportional to

the excess base drive and the
corresponding current Ie:
• and the saturating charge is given by
Figure 4.35 Waveforms of transistor switch.
• The average power loss during the delay

time is
• During rise time, 0 ≤ t ≤ tr:
• The power Pc(t) is maximum when t = tm,

where
• and Eq. (4.36) yields the peak power
Equation 4.44 Charge Storage
• This power loss during fall time is

maximum when t = tf /2 = 1.5 μs and Eq.
(4.43) gives the peak power,
Figure 4.36 Plot of instantaneous power for Example 4.2.
Figure 4.37 Turn-on and turn-off load lines.
Figure 4.38 Cross-sectional view of the 4H-SiC BJT device.
Figure 4.39 Cross section and equivalent circuit for IGBTs.
Figure 4.40 Symbol and circuit for an IGBT.
Figure 4.41 Typical output and transfer characteristics of IGBTs.
Figure 4.42 Simplified structure of a 4H-SiC p-channel IGBT.
Figure 4.43 Cross section and symbol for SITs.
Figure 4.44 Typical characteristics of SITs. [Ref. 18, 19]
Table 4.2 Comparisons of Power Transistors
Table 4.3 Operating Quadrants of Transistors with Diodes
Table 4.3 (continued) Operating Quadrants of Transistors with
Diodes
Table 4.3 (continued) Operating Quadrants of Transistors with
Diodes
Figure 4.45 Thermal equivalent circuit of a transistor.
Equation 4.50 Thermal equivalent circuit
• The ambient temperature is
and
Figure 4.46 Voltage and current waveforms.
Equations 4.51 and 4.52 Voltage and Current Waveforms
• During turn-on, the collector current rises

and the di/dt is
• During turn-off, the collector–emitter

voltage must rise in relation to the fall of
the collector current, and dv/dt is
Figure 4.47 Transistor switch with di/dt and dv/dt protection.
Equations 4.53 and 4.54 di/dt and dv/dt Protection
• The equivalent circuit during turn-on is

shown in Figure 4.48a and turn-on di/dt is
• Equating Eq. (4.51) to Eq. (4.53) gives

the value of Ls,
Equation 4.55 di/dt and dv/dt Protection
• The capacitor voltage appears across the

transistor and the dv/dt is
Figure 4.48 Equivalent circuits.
Equations 4.56 and 4.57 Equivalent Circuits
• Equating Eq. (4.52) to Eq. (4.55) gives

the required value of capacitance,
• For unity critical damping, δ = 1, and Eq.

(18.15) yields
Figure 4.49 Discharge current of snubber capacitor.
Equation 4.58 Discharge Current
• A discharge time of one-third the

switching period Ts is usually adequate.
or
Figure 4.50 Parallel connection of transistors.
Figure 4.51 Dynamic current sharing.
Figure 4.52 PSpice BJT model.
PSpice BJT Model
• The model statement for NPN-transistors

has the general form
• and the general form for PNP-transistors is
PSpice BJT Model
• The symbol for a BJT is Q, and its name

must start with Q. The general form is
Figure 4.53 PSpice n-channel MOSFET model.
PSpice n-channel MOSFET Model
• The model statement of n-channel

MOSFETs has the general form
• and the statement for p-channel MOSFETs

has the form
Figure 4.54 IGBT model. [Ref. 16, K. Shenai]
Equation 4.61 IGBT model
• Cdg is expressed by
Figure 4.55 Equivalent circuits of IGBT SPICE models. [Ref. 21, K. Sheng]
Figure 4.56 Fast-turn-on gate circuit.
Equations 4.62 and 4.63 Fast-turn-on Gate Circuit
• When the gate voltage is turned on, the

initial charging current of the capacitance
is
• and the steady-state value of gate voltage

is
Figure 4.57 Totem pole arrangement gate drive with pulse-edge shaping.
Figure 4.58 Gate driver of the normally-on SiC JFET [43].
Figure 4.59 Two-stage gate-drive unit for normally-off SiC JFETs [43].
Figure 4.60 Two-stage gate drive for normally-off SiC JFETs [54].
Figure 4.61 Base driver current waveform.
Figure 4.62 Base current peaking during turn-on.
Equations 4.65 and 4.66 Turn-on Control
• The final value of the base current is
• The capacitor C1 charges up to a final

value of
Equation 4.67 Turn-on Control
• The charging time constant of the

capacitor is approximately
Figure 4.63 Base current peaking during turn-on and turn-off.
Figure 4.64 Proportional base drive circuit.
Figure 4.65 Collector clamping circuit.
Equations 4.69 and 4.72 Antisaturation Control
• The base current without clamping, which

is adequate to drive the transistor hard,
can be found from
• The load current is
Equation 4.74 Antisaturation Control
• From Eq. (4.72),
Figure 4.66 Base drive with speed-up capacitor for a SiC BJT [43].
Figure 4.67 Single-phase bridge inverter and gating signals.
Figure 4.68 Gate voltage between gate and ground.
Figure 4.69 Transformer-isolated gate drive.
Figure 4.70 Optocoupler gate isolation.
Figure 4.71 Power MOSFET connect to the high voltage rail side.

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POWER ELECTRONICS

Devices, Circuits, and Applications

• The transfer characteristics in Figure 4.5b

• In the linear or ohmic region, the drain–

• which, for a small value of νDS ( VT), can

• The load line of a MOSFET with a load

• The transconductance gain gm can be

• For a small value of vDS( VT) in the linear

• The drain current iD can be expressed as

• which, for a small value of VDS ( |Vp|),

• Substituting the limiting condition νDS =

• The pinch-down locus can be obtained by

• The equation relating the currents is

• The ratio of the collector current IC to base

• From Eqs. (4.14) and (4.16)

• Because βF 1, the collector current can

• The constant αF is related to βF by

• Let us consider the circuit of Figure 4.31,

• The maximum collector current in the

• If the collector–emitter saturation voltage

• and the corresponding value of base

• The ratio of IB to IBS is called the overdrive

• and the ratio of ICS to IB is called as forced

• The saturating charge, is proportional to

• and the saturating charge is given by

• The average power loss during the delay

• During rise time, 0 ≤ t ≤ tr:

• The power Pc(t) is maximum when t = tm,

• and Eq. (4.36) yields the peak power

• This power loss during fall time is

• The ambient temperature is

• During turn-on, the collector current rises

• During turn-off, the collector–emitter

• The equivalent circuit during turn-on is

• Equating Eq. (4.51) to Eq. (4.53) gives

• The capacitor voltage appears across the

• Equating Eq. (4.52) to Eq. (4.55) gives

• For unity critical damping, δ = 1, and Eq.

• A discharge time of one-third the

• The model statement for NPN-transistors

• and the general form for PNP-transistors is

• The symbol for a BJT is Q, and its name

• The model statement of n-channel

• and the statement for p-channel MOSFETs

• When the gate voltage is turned on, the

• and the steady-state value of gate voltage

• The final value of the base current is

• The capacitor C1 charges up to a final

• The charging time constant of the

• The base current without clamping, which

• The load current is

• From Eq. (4.72),

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