INTRODUCTION

 There is a saying in real estate; when land get expensive,

multi-storied buildings are the alternative solution. We
have a similar situation in the chip industry. For the past
thirty years, chip designers have considered whether
building integrated circuits multiple layers might create
cheaper, more powerful chips.

 In electronics, a three-dimensional integrated circuit (3D

IC,) is a chip in which two or more layers of active
electronic components are integrated both vertically and
horizontally into a single circuit. The semiconductor
industry is pursuing this promising technology in many
different forms,

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History
 In 2004, Intel presented a 3D version of the Pentium 4 CPU.
The chip was manufactured with two dies using face-to-face
stacking, which allowed a dense via structure. Backside TSVs
are used for IO and power supply. For the 3D floorplan,
designers manually arranged functional blocks in each die
aiming for power reduction and performance improvement.
Splitting large and high-power blocks and careful
rearrangement allowed to limit thermal hotspots. The 3D
design provides 15% performance improvement and 15%
power saving Compared to the 2D Pentium 4.
 One challenge in manufacturing of the three-dimensional chip
was to make all of the layers work in harmony without any
obstacles that would interfere with a piece of information
traveling from one layer to another

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 Motivation
 Interconnect structures increasingly consume more of the
power and delay budgets in modern design

 Plausible solution: increase the number of “nearest neighbors”

seen by each transistor by using 3D IC design

 Smaller wire cross-sections, smaller wire pitch and longer lines

to traverse larger chips increase RC delay.
RC delay is increasingly becoming the dominant factor
 At 250 nm Cu was introduced alleviate the adverse effect of
increasing interconnect delay.
 130 nm technology node, substantial interconnect delays will
result.
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Basic 3D IC’s

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Concerns in 3D circuit

Thermal Issues in 3D-circuits

Reliability Issues

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Thermal Issues in 3D Circuits

 Thermal Effects dramatically impact interconnect and device

reliability in 2D circuits
 Due to reduction in chip size of a 3D implementation, 3D circuits
exhibit a sharp increase in power density
 Analysis of Thermal problems in 3D is necessary to evaluate thermal
robustness of different 3D technology and design options.

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Heat Flow in 3D
With multi-layer circuits , the upper
layers will also generate a significant
fraction of the heat.
Heat increases linearly with level increase

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Reliability Issues?
 Electro thermal and Thermo-mechanical effects
between various active layers can influence electro-
migration and chip performance
 Die yield issues may arise due to mismatches
between die yields of different layers, which affect
net yield of 3D chips.

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Advantages
1) Disks are inexpensive, but they requires drives that are
expensive bulky ,fragile and consume a lot of battery
power ..

2) Flash and other non volatile memories are much more

rugged, battery efficient compact and require no bulky
drive technologies .

3) The ideal solution is a 3-D memory that leverages all

the benefits of non volatile media, costs as little as a
disk, and is as convenient as 35 mm film and audio
tape.

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 APPLICATIONS
1) Portable electronic digital cameras,

2) digital audio players, PDAs,

3) smart cellular phones, and handheld gaming devices

are among the fastest growing technology market for
both business and consumers.

4) one of the largest constraints to growth has been

affordable storage, creating the marketing
opportunity for ultra low cost internal and external
memory. 10
Conclusion

3D IC design is a relief to interconnect

driven IC design.
Still many manufacturing and
technological difficulties
Needs strong EDA applications for
automated design

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