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Lecture 26

DC – AC Converters
Inverters

30-03-2019
Series Inverter

April 11, 2019 NIT Calicut 2


Operation

T1 fired, resonant pulse of current


flows through the load. The
current falls to zero at t = t1m and T1
is “self – commutated”.
T2 fired, reverse resonant current
flows through the load and T2 is
also “self-commutated”.
The series resonant circuit must be
underdamped,
R2 < (4L/C)

April 11, 2019 NIT Calicut 3


Operation in Mode 1 – Fire T1

di1 1
L  Ri1   i1dt  vC (0)  VS
dt C
i1 (0)  0
vC (0)  VC
April 11, 2019 NIT Calicut 4
R
 t
i1 (t )  A1e 2L
sin r t
1
 1 R2  2
r    2
 LC 4 L 
di1 Vs  Vc
  A1
dt t 0 r L
Vs  Vc  t
i1 (t )  e sin r t
r L
R

2L
April 11, 2019 NIT Calicut 5
To find the time when the current is
maximum, set the first derivative = 0
di1
0
dt
 Vs  Vc 
 cos r t   0
 t  t
  e sin  t   e
 r L 
r r

.....
r
 tan r tm

1  r t m
tan  r t m

1 1 r
tm  tan
r 2
April 11, 2019 NIT Calicut 6
To find the capacitor voltage, integrate the
current
t
1
vC1 (t )   i1 (t )dt  Vc
C0
1  Vs  Vc   t
t
vC1 (t )      e sin r t  dt  VC
C 0  r L 
...
vC1 (t )  (Vs  VC )e  t ( sin r t  r cos r t ) / r  Vs

0  t  t1m ( ) The current i1 becomes = 0 @
r t=t1m


vC1 (t1m )  VC1  Vs  VC  e r
 Vs

April 11, 2019 NIT Calicut 7


April 11, 2019 NIT Calicut 8
Operation in Mode 2 – T1, T2 Both OFF

i2 (t )  0
vC2 (t )  VC1
vC2 (t2m )  VC2  VC1
April 11, 2019 NIT Calicut 9
t2m

April 11, 2019 NIT Calicut 10


Operation in Mode 3 – Fire T2

di3 1
L  Ri3   i3dt  vC3 (0)  0
dt C
i3 (0)  0
vC3 (0)  VC2  VC1
April 11, 2019 NIT Calicut 11
VC1  t
i3 (t )  e sin r t
r L
t
1
vC3 (t )   i3dt  VC1
C0
VC1 e  t ( sin r t  r cos r t )
vC3 (t ) 
r

0  t  t3 ( )
r
m

April 11, 2019 NIT Calicut 12




r
vC3 (t3m )  VC3  VC  VC1 e


r
vC1 (t1m )  VC1  (VS  VC )e  VS
.
.
1
VC  VS z
e 1
ez
VC1  VS z
e 1
VC  VS  VC1
April 11, 2019 NIT Calicut 13
April 11, 2019 NIT Calicut 14
Summary -- Series Resonant Inverter

April 11, 2019 NIT Calicut 15


To avoid a short-circuit across the main dc supply,
T1 must be turned OFF before T2 is turned ON,
resulting in a “dead zone”.
This “off-time” must
be longer than the turn-
off time of the thyristors,
tq.
 
  toff  tq
0  r
The maximum
possible output
frequency is
1
f 0  f max 
  
2  tq  
 r 

April 11, 2019 NIT Calicut 16


Example – Analysis of the
Basic Resonant Inverter

• L1 = L2 = L = 50μH
• C = 6μF
• R = 2Ω
• Vs = 220V
• fo = 7kHz
• tq = 10μs

April 11, 2019 NIT Calicut 17


Determine the resonant frequency
1 1
 1 R 2   1012 22 1012 
2 2
r    2    2 
 54,160rad / s
 LC 4 L   50  6 4  50 

The resonant frequency in Hz


r
fr   8619.8 Hz
2

1
Tr   116  s
fr
R 2
  6
 20, 000
2 L (2  50 10 )
April 11, 2019 NIT Calicut 18
Determine the turn-off time toff

 
toff  
0 r
 
toff  
43,982 54,160
toff  13.42 s

April 11, 2019 NIT Calicut 19


Determine the maximum permissible frequency

1
f max 
  
2  tq  
 r 
1
f max 
 6  
2 10 10  
 54,160 
f max  7352 Hz

April 11, 2019 NIT Calicut 20


Determine the peak-to-peak capacitor voltage

Vs 220
VC  
 20
 100.4V
r 54.16
e e
VC1  Vs  VC  220  100.4  320.4V
V pp  VC  VC1  100.4  320.4  420.8V

April 11, 2019 NIT Calicut 21


Determine the peak load current

Vs  VC  tm
i1 (t  tm )  e sin r tm  i1max
r L
1 r 1
tm  tan
r 
1 1 54.16
tm  tan  22.47  s
54,160 20
220  100.4  (0.02)(22.47)
i1max  e sin(54,160  22.47 106 )
0.05416  50
i1max  70.82 A

April 11, 2019 NIT Calicut 22


Sketch the instantaneous load current, capacitor
voltage, and dc supply current

April 11, 2019 NIT Calicut 23


Calculate the rms load current

1 2
T
1 2
T

I o    i1 (t )dt   i3 (t )dt 
T 0 T 0 
I o  44.1A

April 11, 2019 NIT Calicut 24


Determine the output power

Po  I R   44.1 (2)
2 2
o

Po  3,889W

April 11, 2019 NIT Calicut 25


Determine the average supply current

Po
Is 
V
3,889W
Is   17.68 A
220V

April 11, 2019 NIT Calicut 26


Determine the average, peak, and rms thyristor
currents

T
2
1
I A   io (t )dt  17.68 A
T 0
I p  70.82 A
44.1A
IR   31.18 A
2

April 11, 2019 NIT Calicut 27


Parallel Inverter

April 11, 2019 NIT Calicut 28


Parallel Inverter
 Fig. in previous slide shows basic parallel
inverter.
 This circuit can produce an ac output (square
wave) from a dc source.
 The outer two terminals of centre-tapped
transformer primary is connected to the negative
of the dc source via thyristors T1 and T2.
 A dc inductor L is connected between the center-
tap of the primary and the positive termina of the
dc source to prevent excessive capacitor current
during switching operations.

April 11, 2019 NIT Calicut 29


Parallel Inverter
By alternately turning on T1 and T2, the dc
source is connected in alternative sense to the
two halves of the transformer primary, thereby
inducing a square wave voltage across the
secondary of the transformer.
The capacitor C is effectively in parallel with
load and hence, the name parallel capacitor
commutated inverter.

April 11, 2019 NIT Calicut 30


Parallel Inverter
During the period when thyristor T1 is
conducting, current flows through dc inductor,
the left half of the transformer winding OR,
and T1 and back to the dc source.
The source voltage Vdc is applied to left half of
the primary winding OR, induces 2Vdc across
RS by auto-transformer action.
Hence, the capacitor is charged to this voltage
2Vdc with the polarity as shown in Fig. with
the right side plate positive.
April 11, 2019 NIT Calicut 31
Parallel Inverter
 The primary dc input voltage produces one half of
ac output voltage across the load.
 This is a square wave if the load is resistive.
 If thyristor T2 is turned on, the source voltage Vdc
is applied to the right half of the primary, OS and
in the secondary side the other half of the output
voltage is produced.
 Also, the commutating capacitor applies a reverse
voltage equal to 2Vdc across the conducting
thyristor T1 and turns it off.

April 11, 2019 NIT Calicut 32


Parallel Inverter
 The capacitor discharges through T2, source, and
the transformer primary OS and charges in the
opposite direction, with left side plate positive.
 The next cycle starts with the turning on of T1,
that leads to the commutation of conducting
thyristor T2.
 In this manner, the current is alternately
conducted through each half of the transformer
primary creating an alternating flux and an ac
voltage in the secondary.

April 11, 2019 NIT Calicut 33


Parallel Inverter
 The output voltage wave and voltage across T1
are shown in Fig.
 It is observed that the shape of the load voltage
wave depends on the magnitude of the load.
 For heavy loads, it is rectangular whereas for light
loads, it is closer to the triangular form.
 The trigger pulses are alternately applied to T1
and T2 to produce an ac voltage at the output.
 The frequency of output is dependent on the
triggering frequency of the devices.
April 11, 2019 NIT Calicut 34
Parallel Inverter
The operation of the inverter is relatively
simple with pure resistive loads.
However, for inductive loads, size of the
capacitor has to be increased since the
capacitor in addition to commutation has to
supply the lagging reactive power to maintain
the lagging load currents.
If not, commutation failure may occur.

April 11, 2019 NIT Calicut 35


Parallel Inverter
Drawbacks of basic parallel inverter
The circuit turn off time tc increases as load
decreases. This may help SCR during its turn-off.
But the peak voltage that the SCR must block also
increases simultaneously and it can reach several
times the dc supply voltage.
With heavy loads, the circuit turn-off time tc
reduces. If this time is less than the device turn-off
time; it may not get turned-off. Thus the circuit
turn-off time is load dependent in these inverters.

April 11, 2019 NIT Calicut 36


Parallel Inverter
Drawbacks of basic parallel inverter
Commutating capacitor value has to be raised if
the inverter supplies lagging power factor loads.
The output voltage wave shape is load dependent,
that is, rectangular for heavy loads and triangular
for light loads.

April 11, 2019 NIT Calicut 37


Bridge Inverters
Single phase Inverter
Half Bridge Inverter
Full Bridge Inverter
Three phase voltage source inverter
180 degree mode
120 degree mode
April 11, 2019 NIT Calicut 38
Single Phase Half Bridge Inverter

April 11, 2019 NIT Calicut 39


Single Phase Half Bridge Inverter

April 11, 2019 NIT Calicut 40


Single Phase Full Bridge Inverter

April 11, 2019 NIT Calicut 41


April 11, 2019 NIT Calicut 42
Voltage Control in Single Phase Inverters
 AC loads may require a constant or variable
voltage at their input terminals.
 Methods of controlling the output voltage are,
 External control of AC output voltage
 External control of DC input voltage
 Internal control of inverter
 The first two methods require additional
components. But third method requires no
additional components.

D Inverter A
C C
April 11, 2019 NIT Calicut 43
External Control of AC Output Voltage
AC Voltage Control
The output voltage of the inverter is
controlled by using an AC voltage controller.
The output contains more harmonics when
the output voltage is low.
Hence it is rarely used.

Constant Constant AC Voltage Controlled


Inverter AC Load
DC AC Controller AC voltage
voltage voltage

April 11, 2019 NIT Calicut 44


External Control of AC Output Voltage
Series Inverter Control
 Two or more inverters are connected in parallel.
 Output of inverters are connected to transformers
whose secondary windings are connected in series.
 Frequency of output voltages V01 & V02 must be
same.

V0 VO
2

ϴ
V0
1

April 11, 2019 NIT Calicut 45


External Control of DC Input Voltage
Fully
Constant Controlled Controlled
Controlled Filter Inverter
AC DC voltage AC voltage
Rectifier
voltage

Constant Uncontrolle Chopp Controlled Controlled


d Rectifier
Filter Inverter
AC er DC voltage AC voltage
voltage

Constant AC Voltage Uncontrolle Controlled Controlled


Filter Inverter
AC Controller d Rectifier DC AC voltage
voltage voltage

Controll Controlled Controlled


Chopper Filter Inverter
ed DC DC voltage AC voltage
voltage

April 11, 2019 NIT Calicut 46


Internal Control of Inverter
 Output voltage of inverter is adjusted by
controlling the inverter itself.
 This method of controlling the output voltage is
called Pulse Width Modulation.
 It is obtained by adjusting the ON and OFF
periods of the inverter components.
Advantages
 No additional components are required.
 Lower order harmonics can be eliminated
along with voltage control.
 Filter requirements are minimized.
April 11, 2019 NIT Calicut 47
Pulse Width Modulated Inverters
 These inverters can produce ac voltages of variable
magnitude as well as variable frequency.
 The quality of output voltage can also be greatly enhanced,
when compared with those of square wave inverters.
 Pulse Width Modulation is the process of modifying the
width of the pulses to obtain variation in the o/p voltage
with reduced harmonic content.
 The main aim of using different PWM techniques is to
generate a sinusoidal output voltage of desired fundamental
frequency and magnitude.
April 11, 2019 NIT Calicut 48
Different types of PWM inverters

 Single pulse modulation


 Multiple pulse modulation
 Sinusoidal pulse modulation
 Modified sinusoidal pulse modulation
 Space vector pulse width modulation (Three
phase)

April 11, 2019 NIT Calicut 49


Single Pulse Width Modulation

In single pulse modulation, there is only one


pulse exists per half cycle.
The width of this pulse is varied to control
the inverter output voltage.

April 11, 2019 NIT Calicut 50


Single Pulse Width Modulation

Ar >
AC

Ar <
AC

 Frequency of the reference signal determines the frequency of


output voltage.
 The ratio of Ar to AC, called modulation index, controls the
output voltage.

April 11, 2019 NIT Calicut 51


Single Pulse Width Modulation
 The output voltage of the inverter with single pulse
modulation is given by,

4𝑉𝑠 𝑛𝜋
𝑉𝑜 = ෍ sin sin 𝑛𝑑 sin 𝑛𝜔𝑡
𝑛𝜋 2
𝑛=1,3,5
4𝑉𝑠 1 1
𝑉𝑜 = sin 𝑑 sin 𝜔𝑡 − sin 3𝑑 sin 3𝜔𝑡 + sin 5𝑑 sin 5𝜔𝑡 … . .
𝜋 3 5
4𝑉𝑠 𝜋 4𝑉𝑠
𝑉𝑜1 = sin sin 𝑑 sin 𝜔𝑡 = sin 𝑑 sin 𝜔𝑡
𝜋 2 𝜋
4𝑉𝑠
𝑉𝑜1𝑚 = sin 𝑑 −−−−−−−− −𝐴
𝜋
 If nd = π or d=π/n, then nth harmonic will
be
eliminated from the inverter output voltage.
 For example, for eliminating third harmonic, 3d = π.
i.e pulse width, 2𝑑 = 2𝜋/3 = 1200 .
April 11, 2019 NIT Calicut 52
Inference from Single PWM

• 3rd, 5th & 7th harmonics dominate


when the voltage is reduced.

• A large amount of harmonics is


introduced at lower output
voltages.

• Harmonic content can be reduced


by having many pulses in each half
cycle of output voltage.

April 11, 2019 NIT Calicut 53


Multiple Pulse Modulation
In this method, many pulses having equal
widths are produced per every half cycle.
The gating signals are produced by comparing
reference signal with triangular carrier wave.

𝜸
𝝅 − 𝟐𝒅 𝒅
= +
𝟑 𝟐
April 11, 2019 NIT Calicut 54
Multiple Pulse Modulation

Frequency of the reference signal determines


the frequency of output voltage.
The ratio of Ar to AC, called modulation index,
controls the output voltage.
April 11, 2019 NIT Calicut 55
Multiple Pulse Modulation
 The output voltage waveform can be expressed in Fourier series as,

8𝑉𝑠 𝑛𝑑
𝑉𝑜 = ෍ sin nγ sin sin 𝑛𝜔𝑡
𝑛𝜋 2
𝑛=1,3,5

𝑑 1 3𝑑
8𝑉𝑠 sin 𝛾 sin sin 𝜔𝑡 − sin 3𝛾 sin sin 3𝜔𝑡
𝑉𝑜 = 2 3 2
𝜋 1 5𝑑
+ sin 5𝛾 sin sin 5𝜔𝑡 … . .
5 2
8𝑉𝑠 𝑑
𝑉𝑜1 = sin γ sin sin 𝜔𝑡
𝜋 2
8𝑉𝑠 𝑑
𝑉𝑜1𝑚 = sin γ sin −−−−− −𝐵
𝜋 2

April 11, 2019 NIT Calicut 56


Multiple Pulse Modulation
For example, take pulse width 2d = 720.
 In single pulse modulation, the peak value of fundamental voltage is,
4𝑉𝑆 4𝑉𝑆
𝑉𝑜1𝑚 = sin 𝑑 = sin 36 = 𝟎. 𝟕𝟒𝟖𝟒 𝑽𝑺
𝜋 𝜋
 In two pulse modulation, the peak value of fundamental voltage is,
8𝑉𝑆 𝑑
𝑉𝑜1𝑚 = sin 𝛾 sin
𝜋 2
180 − 72 36
𝛾= + = 540
3 2
8𝑉𝑆
𝑉𝑜1𝑚 = sin 54 sin 18 = 𝟎. 𝟔𝟑𝟕 𝑽𝑺
𝜋

April 11, 2019 NIT Calicut 57


Multiple Pulse Modulation
 It is seen from the above that the fundamental component of
output voltage is low for two pulse modulation than it is for
single pulse modulation.
 But lower order harmonics are eliminated and higher order
harmonics are increased. But higher order harmonics can be
filtered easily.
 This scheme is advantageous than single pulse modulation.
 But large number of pulses per half cycle requires frequent turn
on and turn off thyristors.
 This will increase switching losses.
April 11, 2019 NIT Calicut 58
Sinusoidal Pulse Modulation
 In this method, several pulses per half cycle are
used as in the case of multiple pulse modulation.
 But width of each pulse is modulated proportional
to the amplitude of sine wave.
 Gate pulses are generated by comparing sinusoidal
reference signal with triangular carrier signal.
 Frequency of reference signal (fr) decides the
frequency of output voltage.
 The ratio of Vr/Vc is called the modulation index
which controls the output voltage.
 Number of pulses per half cycle depends on the
carrier frequency (fc).
April 11, 2019 NIT Calicut 59
Sinusoidal Pulse Modulation

April 11, 2019 NIT Calicut 60


Sinusoidal Pulse Modulation
What is Modulation Index?
 Modulation index is the ratio of peak magnitudes of
the modulating waveform and the carrier waveform.

𝑉𝑚
𝑚 =
𝑉𝑐

 MI controls the harmonic content in the output


voltage.

April 11, 2019 NIT Calicut 61


Summary
 By increasing the number of pulses (N) per half
cycle, the lower order harmonics get cancelled.
But higher order harmonics will get increased.
 Higher order harmonics can be filtered out
easily.
 Higher value of N results in more switching
losses and leads to reduction of efficiency of
inverter.

April 11, 2019 NIT Calicut 62


Sinusoidal Pulse Modulation

What is Over Modulation?


 When the peak magnitude of modulating signal
exceeds the peak magnitude of carrier signal,
the PWM inverter operates under over-
modulation.
 During over-modulation the output voltage
increases slightly.

April 11, 2019 NIT Calicut 63


Reduction of Harmonics in the Inverter O/P
 Harmonics of 5% is allowable in an inverter output voltage.

 But inverter output voltage contains more than 5% of harmonics.

 Filters can be used to reduce the harmonic content.

 Small size filter is enough for reducing higher order harmonics.

 But a bigger size filter is required for reducing lower order


harmonics.

 This makes the system costlier and leads to poor performance.

 Hence a system without filter is needed to suppress the


harmonics.

April 11, 2019 NIT Calicut 64


Harmonic Reduction by PWM
 Several pulses per half cycle reduces the lower order harmonics.

• As the waveform is symmetrical during every quarter cycle, an=0.

April 11, 2019 NIT Calicut 65


Harmonic Reduction by PWM
 If 3rd and 5th harmonics are to be eliminated,

• Using α1 and α2, voltages of 7th, 9th and 11th harmonics are found as,

April 11, 2019 NIT Calicut 66


Harmonic Reduction by PWM
 The amplitude of the fundamental component for these
values of α1 and α2 is,

• The amplitude of the fundamental component of un


modulated output voltage wave is,

• The amplitude of the fundamental voltage is 83.91% of the un


modulated wave. So inverter is de-rated by 16.09%.
• Additional eight commutation per cycle increases switching
losses.

April 11, 2019 NIT Calicut 67


Harmonic Reduction by Transformer Connections
 The output of two or more inverters are
combined using transformers to get a net
voltage with reduced harmonic content.
 The voltage waveform should be similar but
phase shifted from each other.

April 11, 2019 NIT Calicut 68


Harmonic Reduction by Transformer Connections
 The Fourier analysis of V01 and V02 gives,

• The amplitude of the fundamental output voltage with phase shift,

• The amplitude of the fundamental output voltage with no phase shift,

• In this method, the inverters are de-rated by 13% but this is less
compared to the previous method

April 11, 2019 NIT Calicut 69


Harmonic Reduction by Stepped Wave Inverters

 In this method, pulses of different widths and heights are


super imposed to get a resultant stepped wave with
reduced harmonic content.

April 11, 2019 NIT Calicut 70


Three Phase VSI (180 Degree Mode)
Three Phase VSI (180 Degree Mode)

Step Devices Conducting


I T1, T5 & T6
II T1, T2 & T6
III T1, T2 & T3
IV T4, T2 & T3
V T4, T5 & T3
VI T4, T5 & T6
Three Phase VSI (180 Degree Mode)

 Step I

𝑽𝒔 𝑽𝑹𝒀 = 𝑽𝒔
𝑽𝑹𝑵 =
𝟑
𝟐. 𝑽𝒔 𝑽𝒀𝑩 = −𝑽𝒔
𝑽𝒀𝑵 = −
𝟑
𝑽𝒔 𝑽𝑩𝑹 = 𝟎
𝑽𝑩𝑵 =
𝟑
Three Phase VSI (180 Degree Mode)

Step II
𝑽𝑹𝑵 𝑽𝑹𝒀 = 𝑽𝒔
𝟐. 𝑽𝒔
=
𝟑 𝑽𝒔 𝑽𝒀𝑩 = 𝟎
𝑽𝒀𝑵 = −
𝟑
𝑽𝒔 𝑽𝑩𝑹 = −𝑽𝒔
𝑽𝑩𝑵 = −
𝟑
Three Phase VSI (180 Degree Mode)

Phase Voltage Line Voltage


Step
VRN VYN VBN VRY VYB VBR
I Vs/3 -2Vs/3 Vs/3 Vs - Vs 0

II 2Vs/3 -Vs/3 -Vs/3 Vs 0 - Vs

III Vs/3 Vs/3 -2Vs/3 0 Vs - Vs

IV -Vs/3 2Vs/3 -Vs/3 - Vs Vs 0

V -2Vs/3 Vs/3 Vs/3 - Vs 0 Vs

VI -Vs/3 -Vs/3 2Vs/3 0 - Vs Vs


Three Phase VSI (180 Degree Mode)
Three Phase VSI (180 Degree Mode)
Three Phase VSI (120 Degree Mode)
Three Phase VSI (120 Degree Mode)

 Step I

𝑽𝒔 𝑽𝑹𝒀 = 𝑽𝒔
𝑽𝑹𝑵 =
𝑽𝒔 𝟐
𝟐 𝑽𝒔 𝑽𝒔
𝑽𝒀𝑵 = − 𝑽𝒀𝑩 = −
𝟐 𝟐
𝑽𝒔
𝟐
𝑽𝑩𝑵 = 𝟎 𝑽𝑩𝑹
𝑽𝒔
=−
𝟐
Three Phase VSI (120 Degree Mode)

 Step II

𝑽𝒔 𝑽𝒔
𝑽𝑹𝑵 = 𝑽𝑹𝒀 =
𝑽𝒔 𝟐 𝟐
𝟐 𝑽𝒔
𝑽𝒀𝑵 = 𝟎 𝑽𝒀𝑩 =
𝟐
𝑽𝒔
𝟐
𝑽𝑩𝑵 𝑽𝑩𝑹 = −𝑽𝒔
𝑽𝒔
=−
𝟐
Phase Voltage Line Voltage
Step
VRN VYN VBN VRY VYB VBR
- -
I Vs/2 -Vs/2 0 Vs
Vs/2 Vs/2
II Vs/2 0 -Vs/2 Vs/2 Vs/2 - Vs
- -
III 0 Vs/2 -Vs/2 Vs
Vs/2 Vs/2
IV -Vs/2 Vs/2 0 - Vs Vs/2 Vs/2
- -
V -Vs/2 0 Vs/2 Vs
Vs/2 Vs/2
VI 0 -Vs/2 Vs/2 Vs/2 - Vs Vs/2
Three Phase VSI (120 Degree Mode)
Three Phase VSI (120 Degree Mode)

Line Voltages

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