LOW VOLTAGE ANALOG CIRCUIT DESIGN

UNDERTAKEN AT
NETAJI SUBHAS UNIVERSITY OF TECHNOLOGY
(NSUT)
(DEPARTMENT OF ELECTRONICS)

ABHAY KAUSHAL (001EC15)

ABHEY SEHRAWAT (002EC15)
AKSHIT YADAV (017EC15)

UNDER THE GUIDANCE OF-

1. PROF. MANEESHA GUPTA 2. MRS SHWETA KUMARI
 Introduction

• The rapid growing market of portable electronic systems

such as wireless communication devices or battery-
powered medical devices has increased the demand for
low-voltage and low-power circuit design techniques.

• The design of low-voltage analog circuits will become

more and more complicated as the supply voltage scales
down closer to the threshold voltage.
Following are the techniques to design low
voltage-based circuits:
1. Floating Gate (FG) and Quasi-Floating Gate (QFG)-

FGMOS and QFGMOS based circuits can operate at much

lower supply. The advantage of these approaches lies in
terms of linearity as the input coupling capacitor divider
makes input signal to attenuate and increases the linearity.
2. Bulk-Driven (BD)-

The conventional MOS transistor is a four terminal device

whose fourth terminal, the bulk is usually connected either
negative/positive supply for N-channel/P-channel transistor,
respectively, or to their source terminal. But by using the bulk-
terminal as a signal input instead of connecting it to any of the
supply voltages or source terminal, the threshold voltage
limitation can be removed.
3. Bulk-Driven Quasi-Floating Gate (BD-QFG)-

• Using the BD together with QFG MOS transistor, enhanced

small-signal characteristics like transconductance and bandwidth
over separate BD and QFG-based circuits can be achieved.

• The approach is introduced with the name BD-QFG technique.

This technique is helpful for battery-operated portable devices
since its bulk-input processing demand maximum supply not
more than a BJT junction turn-on potential to prevent latch-up
SQUARING ANALOG CIRCUITS

• Analog squarers have been widely used in a number of areas

such as signal processing, modulators, peak detectors, signal
generators, frequency dividers, etc.
• Analog squarers can provide output voltages and/or currents
which are proportional to square of them.
• Squarer/divider cells are useful building blocks that can find
application in multipliers, RMS-DC converters, CMOS
companding filters, pseudo exponential circuits, etc.
SQUARER CIRCUIT 1
SQUARER CIRCUIT 2
SIMULATED RESULTS

Factors/ Analysis Circuit 1 Circuit 2

Technology 180 nm 180 nm
(-750 mV to 750 (-750 mV to 750
Input Range mV) mV)
Output range 0 to 800 mA 0 to 675 mA
Supply Voltage 1.5 V 1.5 V
3db Bandwidth 10.80390 meg 10.83757 meg
Power Consumption 9.31E-04 WATTS 1.34E-03 WATTS
APPLICATION

- Multiplier
OUTPUT

Voltage curve for squarer 1

Voltage curve for squarer 2
Multiplier Output
FUTURE WORK

In future several low voltages techniques will be

studied and a suitable technique will be applied to both
the squarer circuits to design a circuit having low
power consumption.
REFERENCES
1. Pandey, R., & Gupta, M. (2009). A novel voltage-controlled grounded resistor using FGMOS
technique. Proceeding of the IEEE international conference on multimedia, signal processing and
communication technologies, 16–19. doi:10.1109/MSPCT.2009.5164163

2. 2. Kaewdang, K., Kumwachara, K., & Surakampontorn, W. (2004). A realization of simple

currentmode CMOS based true RMS-to-DC converter. Proceedings of IEEE Asia Pacific
Conference on Circuits and Systems, 2, 733–736. doi:10.1109/APCCAS.2004.1412983

3. 3. Farshidi, E., & Nejad, T. G. (2012). A new two-quadrant square/divider circuit for true RMS-
to-DC converters in MOS technology. Microelectronics Journal, 45, 778–784. doi:10.1016/j.
measurement.2011.12.009

4. 4. Farshidi, E., & Sayedi, S. M. (2008). A 1.2 V current-mode true RMS–DC converter based on
the floating gate MOS translinear principle. Microelectronics Journal, 39, 293–298.
doi:10.1016/j. mejo.2007.11.022
5. Li, F., Chang, C., & Siek, L. (2010). A very low power 0.7 V subthreshold fully programmable
Gaussian function generator. Asia Pacific conference on postgraduate research in
microelectronics and electronics, 198–201. doi:10.1109/PRIMEASIA.2010.5604926

6. R. Pandey, and M. Gupta,”A Novel Voltage-Controlled Grounded Resistor Using FGMOS

Technique,” in Proc. IEEE International Conference on Multimedia, Signal Processing and
Communication Technologies IMPACT-2009, Aligarh, India 2009, pp. 16-19.

7. T. Inoue, H. Nakane, Y. Fukuju, and E.S. Sinencio, ”A Design of a Low-voltage Current-Mode

Fully- Differential Analog CMOS Integrator Using FG-MOSFETs and Its Implementation,”
Analog Integrated Circuits and Signal Processing, vol. 32, pp. 249-256, 2002.

8. S. Yan, and E. Sanchez-Sinencio, ”Low Voltage Analog Circuit Design Techniques: A Tutorial,”
IEICE Trans. Analog Integrated Circuits and Systems, vol. E00-A, no. 2, pp. 1-17, 2000.

9. J. J. Chen, S. I. Liu, and Y. S. Hwang, ”Low-voltage single supply four quandrant multiplier
using floating-gate MOSFETs,” in Proc. IEEE Int. Symp. Circuits Systems, ISCAS’97, Hong
Kong, 1997, pp. 237-240.
THANK YOU