Introduction

 Gate-level minimization refers to the design task of

finding an optimal gate-level implementation of
Boolean functions describing a digital circuit.

 Optimization methods:
 Boolean Algebra
 K-Map
 Tabulation method

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 The Map Method
 The complexity of the digital logic gates
 The complexity of the algebraic expression

 Logic minimization
 Algebraic approaches
 The Karnaugh map
 A simple straight forward procedure
 A pictorial form of a truth table
 Applicable if the number of variables < 7

 A diagram made up of squares

 Each square represents one minterm
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 Two-Variable Map

 A two-variable map
 Four minterms
 x' = row 0; x = row 1
 y' = column 0; y = column 1

 A truth table in square

diagram
 Fig.(a): xy = m3
 Fig. (b): x+y = x'y+xy' +xy =
m1+m2+m3

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 A Three-variable Map
 A three-variable map
 Eight minterms
 The Gray code sequence
 Any two adjacent squares in the map differ by only on variable
 Primed in one square and unprimed in the other
 e.g., m5 and m7 can be simplified
 m5+ m7 = xy'z + xyz = xz (y'+y) = xz

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 A Three-variable Map
 m0 and m2 (m4 and m6) are adjacent
 m0+ m2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z'
 m4+ m6 = xy'z' + xyz' = xz' (y'+y) = xz'

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 Example 3.1
 Simplify the Boolean function F(x, y, z) = S(2, 3, 4, 5)
 F(x, y, z) = S(2, 3, 4, 5) = x'y + xy'

F(x, y, z) = Σ(2, 3, 4, 5) = x'y + xy‘= x y

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 Example 3.2
 Simplify F(x, y, z) = S(3, 4, 6, 7)
 F(x, y, z) = S(3, 4, 6, 7) = yz+ xz'

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 Four adjacent Squares
 Consider four adjacent squares
 2, 4, and 8 squares can be simplified
 m0+m2+m4+m6 = x'y'z'+x'yz'+xy'z'+xyz' = x'z'(y'+y) +xz'(y'+y) =
x'z' + xz‘ = z'
 m1+m3+m5+m7 = x'y'z+x'yz+xy'z+xyz =x'z(y'+y) + xz(y'+y) =x'z
+ xz = z

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 Example 3.3
 Simplify F(x, y, z) = S(0, 2, 4, 5, 6)
 F(x, y, z) = S(0, 2, 4, 5, 6) = z'+ xy'

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 Example 3.4
 let F = A'C + A'B + AB'C + BC
a) Express it in sum of minterms.
b) Find the minimal sum of products expression.
Ans:
F(A, B, C) =S(1, 2, 3, 5, 7) = C + A'B

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 Four-Variable Map
 The map
 16 minterms
 Combinations of 2, 4, 8, and 16 adjacent squares

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 Example 3.5
 Simplify F(w, x, y, z) = S(0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14)

F = y'+w'z'+xz'

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 Example 3.6
 Simplify F = ABC + BCD + ABCD + ABC

ABC + BCD + ABCD + ABC= BD + BC +ACD

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 Prime Implicants
 Prime Implicants
 All the minterms are covered.
 Minimize the number of terms.
 A prime implicant: a product term obtained by
combining the maximum possible number of
adjacent squares (combining all possible maximum
numbers of squares).
 Essential P.I.: a minterm is covered by only one
prime implicant.
 The essential P.I. must be included.

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 Prime Implicants
 Consider F(A, B, C, D) = Σ(0, 2, 3, 5, 7, 8, 9, 10, 11, 13, 15)
 The simplified expression may not be unique
 F = BD+B'D'+CD+AD = BD+B'D'+CD+AB'
= BD+B'D'+B'C+AD = BD+B'D'+B'C+AB'

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 Five-Variable Map

 Map for more than four variables becomes complicated

 Five-variable map: two four-variable map (one on the top of the
other).

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 Example 3.7
 Simplify F = S(0, 2, 4, 6, 9, 13, 21, 23, 25, 29, 31)

F = A'B'E'+BD'E+ACE

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 Example 3.7 (cont.)
 Another Map for Example 3-7

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 Example 3.8

 Simplify F = S(0, 1, 2, 5, 8, 9, 10) into (a) sum-of-products form,

and (b) product-of-sums form:

a) F(A, B, C, D)= S(0, 1, 2, 5, 8,

9, 10) = B'D'+B'C'+A'C'D
b) F' = AB+CD+BD'
» Apply DeMorgan's theorem;
F=(A'+B')(C'+D')(B'+D)

F(A, B, C, D)= S(0, 1, 2, 5, 8, 9, 10) = B'D'+B'C'+A'C'D

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 Example 3.8 (cont.)
 Gate implementation of the function of Example 3.8

Sum-of products form Product-of sums form

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 Sum-of-Minterm Procedure
 Consider the function defined in Table 3.2.
 In sum-of-minterm:

F ( x, y, z) = (1,3,4,6)

 Using the complement of F:

 F’(x, y, z)= S(0,2,5,7)
F ( x, y, z ) = ( x  z)( x  z )

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 Sum-of-Minterm Procedure
 Consider the function defined in Table 3.2.
 Combine the 1’s:

F ( x, y, z ) = xz  xz

 Combine the 0’s :

F'( x, y , z ) = xz  xz 

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 Don't-Care Conditions
 The value of a function is not specified for certain
combinations of variables
 BCD; 1010-1111: don't care

 The don't-care conditions can be utilized in logic

minimization
 Can be implemented as 0 or 1

 Example 3.9: simplify F(w, x, y, z) = S(1, 3, 7, 11, 15)

which has the don't-care conditions d(w, x, y, z) = S(0, 2, 5)

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 Example 3.9 (cont.)
 F = yz + w'x'; F = yz + w'z
 F = S(0, 1, 2, 3, 7, 11, 15) ; F = S(1, 3, 5, 7, 11, 15)
 Either expression is acceptable

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3.3 Simplify the following Boolean expression using three-
variable maps: d) F(x, y, z) = x y z + x\ y\ z + x y\ z\

y
yz
xyz x 00 01 11 10

x y\ z \ 0 1
x 1 1 1
x\ y\ z

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3.5 Simplify the following Boolean expression using four-
variable maps: a) F(w,x, y, z) = S(1,4,5,6,12,14,15)
y
yz
wx 00 01 11 10
x z\ 00 1
w\ y\ z
wxy
01 1 1 1
x
11 1 1 1
w
10

F =w\ y\ z+w x y+ x z\ z

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3.5 Simplify the following Boolean expression using four-
variable maps: b) F(A,B,C,D)= S(1,5,9,10,11,14,15)
C
CD
AB 00 01 11 10
AC
00 1
A\ C\ D
01 1
A B\ D B
B\ C\ D
11 1 1
A
10 1 1 1

D
F =A\C\D+AC+(AB\D or B\C\D)
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3.5 Simplify the following Boolean expression using four-
variable maps: c) F(w,x, y, z) = S(0,1,4,5,6,7,8,9)
y
yz
wx 00 01 11 10

w\ x 00 1 1

x\ y\ 01 1 1 1 1
x
11
w
F =x\y\+w\x 10 1 1

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3.5 Simplify the following Boolean expression using four-
variable maps: d) F(A,B,C,D)= S(0,2,4,5,6,7,8,10,13,15)
C
CD
AB 00 01 11 10
B\ D\ 00 1 1
BD
01 1 1 1 1
A\ B B
11 1 1
A\ D\ A
10 1 1

D
F =B\D\+BD+(A\B or A\D\)
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3.6 Simplify the following Boolean expression using four-
variable maps: a)A\B\C\D\+AC\D\+B\CD\+A\BCD+BC\D
C
CD
AB 00 01 11 10

B\ D\ 00 1 1
A\ B D 01 1 1
A B C\ B
11 1 1
A
10 1 1

D
F =B\D\+A\BD+ABC\
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3.6 Simplify the following Boolean expression using four-
variable maps: b) x\z+w\xy\+w(x\y+xy\)
= x\z+w\xy\+wx\y+wxy\
y
yz
wx 00 01 11 10
x\ z 00 1 1
x y\ 01 1 1
w x\ y x
11 1 1
w
10 1 1 1
F =x\ z+xy\+wx\y
z
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 3.6 Simplify the following Boolean expression using four-
variable maps: c)A\B\C\D\+A\CD\+AB\D\+ABCD+A\BD
C
CD
AB 00 01 11 10
B\ D\
00 1 1
A\ BD

BCD 01 1 1 1
B
A\ B C 11 1
A
A\ C D\
10 1 1

D
F =B\D\+A\BD+BCD+(A\BC or A\CD\)
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3.6 Simplify the following Boolean expression using four-
variable maps: d)A\B\C\D\+AB\C+B\CD\+ABCD\+BC\D
C
CD
AB 00 01 11 10
A\ B\ D\ 00 1 1
B C\ D
01 1
A C D\ B
11 1 1
A B\ C A
10 1 1

D
F =A\B\D\+BC\D+ACD\+AB\C
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3.10 Simplify the following Boolean function by first finding the
essential prime implicants: c) F(A,B,C,D)=S(1,3,4,5,10,11,12,13,14,15)
C
CD
B C\ essential AB 00 01 11 10
A C essential 00 1 1
A\ B\ D non-essential 01 1 1
B
A B non-essential
11 1 1 1 1
A\ C\ D non-essential A
10 1 1
B\ C D non-essential
Redundant D
F =BC\+AC+A\B\D
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3.15 Simplify the following Boolean function, together with don't care
condition d, and then express the simplified function in sum-of-
minterms form: b) F(A,B,C,D)=Sm(0,6,8,13,14) + Sd(2,4,10)
C
CD
AB 00 01 11 10
B\ D\
00 1 x
C D\
01 X 1
A B C\ D
B
11 1 1
A
F = B\D\+ABC\D+CD\ 10 1 x
F = S(0,2,6,8,10,13,14)
D
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3.15 Simplify the following Boolean function, together with don't care
condition d, and then express the simplified function in sum-of-
minterms form: c) F(A,B,C,D)=Sm(4,5,7,12,13,14) +Sd(1,9,11,15)
C
CD
AB 00 01 11 10
B C\
00 x
BD

AB 01 1 1 1
B
11 1 1 x 1
A
F = BC\+BD+AB 10 x x
F = S(4,5,7,12,13,14,15)
D
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 Logic Diagram of a
Quadruple NAND Chip

Quadruple N AND Chip

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 NAND and NOR Implementation
 NAND gate is a universal gate
 Can implement any digital system

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 NAND Gate

 Two graphic symbols for a NAND gate

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 Example 3.10
 Example 3-10: implement F(x, y, z) =
F ( x, y, z) = (1,2,3,4,5,7) F ( x, y, z ) = xy   xy  z

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 Procedure with Two Levels NAND

 The procedure
 Simplified in the form of sum of products;
 A NAND gate for each product term; the inputs to
each NAND gate are the literals of the term (the
first level);
 A single NAND gate for the second sum term (the
second level);
 A term with a single literal requires an inverter in
the first level.

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 Multilevel NAND Circuits
 Boolean function implementation
 AND-OR logic → NAND-NAND logic
 AND → AND + inverter
 OR: inverter + OR = NAND

F = A(CD + B) + BC

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 NAND Implementation

F = (AB +AB)(C+ D)

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 NOR Implementation
 NOR function is the dual of NAND function.
 The NOR gate is also universal.

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 Graphic Symbols for a NOR Gate

Example: F = (A + B)(C + D)E

F = (A + B)(C + D)E

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Example
F = (AB +AB)(C + D)

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 AND-OR-Invert Implementation

 AND-OR-INVERT (AOI) Implementation

 NAND-AND = AND-NOR = AOI
 F = (AB+CD+E)'
 F' = AB+CD+E (sum of products)

AND-OR-INVERT circuits, F = (AB +CD +E)

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 OR-AND-Invert Implementation
 OR-AND-INVERT (OAI) Implementation
 OR-NAND = NOR-OR = OAI
 F = ((A+B)(C+D)E)'
 F' = (A+B)(C+D)E (product of sums)

OR-AND-INVERT circuits, F = ((A+B)(C+D)E)'

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 Other Two-level Implementations

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 Exclusive-OR Function
 Exclusive-OR (XOR)
 xy = xy'+x'y
 Exclusive-NOR (XNOR)
 (xy)' = xy + x'y'
 Some identities
 x0 = x
 x1 = x'
 xx = 0
 xx' = 1
 xy' = (xy)'
 x'y = (xy)'
 Commutative and associative
 AB = BA
 (AB) C = A (BC) = ABC
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 Exclusive-OR Implementations
 Implementations
 (x'+y')x + (x'+y')y = xy'+x'y = xy

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 Odd Function
 ABC = (AB'+A'B)C' +(AB+A'B')C = AB'C'+A'BC'+ABC+A'B'C =
S(1, 2, 4, 7)
 XOR is a odd function → an odd number of 1's, then F = 1.
 XNOR is a even function → an even number of 1's, then F = 1.

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 XOR and XNOR
 Logic diagram of odd and even functions

Logic Diagram of Odd and Even Functions

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 Four-variable Exclusive-OR function
 Four-variable Exclusive-OR function
 ABCD = (AB'+A'B)(CD'+C'D) =
(AB'+A'B)(CD+C'D')+(AB+A'B')(CD'+C'D)

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 Parity Generation and Checking

55
 Parity Generation and Checking

56
 Parity Generation and Checking
 Parity Generation and Checking
 A parity bit: P = xyz
 Parity check: C = xyzP
 C=1: one bit error or an odd number of data bit error
 C=0: correct or an even # of data bit error

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