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FIELD PROGRAMMABLE GATE ARRAY

• FPGA was first developed in the mid


1970’s as the first non memory
programmable logic device.
• It is used as a programmable AND array
and programmable OR array.
• It contains 3 main units :
• logic blocks
• I/O blocks
• Interconnection wires and switches
• FPGA contains large number of
configurable logic blocks(CLBs) which
contain programmable combinational
logic and registers for sequential circuits.
• In FPGA , all the configurable logic block
and input/output blocks can be
programmed interconnected to
implement virtually any logic circuit.
• Each logic block in an FPGA typically has a
smaller number of inputs and outputs.
• The most commonly used logic block is a look
up table (LUT) which contains storage cells
that are used to implement a small logic
function.
• Each cell is capable of holding a single logic
value either 0 or 1. The stored value is
produced as output of the storage cell.
• The figure contains two inputs x1 and x2 and
one output f.
• The input variables are used to select inputs
of three multiplexers depending on the
valuation of x1 and x2, select the content of
one of the 4 storage cells as output of LUT.
Comparison of SRAM and Anti fuse FPGA
SRAM
ANTI FUSE

• Anti fuse provides insulation between two


conductors, but when sufficient voltages is
applied across it, conducting path forms.
• The figure shows and amorphous silicon
based FPGA contains two layers of metal are
separated by amorphous silicon, it provides
electrical insulation.
• A programming pulse of 10v to 12v and
necessary duration is applied. It creates
bidirectional conductive link between two
metals.
• Once programmed, an anti-fuse element
cannot be erased or reprogrammed.
Basic Structure of FPGA

• Several different types of


structure for FPGAs are available
commercially. All of them have
basic structures which consists of
many logic blocks or logic cells
accompanied by large number of
connecting lines.
• FPGA type of Gate array with
routing channels.
• FPGA type of sea of gates
• FPGA type of row based array
• FPGA type of bus based array

1.FPGA type of Gate array with routing channels


2. FPGA type of sea of gate
3. FPGA type of row based array
4. FPGA type of bus based array
FPGA Programming Types
• FPGA program sets up the look up table, switching routes and multiplexer addressing to the correct
specification.
• There are 3 main types of programming in FPGA :

1. Static RAM programming


- where interconnected routes are setup using pass transistors, transmission gates and multiplexers.

2. Anti fuse programming


- where interconnection routes are programmed permanently by devices known as anti fuses.

3. EPROM/EEPROM programming
- Where transistors are programmed to exist or not. If a transistor exist then it connects in an input to a
logic block.
1. Static RAM Programming
• SRAM programming uses one or two way
switches and multiplexers to define paths.
• In the case of switches with single NMOS
transistor , then if the RAM cell associated is
programmed with 1 then a path will be created
for the signal.
• For two way switches , then a transmission gate
can be used.

Advantages:
• No need to take FPGA out of the circuit.
• We can change the program stored in the
non volatile memory
Disadvantages:
• The main disadvantage of SRAM
programming is that it looses the
program stored in memory when power
is off.
Anti Fuse Programming
• Antifuse is a high
impedance contact ,
when it is applied high
voltage to it which turns
into a low impedance
state.
• Anti fused cannot be
reprogrammed.
• A relative high volatage
of 18v is applied across
the device.
• The current approx. 5mA
causes the dielectric to
melt and form a
conductive link between
polysilicon and the
diffusion.
EPROM and EEPROM Programming

• An EPROM transistor differs from


normal NMOS transistor is that it has
two gates, a floating gate and a select
gate.

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