Logic Gates

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 AND
In order for current to flow, both switches
must be closed
Logic notation AB = C
(Sometimes AB = C)

A B C
0 0 0
0 1 0
1 0 0
1 1 1
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 OR
Current flows if either switch is closed
Logic notation A + B = C

A B C
0 0 0
0 1 1
1 0 1
1 1 1
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 Properties of AND and OR
Commutation
A+B=B+A
AB=BA

Same as

Same as

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 Properties of AND and OR
Associative Property
A + (B + C) = (A + B) + C

A (B C) = (A B) C

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 Properties of AND and OR
Distributive Property
A + B C = (A + B) (A + C)
A+BC
A B C Q
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
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 Distributive Property
(A + B) (A + C)

A B C Q
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
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 Binary Addition

A B S C(arry)
0 0 0 0
1 0 1 0
0 1 1 0
1 1 0 1

Notice that the carry results are the same as AND

C=AB
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 Inversion (NOT)

A Q

0 1
Logic: QA
1 0

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 Exclusive OR (XOR)

Either A or B, but not both

A B S
This is sometimes called the
inequality detector, because the 0 0 0
result will be 0 when the inputs are the 1 0 1
same and 1 when they are different.
0 1 1
The truth table is the same as for 1 1 0
S on Binary Addition. S = A B
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 Getting the XOR
Two ways of getting S = 1 A B S
0 0 0
A B or A B
1 0 1
0 1 1
1 1 0

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 Circuit for XOR

A B AB AB
Accumulating our results: Binary addition is the
result of XOR plus AND
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 NAND (NOT AND)

A B Q
Q AB 0 0 1
0 1 1
1 0 1
1 1 0

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 NOR (NOT OR)

A B Q
QAB 0 0 1
0 1 0
1 0 0
1 1 0

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 Exclusive NOR

Q AB A B Q
0 0 1
0 1 0
Equality Detector
1 0 0
1 1 1
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 Summary
Summary for all 2-input gates

Inputs Output of each gate

A B AND NAND OR NOR XOR XNOR

0 0 0 1 0 1 0 1

0 1 0 1 1 0 1 0

1 0 0 1 1 0 1 0

1 1 1 0 1 0 0 1

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