Combinational

Circuits
Design
Combinational Circuit
 The output of combinational circuit at any
instant of time, depends only on the levels
present at input terminals.
The combinational circuit do not use any
memory. The previous state of input does not
have any effect on the present state of the
circuit.
A combinational circuit can have a n
number of inputs and m number of outputs.
Half Adder
 Functions of
Combinational Logic
Agenda
Adders
Comparators
Decoders
Encoders
Multiplexers
Demultiplexers
Adders
Basic Adders
Adders are important in
computers
other types of digital systems in which numerical
data are processed
The Half-Adder
Basic rule for binary addition.

The operations are performed by a logic ckt

called a half-adder.
The Half-Adder
The half-adder
accepts two
binary digits on
its inputs and
produces two
binary digits on
its outputs, a
sum bit and a
carry bit.
 The Full-Adder
The full-adder
accepts two input
bits and an input
carry and
generates a sum
output and an
output carry.
Full-Adder Logic
The Full-Adder
Parallel Binary Adders
Two or more full adders are connected to
form parallel binary adders.
To add two binary numbers, a full-adder is
required for each bit in the numbers.
So, for 2-bit numbers, two adders are needed.
Parallel Binary Adders
The carry output of each adder is connected
to the carry input of the next higher-order
adder.
Four-Bit Parallel Adders
A group of 4 bits is called a nibble. A basic
4-bit parallel adder is implemented with four
full-adder stages as shown.
Four-Bit Parallel Adders

The carry output of each

adder is connected to
the carry input of the
next higher-order adder
as indicated. These are
called internal carries.
4-Bit parallel adders
that are available in IC
form are the 7483A
and the and the
74LS283 Low power
Schottky TTL devices.
4-bit parallel adder
Adder expansion
Cascading of 4-bit adders to
form 16-bit adder
8-bit parallel adder
4- bit Subtractor
Full subtractor
Full subtractor TT
Application Example

Simple voting System

Comparators
Comparators
To compare the magnitude of two binary
quantities to determine the relationship of
those quantities.
The simplest form a comparator ckt determines
whether two numbers are equal.
Equality
XOR gate can be used as a 2-bit comparator.

To compare binary numbers containing two

bits each:
 4-7. Magnitude comparator
The equality relation of each
pair of bits can be expressed
logically with an exclusive-
NOR function as:

A = A3A2A1A0 ; B = B3B2B1B0

xi=AiBi+AiBi for i = 0, 1, 2, 3

(A = B) = x3x2x1x0

36
 Magnitude comparator
We inspect the relative
magnitudes of pairs of MSB. If
equal, we compare the next
lower significant pair of digits
until a pair of unequal digits is
reached.

If the corresponding digit of A is

1 and that of B is 0, we conclude
that A>B.
(A>B)=
A3B3+x3A2B2+x3x2A1B1+x3x2x1A0B
0
(A<B)=
A3B3+x3A2B2+x3x2A1B1+x3x2x1A0B 37

0
Inequality
Many IC comparators provide additional
outputs that indicate which of the two binary
numbers being compared is the larger.
Inequality
To determine an inequality of
binary numbers A and B, you
first examine the highest-order
bit in each number:
If A3=1 and B3=0 number A is
greater than number B
If A3=0 and B3=1 number A is
less than number B
If A3=B3 you must examine the
next lower bit position for an
equality
IC 74HC85
 1100 1011
1100 1010
8-bit magnitude comparator
Decoders
Decoders
A decoder detects the presence of a
specified combination of bits (code) on its
inputs and indicates the presence of that
code by a specified output level.
In its general form, a decoder has n input lines to
handle n bits and forms one to 2n output lines to
indicate the presence of one or more n-bit
combinations.
The Basic Binary Decoder
Suppose we need to determine when a
binary 1001 occurs on the inputs of a digital
ckt.
A variation of the standard decoder

The decoders weve seen so far are active-high

EN S1 S 0 Q0 Q 1 Q2 Q3
decoders.
0 x x 0 0 0 0
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
1 1 1 0 0 0 1

G A B Y0 Y1 Y2 Y3
1 x x 1 1 1 1
0 0 0 0 1 1 1
0 0 1 1 0 1 1
0 1 0 1 1 0 1
0 1 1 1 1 1 0

An active-low decoder is the same thing, but with

an inverted EN input and
49 inverted outputs
Complete 74x139 Decoder

50
 3-to-8 decoder
Larger decoders are similar. Here
is a 3-to-8 decoder
A truth table (without EN) is below
Output equations are at the bottom
right

Again, only one output is true for

any input combination
S2 S1 S0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q0 = S2 S1 S0
0 0 0 1 0 0 0 0 0 0 0 Q1 = S2 S1 S0
0 0 1 0 1 0 0 0 0 0 0 Q2 = S2 S1 S0
0 1 0 0 0 1 0 0 0 0 0 Q3 = S2 S1 S0
0 1 1 0 0 0 1 0 0 0 0 Q4 = S2 S1 S0
1 0 0 0 0 0 0 1 0 0 0 Q5 = S2 S1 S0
1 0 1 0 0 0 0 0 1 0 0 Q6 = S2 S1 S0
1 1 0 0 0 0 0 0 0 1 0 Q7 = S2 S1 S0
1 1 1 0 0 0 0 0 510 0 1
74x138 3-to-8 Active-Low Decoder

52
Cascading - 3-to-8 Active-High Decoder

You can use enable inputs to string decoders

together. Heres a 3-to-8
decoder constructed from two 2-to-4
decoders:

S2 S1 S0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0
53 0 0 0 0 1
Cascading - 4-to-16 Active-Low Decoder

54
So what good is a decoder?
Do the truth table and equations look familiar?

S
1 S
0 Q
0 Q
1 Q
2 Q
3
Q0 = S1 S0
0 0 1 0 0 0 Q1 = S1 S0
0 1 0 1 0 0 Q2 = S1 S0
1 0 0 0 1 0 Q3 = S1 S0
1 1 0 0 0 1

Decoders are sometimes called minterm generators

For each of the input combinations, exactly one output is true

Each output equation contains all of the input variables
These properties hold for all sizes of decoders

Arbitrary functions can be implemented with decoders. If a sum of

minterms equation for a function is given, a decoder (a minterm generator)
is used to implement that function
55
Design example: Addition
Lets make a circuit that adds three 1-bit inputs X, Y and Z

We will need two bits to represent the total; lets call them C and S, for
carry and sum. Note that C and S are two separate functions of the
same inputs X, Y and Z

Here are a truth table and sum-of-minterms equations for C and S

X Y Z C S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
C(X,Y,Z) = m(3,5,6,7)
0 + 1 + 1 = 10 0 1 1 1 0
1 0 0 0 1 S(X,Y,Z) = m(1,2,4,7)
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1 1 + 1 + 1 = 11

56
Decoder-based Adder
3-to-8 decoders implement C(X,Y,Z) = m(3,5,6,7) and S(X,Y,Z) =
m(1,2,4,7)

57
Active-Low Decoders
The output equations for an active-low decoder are mysteriously similar,
yet somehow different

Q3 = (S1 S0) = S1 + S0
Q2 = (S1 S0) = S1 + S0
Q1 = (S1 S0) = S1 + S0
Q0 = (S1 S0) = S1 + S0

It turns out that active-low decoders generate maxterms

So we can use active-low decoders to implement arbitrary functions too,

but as a product of maxterms, i.e., f(x,y,z) = M(4,5,7)

58
The 4-Bit Decoder
In order to decode all possible combinations
of four bits, 16 decoding gates are required
(24=16).
This type of decoder is commonly called
either:
A 4-line-to-16-line decoder, or
A 1-of-16 decoder
Decoding functions and truth table for a 4-
line-to-16-line decoder with active-LOW
outputs see the next slide.
The 4-Bit Decoder
The 4-Bit Decoder 74HC154: 1-of-16 decoder
Enable function
There is an enable function,
which is implemented with a
NOR gate used as negative AND.
A low level on each chip select
line CS1 and CS2 is required in
order to make the enable gate
output high.
Problem
INPUT AND OUTPUT SELECTION IN COMPUTERS
The BCD-to-Decimal Decoder
The BCD-to-
decimal
converts each
BCD code into
one of ten
possible
decimal digit
indications.
Called 4-
line-to-10-line
decoder or 1-
of-10 decoder
The BCD-to-Decimal Decoder
The BCD-to-7-Segment
Decoder
The BCD-to-7-
segment decoder
accepts the BCD
code on its inputs and
provides outputs to
drive 7-segment
display devices to
produce a decimal
readout.
BCD to 7-Segment
Decoder/Driver
The BCD-to-7-Segment
Decoder (The Application)
Summary of Decoders
A n-to-2n decoder generates the minterms of an n-variable function

As such, decoders can be used to implement arbitrary functions

Later on well see other uses for decoders too

Some variations of the basic decoder include:

Adding an enable input

Using active-low inputs and outputs to generate maxterms

We also talked about:

Applying our circuit analysis and design techniques to understand and

work with decoders
Using block symbols to encapsulate common circuits like decoders
Building larger decoders from smaller ones
71
Encoders
Binary Encoders

An encoder is a digital function that performs

the inverse operation
of a decoder

Only one input can have the

value of 1 at any given time

73
Octal-to-Binary Encoder

This encoder has eight inputs, one for each of

the octal digits.
Three outputs that generate the corresponding
D7
binary number. D6
A2
D5
D4
D3
Encoder A1
D2
A0
D1
D0

74
Octal-to-Binary Encoder

A0= D1 + D3 + D5 + D7,
A2= D4 + D5 + D6 + D7
A1= D2 + D3 + D6 + D7
75
Priority Encoder

A priority encoder is a combinational circuit that

implements a priority
function

More than one input Code of highest priority

lines are asserted line asserted

76
4-Input Priority Encoder

77
4-Input Priority Encoder

78
4-Input Priority Encoder

79
74x148 8-input priority encoder

80
Cascaded Priority Encoders

81
Encoders
An encoder is a combinational logic ckt that
essentially performs a reverse decoder
function.
An encoder accepts an active level on one of
its inputs representing a digit, such as a
decimal or octal digit, and converts it to a
coded output such as BCD or binary.
Encoders can also be devised to encode
various symbols and alphabetic characters.
The Decimal-to-BCD Encoder
It has 10 inputs
and 4 outputs
corresponding
to the BCD
code.
A3 = 8+9
A2 = 4+5+6+7
A1 = 2+3+6+7
A0 = 1+3+5+7+9
The Decimal-to-BCD Encoder

NOTE: A 0-digit input is not needed because the

BCD outputs are all LOW when there are no HIGH
input.
The Decimal-to-BCD Encoder
(The Application)
Code Converters
 Code Converters
Binary-to-gray & gray-to-binary conversion

1 1 0 1--G
1 0 0 1-----binary
1 0 0 1---B
1 1 0 1 gray
Keyboard encoder
7-segment Code decoder
Multiplexers
DATA SELECTION
Multiplexers (Data Selectors)
A MUX is a device that allows digital
information from several sources to be routed
onto a single line for data transmission over
that line to a common destination.
The basic MUX has several data-input lines
and a single output line.
It also has data-select inputs, which permit
digital data on any one of the inputs to be
switched to the output line.
Multiplexers (Data Selectors)
Multiplexers (Data Selectors)
Multiplexers (Data Selectors)
Multiplexers
Multiplexers, or muxes, are used to choose between resources

A real-life example: in the old days before networking, several computers

could share one printer through the use of a switch.

97
Multiplexers
A n-to-1 multiplexer sends one of n input lines to
a single output line
A multiplexer has two sets of inputs:
n data input lines
s=log2n select lines, to pick one of the n data inputs

98
2-to-1 Mux
The select bit S controls which of the data bits D0-D1
is chosen: S D1 D0 Q
0 0 0 0
0 0 1 1
If S=0, then D0 is the output (Q=D0).
0 1 0 0
If S=1, then D1 is the output (Q=D1). 0 1 1 1
1 0 0 0
Q = S D0 + S D1
1 0 1 0
1 1 0 1
1 1 1 1

Here is another kind of abbreviated truth table

S Q
0 D0
Input variables appear in the output column
1 D1
This table implies that when S=0, the output
Q=D0, and when S=1 the output Q=D1
This is a pretty close match to the equation
99
2-to-1 Mux

100
74x157 Quad 2-to-1 Mux

101
4-to-1 Mux

Y= (S1S0) I0 + (S1S0) I1 + (S1S0) I2 + (S1S0) I3

Decoder

102
4-to-1 Mux

103
Quad 4-to-1 Mux

104
74x151 8-to-1 Multiplexer

105
74x151 8-to-1 Multiplexer

106
Expanding Multiplexers

107
Implementing functions with multiplexers
Muxes can be used to implement arbitrary functions

One way to implement a function of n variables is to use an 2^n-to-1 mux:

For each minterm mi of the function, connect 1 to mux data input Di.
Each data input corresponds to one row of the truth table
Connect the functions input variables to the mux select inputs. These
are used to indicate a particular input combination

For example, lets look at f(x,y,z) = m(1,2,6,7).

x y z f
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1 108
A more efficient way
We can actually implement f(x,y,z) = m(1,2,6,7) with
just a 4-to-1 mux, instead of an 8-to-1 x y z f
0 0 0 0
0 0 1 1
Step 1: Find the truth table for the function, and
0 1 0 1
group the rows into pairs. Within each pair of rows, 0 1 1 0
x and y are the same, so f is a function of z only. 1 0 0 0
1 0 1 0
When xy=00, f=z
When xy=01, f=z
1 1 0 1
When xy=10, f=0
1 1 1 1
When xy=11, f=1

Step 2: Connect the first two input variables of the

truth table (here, x and y) to the select bits S1 S0
of the 4-to-1 mux.

Step 3: Connect the equations above for f(z) to the

data inputs D0-D3.
109
adder
Lets implement the adder carry function, C(X,Y,Z), with muxes

There are three inputs, so well need a 4-to-1 mux

The basic setup is to connect two of the input variables (usually the first
two in the truth table) to the mux select inputs
X Y Z C
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
With S1=X and S0=Y, then
1 1 1 1
Q=XYD0 + XYD1 + XYD2 + XYD3

110
Multiplexer-based carry
We can set the multiplexer data inputs D0-D3,
by fixing X and Y and
finding
X Y Z equations
C for C in terms of just Z.
0 0 0 0
When XY=00, C=0
0 0 1 0
0 1 0 0
When XY=01, C=Z
0 1 1 1
1 0 0 0
When XY=10, C=Z
1 0 1 1
1 1 0 1
1 1 1 1 When XY=11, C=1
C = X Y D0 + X Y D1 + X Y D2 + X Y D3
= X Y 0 + X Y Z + X Y Z + X Y 1
= X Y Z + X Y Z + XY
= m(3,5,6,7)

111
Multiplexer-based sum
Heres the same thing, but for the sum function
S(X,Y,Z)
X Y Z S
0 0 0 0
When XY=00, S=Z
0 0 1 1
0 1 0 1
When XY=01, S=Z
0 1 1 0
1 0 0 1 When XY=10, S=Z
1 0 1 0
1 1 0 0 When XY=11, S=Z
1 1 1 1
S = X Y D0 + X Y D1 + X Y D2 + X Y D3
= X Y Z + X Y Z + X Y Z + X Y Z
= m(1,2,4,7)

112
Summary of Muxes

A n-to-1 multiplexer routes one of n input lines to a single output line

Just like decoders,

Muxes are common enough to be supplied as stand-alone devices for

use in modular designs.
Muxes can implement arbitrary functions

We saw some variations of the standard multiplexer:

Smaller muxes can be combined to produce larger ones

We can add active-low or active-high enable inputs

As always, we use truth tables and Boolean algebra to analyze things

113
74HC157A (2:1 Mux)
Quad 2 Input data selector
74LS151 (8:1 Mux)
Problem
7-segment display multiplexer:Application example
Demultiplexers
Demultiplexers
A DEMUX basically
reverses the MUX
function.
It takes digital
information from one
line and distributes it to
a given number of
output lines.
It also known as data
distributor.
Demultiplexer
74HC138 3-t0-8 line decoder as
de-mux
74HC154 DECODER AS DE-MUX
PARITY GENERATORS
74LS280 9-bit parity
generator/checker
Data transmission system with error detection
8-Bit words with correct and
incorrect parity