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Semester 1
Power Supply
Lecturer: Javier Sebastin
Systems
Outline
2
Electrical Energy Universidad
Conversion and de Oviedo
Power Systems
3
Outline
4
Review of the basic structure of low-power MOSFETs.
Structure
Name
Ohmic contact Metal
Metal
SiO2 S G D
S G D Oxide
Semiconductor
N+ N+
P-
+
D
Substrate Schematic
symbol
Schematic D (Drain) G
symbol
S
Substrate
P-channel
G (Gate) enhancement MOSFET
S (source) N-channel
enhancement MOSFET 5
Review of the operation of low-power MOSFETs (I).
G
S D
++ ++ Depletion layer
(space charge)
- - - -
+ + + +
N+ N+
V1
P-
+
Substrate
G
S D A thin layer containing
+++
++ ++
+++ mobile electrons (minority
carriers) is induced
N+ - - - - N+ V2 > V 1
P- - -
+
Substrate 6
Review of the operation of low-power MOSFETs (II).
When the electron concentration in the new thin layer of electrons is the same
as the hole concentration in the substrate, we say that the inversion process has
started.
The gate voltage corresponding to this situation is the threshold voltage, VTH.
It should be noted that the inversion layer is like a new N-type region artificially
created by the gate voltage.
7
Review of the operation of low-power MOSFETs (III).
S G D
Inversion layer when the
+++++ +++++
voltage between gate and
substrate is higher than VTH. - - - - - -
N+ - - - - N+
P- V4 > V TH
vDS iD P
Substrate
G
S +++++ +++++ D Now, we connect terminal source
to terminal substrate.
vGS
N+ - - - - - - N+ Moreover, we connect a voltage
- - - - source between terminals drain and
P-
source.
How is the drain current iD now?
Substrate
8
Review of the operation of low-power MOSFETs (IV).
S G D S G D
N+ N+ N+ N+
P- P-
Substrate Substrate
iD [mA]
iD Load line
4 vGS = 4.5V
2.5kW
vGS = 4V
D +
2 vGS = 3.5V
G
vDS
- 10V vGS = 3V
+ S
vGS vGS = 2.5V
- 0 12
4 8 vDS [V]
vGS < VTH = 2V
VGS = 0V < 2.5V < 3V < 3.5V < 4V < 4.5V
Resistive behaviour
Open-circuit behaviour 11
Review of the operation of low-power MOSFETs (VII)
Parasitic diode.
S G D
D
N+ N+
P- G
S
+
Substrate
N- P
N-
Body
N+ Body
N+
Drain
V-groove MOS (VMOS) Drain
Double diffused MOSFET (DMOS) 13
Internal structure of power MOSFETs (II).
Other structures (I):
Gate Gate
Source-body
Source Source
connection
N+
N+ P P
N- N-
Body N+ Body
N+
Drain Drain
MOSFET with trench MOSFET with extending
gate (UMOSFET) trench gate (EXTFET)
15
Internal structure of power MOSFETs (IV).
Tridimensional structure of a DMOS:
Gate
Source
Drain
Drift region
N+ Body
N+
P
N-
N+
16
Packages for power MOSFETs (I).
Packages are similar to those of power diodes (except axial leaded
through-hole packages).
There are many different packages.
Examples: 60V MOSFETs.
18
Information given by the manufacturers.
Static characteristics:
- Drain-source breakdown voltage.
- Maximum drain current.
- Drain-source on-state resistance.
- Gate threshold voltage.
- Maximum gate to source voltage.
Dynamic characteristics:
- Parasitic capacitances.
19
Drain-source breakdown voltage, V(BR)DSS.
G
S V(BR)DSS
20
Maximum drain current.
Manufacturers provide two different values (at least) :
- Maximum continuous drain current, ID.
- Maximum pulse drain current, IDM.
21
Drain-source on-state resistance, RDS(ON) (I).
23
Drain-source on-state resistance, RDS(ON) (III).
Comparing different devices with a given value of ID, the value of RDS(on)
increases with V(BR)DSS.
24
Drain-source on-state resistance, RDS(ON) (IV).
The use of new internal structures (such as charge coupled PN super-junction in the
drift region) has improved the value of RDS(ON) in devices in the range of 600-1000 V.
Year 1984
Year 2000
25
Gate threshold voltage, VGS(TO) (I).
ID = 1 mA
Manufacturers define VGS(TO) with the gate terminal
connected to the drain terminal and at a specific value D
of ID (e.g., 0.25 mA or 1 mA)
G
Standard values of VGS(TO) are in the range of 2-4 V. S VGS(TO)
26
Gate threshold voltage, VGS(TO) (II).
VGS(TO) depends on the temperature:
27
Maximum gate to source voltage, VGS.
Frequently, this value is 20V.
28
Parasitic capacitances in power MOSFETs (I).
Power MOSFETs are faster than other power devices (such as bipolar
transistors, IGBTs, thyristors, etc.).
This is because MOSFETs are unipolar devices (no minority carriers are
stored at the edges of PN junctions).
The switching speed is limited by parasitic capacitances.
Three parasitic capacitances should be taken into account:
- Cgs, which is a quite linear capacitance.
- Cds, which is a non-linear capacitance. D
Cdg
- Cdg, Miller capacitance, which is also a non-
linear capacitance.
G Cds
S
Cgs
29
Parasitic capacitances in power MOSFETs (II).
D D
Cdg Cdg
Coss
G Cds Cds
S G
Ciss S
Cgs Cgs
30
Parasitic capacitances in power MOSFETs (III).
31
Switching process in power MOSFETs (I).
IL
Cdg
Cds V2
V1 R
Cgs
32
Switching process in power MOSFETs (II).
Starting situation:
- The power transistor is off and power diode is on.
- Therefore: vDG = V2, vDS = V2 and vGS = 0.
iDT = 0 and iD = IL.
- From this situation, the mechanical
switch changes from position B to A. IL
iD
vDG
+ iDT
Cdg + +
- +
-
A - vDS V2
V1 R + Cds -
B
vGS Cgs
- 33
Switching process in power MOSFETs (III).
iDT = 0 while vGS < VGS(TO)
vGS
BA vDS = V2 while iDT < IL (the diode is on).
VGS(TO)
This slope depends on R, Cgs and Cdg.
vDS
V2
IL
IL iDT iD
vDG
+ iDT
Cdg
- + + +
A - - vDS V2
V1 R + + Cds -
B
vGS -
Cgs
- 34
Switching process in power MOSFETs (IV).
The current provided by V1 through R is
vGS mainly used to discharge Cdg almost no
BA current is used to charge Cgs vGS = constant.
VGS(TO)
As a consequence, the Miller plateau appears.
vDS
IL
iDT IL
vDG
+ iDT
Cdg
- + + +
A - - vDS V2
V1 R + + Cds -
B
vGS -
Cgs
- 35
Switching process in power MOSFETs (V).
Cgs y Cdg complete the charging process.
vGS V1
BA
VGS(TO)
The time constant depends on
vDS R, Cgs and Cdg.
IL
iDT IL
vDG
+ iDT
Cdg -
+
- +
A vDS V2
V1 R + + Cds -
B
vGS -
Cgs
- 36
Switching process in power MOSFETs (VI).
iDT
iDT IL
Cdg + + + V2
t0 t1 t2 t3
-
PVI - vDS
+ + Cgs Cds -
vGS -
- 37
Switching process in power MOSFETs (VII).
iDT = IL
iDT IL
Cdg + + +
t0 t1 t2 t3 IL
- -
PVI vDS
+ + Cgs Cds -
vGS -
- 38
Switching process in power MOSFETs (VIII).
Cdg + + +
t0 t1 t2 t3 IL
- -
PVI vDS
+ + Cgs Cds -
vGS -
- 39
Switching process in power MOSFETs (IX).
Year 2000
41
Power losses in power MOSFETs (I).
Static losses:
- Reverse losses negligible in practice due to the low value
of the drain current at zero gate voltage, IDSS.
Driving losses.
42
Power losses in power MOSFETs (II).
vGS
vDS
PMOS_cond = RDS(on)ID_RMS2
Conduction
losses Woff
43
Power losses in power MOSFETs (III).
Driving losses. iV1
vGS
V1 R
Qgd
iV1 PV1 = V1QgfS Equivalent circuit
Qgs iV1
t0 t2 t3 V1
Qg
It should be noted that for a given MOSFET, RB
the switching times decrease when R decreases,
thus allowing higher values of iV1.
Moreover, the lower the switching times, the Actual circuit to have
lower the switching losses. low R equivalent values
44
The parasitic diode in power MOSFETs (I).
IRF 540
G
S
45
The parasitic diode in power MOSFETs (II).
Case of a high voltage MOSFET structure (e.g., charge coupled PN
super-junction in the drift region).
46