Microcontrollers Lab

New CCS project

#include <msp430.h>

/*
* main.c
*/
int main(void) {
WDTCTL = WDTPW | WDTHOLD;// Stop
//watchdog timer

return 0;
}
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 Why return 0
#include <msp430.h>

/*
* main.c
*/
int main(void) {
WDTCTL = WDTPW | WDTHOLD;// Stop
watchdog timer

return 0;
}
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 Bow Bow watch dog
WDTCTL = WDTPW | WDTHOLD;// Stop watchdog timer
Main function of a watch dog timer is to reset the microcontroller when it gets
trapped in an infinite loop or experience a software fault .It is basically a hardware
timer which counts up and resets the controller after the specified time has
passed.During normal operation,the running program has to periodically clear the
counter so that it doesnt reset the microcontroller .When the program gets stuck
in a software loop,WDT is not cleared at the proper time as a result it counts up
and resets the controller.
in all programs, first thing to do is to disable the WDT using the WDTHOLD bit.
WDTCTL = WDTPW + WDTHOLD
Since it is the duty of WDT to protect against software glitches,WDT itself is protected
by an internal password .if we tried to read or write to the watch dog control
register (WDTCTL) without the password ,the microcontroller will get
reseted.The password is 0x5A for writing into WDTCTL.The password is defined in
the header file as WDTPW.It is possible to intentionally reset the microcontroller
by writing into WDTCTL without WDTPW.
WDTCTL |= WDTHOLD; //Will reset MSP430,WDTIFG flag is set

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 Delays.
volatile int i=0;
//type-1
For(i = 0; i < 0x600; i++);
Or
For(i = 0; i < 600; i++);

//type-2
__delay_cycles(25000);
//Call delay
Main (){
DELAY(10);}
Void DELAY (){
For(i = 0; i < 600; i++);
} 5
MSP 430 ports

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 Port selection and direction
2 ports (p1.0 to p1.7 and p2.0 to p2.7)
The features of PxIN , PxOUT, PxDIR ,PxSEL , PxSEL2 :
PxIN is for reading the input bits of pins that are in Digital
I/O mode. Ex: P1IN; P2IN;
PxOUT is for setting the value of pins that are in Digital I/O
mode. P1OUT = 0X08; P2OUT = 0X08;
PxDIR is for setting the direction of pins that are in Digital
I/O mode. P1DIR= 0X01; P2DIR = 0X01;
PxSEL1 and PxSEL2 are used to set the function of the pins
to 1 of 3 different modes (Digital I/O, Peripheral 1, or
Peripheral 2)
PxREN sets whether or not a pullup/pulldown resistor is
enabled on inputs in Digital I/O mode. P1REN= 0X08;
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Timers and Clocks and PWM
A clock in embedded electronics is what controls how fast
the processor ticks. The MSP430 has multiple clocks
which can used for the peripherals and the CPU.
MCLK is the master clock for the CPU.
SMCLK is the submain clock. Both of these can be selected
for use in the peripherals such as an ADC or Timer.
Why so many clocks? Power efficiency. Different clocks are
turned off in different low power modes; for example
LPM0 disables MCLK and the CPU but leaves SMCLK
running so the peripherals hooked up to it can continue to
run. These clocks can be generated from a number of
different sources and can also be divided down from the
clock input.
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There are a few things are required to know before start
coding. The Timer counts clock ticks, in reality it can be that
simple, but it does not need to be. For example the Timer can
count up to a certain number or count up then down. The
different functional modes are as follows
1. Up Mode - the Timer repeatedly counts from 0 to the value
set in register TACCR0
2. Continuous Mode - the Timer repeatedly counts from 0 to
0xFFFF
3. Up-Down Mode - the Timer repeatedly counts from 0 to
TACCR0 and back down to 0

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As a programmer Up Mode the best, so it will be using that to
build the PWM library. So you can set up an interrupt for
when the timer gets to TACCR0 or TACCR1, or you can toggle
one of the timer.
Setting up the Timer
CCR0 = 1000-1; // PWM Period
CCTL1 = OUTMOD_7; // CCR1 reset/set
CCR1 = 250; // CCR1 PWM duty cycle (25%)
Remember, the timer depends on the clock frequency it is running on. So if you have a
1MHz SMCLK and want a PWM frequency output of 100kHz, CCR0 will have to count
up to 10 leaving only 9 values for CCR1 to toggle the clock at. This limits the resolution
the duty cycle can have. The default DCO (digital controlled oscillator) which is the
source of the MCLK and in this case the SMCLK is approximately 1.1MHz, making the
PWM frequency about 1.1kHz with a duty cycle of 25%.
Setting CCTL1 = OUTMOD_7 does two things, one of which might not be so
apparent. OUTMOD_7 is the Reset/Set option,which means "The output is
reset when the timer counts to the TACCRx value. It is set when the timer
counts to the TACCR0 value" (From User Guide). This means that when the
timer hits CCR0 it starts counting over AND sets the PWM output to 1; this 10also
means that when the timer hits CCR1 it will set the PWM output to 0.
For this PWM program we will be using SMCLK
and Up Mode for the timer. Now we have to set
which clock and which mode the Timer is going
to use. The following line of code sets the clock
and the mode of operation.
TACTL = TASSEL_2 + MC_1; // Chooses SMCLK,
and Up Mode.
In this register you can also set the interrupts to
be triggered but we will not be doing that here
since the PWM pin will be toggled without
needing an interrupt.
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Timer control register(TACTL)

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using __bis_SR_register() to set interrupts and/or go
to LPM. In users guide, I observed that this may also
be done by setting Status Register (SR). For eg to set
to LPM0 with interrupts on,_BIS_SR(LPM0_bits); can
be used.
6 Low Power modes

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 ADC
Analog measurements with the MSP430
Comparator, ADC10, ADC12, SD16, SD16_A
The ADC10 module supports fast, 10-bit analog-to-digital conversions.
200-kbps maximum conversion rate
Sample-and-hold with programmable sample periods
Conversion initiation by software or Timer_A
Software selectable on-chip reference voltage generation (1.5 V or 2.5
V)
Software selectable internal or external reference
Up to eight external input channels
Selectable conversion clock source
Single-channel, repeated single-channel, sequence, and repeated
sequence conversion modes
ADC core and reference voltage can be powered down separately
Data transfer controller for automatic storage of conversion results

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The ADC10 is turned on with the ADC10ON bit.
the built-in reference is turned on with the REFON bit,
the settling timing noted in the data sheet must be observed before starting a
conversion. Otherwise, the results will be false until the reference settles. Once all
internal and external references have settled, no additional settling time is
required when selecting or changing the conversion range for each channel.

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ADC operation steps
Here are the steps you must take to perform an A/D operation:
Define the port pins that will be used as analog input channels. (INCHx)
Select a clock source for the conversion operation, or set up the Watchdog
timer.(ADC10SSELx)
Select a conversion mode (e.g., continuous, one-time conversion, etc). (CONSEQx)
Select the reference voltage VREF. (SREFx)
Select the sample-and-hold time for the conversion. (ADC10SHTx)
Enable the corresponding chosen pin for analog input.
Switch ON the ADC functionality. (ADC10ON)
Enable ADC (take a reading)
Read the value after conversion; set a program variable to the reading.

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