Fundamental

Fundamental Electron
Electron
icsBJT,
icsBJT, CMOS
CMOS

Reference: Thomas L. Floyd, Electronics Fundamentals: Circuits,

Devices, and Applications, Pearson Education Inc
 Reference Books

Electronics Fundamentals: Thomas L. Pearson

1 Circuits, Devices, and Floyd Education
Applications Inc.
Electronic circuit analysis and Donald A , Irwin
2 Design Neaman

Microelectronics:DIGITAL AND Jacob Millman, McGraw-

3 ANALOG CIRCUITS AND Arvin Grabel Hill
SYSTEMS
Microelectronic Circuits Sedra & Smith Oxford
4 Universit
y Press
 Objectives
The History of VLSI

Describe the basic structure and operation of bipolar

junction transistors (BJT)

Describe the basic structure and operation of

MOSFETs

Describe the basic structure and operation of CMOS

 The History of VLSI
IC(Integrated Circuits) History Evolution
vacuum tube,
single transistor,
IC (Integrated Circuits)
SSI, MSI, LSI, VLSI, SoC
 The History of VLSI
1926Lilienfeld proposed FET
1947Brattin, Bardin, Schockley
proposed BJT from Bell Lab.
1957TI Kilby proposed the first IC
1960 Hoerni invent the planar process
70sIC composed mainly by pMOS and
BJT
 The History of VLSI
80sIC composed mainly by nMOS
and BJT
90sIC composed mainly by CMOS
and BiCMOS
1995NEC, AT&T, Phillips proposed
SOC
 The evolution of IC technique
1947 1950 1961 1966 1971 1980 1985 1990

Trans Singl SSI MSI LSI VLSI ULSI GSI

istor e
comp
onent
Logic 100 1000 20000 > >
Gate ---- ---- 10 ~ ~ ~ 500,00 10,000,
count 1000 20000 500,00 0 000
0
Produ- 8bit 16/32b

ction ----
its SOC
ROM

RAM
 Moores Law plot
The transistor count in an IC would double every 18
momths
Main Families in Digital Logic
1. TTL(implemented by BJT)big
area, high consumption, high speed
2. MOS small area, low consumption,
low speed
3. BiCMOS speed near TTL, area
near MOS, hard manufacture
 Architecture of BJTs
The bipolar junction transistor (BJT) is
constructed with three doped semiconductor
regions separated by two pn junctions
Regions are called emitter, base and collector
 Architecture of BJTs
There are two types of BJTs, the npn and pnp
The two junctions are termed the base-emitter junction and
the base-collector junction
The term bipolar refers to the use of both holes and
electrons as charge carriers in the transistor structure
In order for the transistor to operate properly, the two
junctions must have the correct dc bias voltages
the base-emitter (BE) junction is forward biased(>=0.7V
for Si, >=0.3V for Ge)
the base-collector (BC) junction is reverse biased
FIGURE Transistor symbols.

Thomas L. Floyd Copyright 2004 by Pearson Education,

Electronics Fundamentals, 6e Inc.
Electric Circuit Fundamentals, 6e Upper Saddle River, New Jersey 07458
Basic circuits of BJT
 Operation of BJTs
BJT will operates in one of following
four region
Cutoff region (for digital circuit)
Saturation region (for digital circuit)
Linear (active) region (to be an amplifier)
Breakdown region (always be a disaster)
Operation of BJTs
 DC Analysis of BJTs
Transistor Currents:
IE = I C + I B
alpha (DC)
IC = DCIE
beta (DC)
IC = DCIB
DC typically has a value between 20 and 200
DC Analysis of BJTs
DC voltages for the biased transistor:
Collector voltage
VC = VCC - ICRC
Base voltage
VB = VE + VBE

for silicon transistors, VBE = 0.7 V

for germanium transistors, VBE = 0.3 V
 Q-point
The base current, IB, is
established by the
base bias
The point at which the
base current curve
intersects the dc load
line is the quiescent or
Q-point for the circuit
Q-point
 DC Analysis of BJTs
The voltage divider
biasing is widely
used
Input resistance is:
RIN DCRE
The base voltage is
approximately:
VB VCCR2/(R1+R2)
 BJT as an amplifier

Class A Amplifiers

Class B Amplifiers
 BJT Class A Amplifiers
In a class A amplifier, the transistor conducts for
the full cycle of the input signal (360)
used in low-power applications
The transistor is operated in the active region,
between saturation and cutoff
saturation is when both junctions are forward biased
the transistor is in cutoff when IB = 0
The load line is drawn on the collector curves
between saturation and cutoff
BJT Class A Amplifiers
 BJT Class A Amplifiers
Three biasing mode for class A
amplifiers
common-emitter (CE) amplifier
common-collector (CC) amplifier
common-base (CB) amplifier
 BJT Class A Amplifiers
A common-emitter (CE) amplifier
capacitors are used for coupling ac without disturbing
dc levels
 BJT Class A Amplifiers
A common-collector (CC) amplifier
voltage gain is approximately 1, but current gain is
greater than 1
BJT Class A Amplifiers
The third configuration is the common-
base (CB)
the base is the grounded (common) terminal
the input signal is applied to the emitter
output signal is taken off the collector
output is in-phase with the input
voltage gain is greater than 1
current gain is always less than 1
 BJT Class B Amplifiers
When an amplifier is biased such that it operates in
the linear region for 180 of the input cycle and is in
cutoff for 180, it is a class B amplifier
A class B amplifier is more efficient than a class A
In order to get a linear reproduction of the input
waveform, the class B amplifier is configured in a
push-pull arrangement
The transistors in a class B amplifier must be
biased above cutoff to eliminate crossover
distortion
BJT Class B Amplifiers
 The BJT as a Switch
When used as an electronic switch, a transistor
normally is operated alternately in cutoff and
saturation
A transistor is in cutoff when the base-emitter
junction is not forward-biased. V CE is approximately
equal to VCC
When the base-emitter junction is forward-biased
and there is enough base current to produce a
maximum collector current, the transistor is
saturated
The BJT as a Switch
An example -- NOR
Architecture of MOS Field-
Effect Transistors (FETs)
The metal-oxide semiconductor field-
effect transistor (MOSFET) : the gate is
insulated from the channel by a silicon
dioxide (SiO2) layer
Architecture of MOS Field-
Effect Transistors (FETs)
Two types of MOSFETs
depletion type (D-MOSFETs) have a physical
channel between Drain and Source, with no
voltage applied to the Gate
enhancement type (E-MOSFETs) have no
physical Drain-Source channel
Architecture of MOS Field-
Effect Transistors (FETs)
D-MOSFET
Channel may be
enhanced or
restricted by gate
voltage

E-MOSFET
Channel is created by
gate voltage
 Simplified
symbol
Biasing Circuits
 FET Amplifiers
Voltage gain of a FET is determined by the
transconductance (gm) with units of Siemens
(S)
g m = Id / V g
The D-MOSFET may also be zero-biased
The E-MOSFET requires a voltage-divider-bias
All FETs provide extremely high input
resistance
 Principle of MOSFET
for E-MOS (n-channel)
(+)
Principle of MOSFET
for E-MOS (n-channel)
VTN The threshold voltage
Principle of MOSFET
for E-MOS (n-channel)
 Principle of MOSFET
for D-MOS (n-channel)
 Principle of MOSFET
for D-MOS (n-channel)
Voltage-current relations
 p-cnannel MOS
(pMOS)
S G D

+ - -

P+ +++++++ P+
body

n-substrate

All the characteristics are similar to NMOS.

An inverter
Voltage transfer
-- see the time delay
Complementary MOS
(CMOS)

Vss output Vdd Vdd

input

P N N P P N pMOS
in out

p-well nMOS

n-substrate Vss