IES2015-2016

Introduction to Computer Engineering

Lecture 1: Overview
Mr. LENG Por
Gnie Electrique et Energtique
Institute de Technologie du Cambodge

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 Objective: Digital Design Principle
Number systems
Boolean algebra
Switch and CMOS design
Combinational logic
Logic gates
Building blocks: de/mux, de/encoder, shifters,
adder/subtractor, multiplier
Logic minimization
Mixed logic
Sequential logic
Latches, Flip-flops
Counters
State machines: Mealy/Moore machines
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 Objective: Digital Design Principle
Memory and Programmable Devices
Register, RAM, ROM, PLA, PAL
Architectural concept
Instruction set architecture (ISA)
Stored-Program Computer and Sequential Control
(von Neumann architecture)
Datapath
Branches
Processor and Software Convention
MIPS ISA
Procedural calls: Stack
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 Hierarchy of Computation
Programming in Compiler/Assembler/
Problem Algorithm
High-Level Language Linker
s

Instruction Set Architecture (ISA) Binary

Target Machine
Micro-architecture
(one implementation)
System architecture
Functional units/
Building blocks

Gates Level
Design

Transistors Manufacturing

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 Hierarchy of Computation
Programming in Compiler/Assembler/
Problem Algorithm
High-Level Language Linker
s

Instruction Set Architecture (ISA) Binary

Target Machine
Micro-architecture
(one implementation)
System architecture
Functional units/
Building blocks Human Level
System Level
RTL Level
Gates Level
Logic Level
Design
Circuit Level
Silicon Level
Transistors Manufacturing

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 Hierarchy of Computation
Programming in Compiler/Assembler/
Problem Algorithm
High-Level Language Linker
s

Instruction Set Architecture (ISA) Binary

Target Machine
Micro-architecture
(one implementation)
System architecture
Functional units/
Building blocks Human Level
System Level
RTL Level
Gates Level
Logic Level
Design Our Focus in 2030
Circuit Level
Silicon Level
Transistors Manufacturing

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 Zoom-in a System Component

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 90 nm
596 mm2
Moores Law
1.7 billions
Montecito

10 m
13.5mm2
42millions

Exponential growth
2,250

Transistor count will be doubled every 18 months

Gordon Moore, Intel co-founder

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 A Generic Intel-based PC System
Your CPU here

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 Dual-Core Itanium 2 (Montecito)

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 Integrated Circuit Complexity

Source: Intel
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 Minimum Feature Size

12 We are currently at 0.065m (65nm) and moving towards 0.045m

 Average Transistor Price per year

Source: Dataquest
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 Processor Market Segmentation

High Performance
(e.g., Intel 32/64, AMD, Itanium, IBM POWER, BlueGene, Sun T1, etc)

Embedded / low-power
(e.g., ARM, MIPS, Xscale)

Special purpose
(e.g., DSP, NVidia)

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 Analog Signal vs. Digital

So, why Digital?

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 Binary Signals

So, why Binary?

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 Voltage Range of Binary Signals

5.0 Volts

HIGH (1)
HIGH (1) 4.0 Volts

3.0 Volts

2.0 Volts

LOW (0) 1.0 Volts

LOW (0)
0.0 Volts
INPUT OUTPUT

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