Classification of instructions

4-address instructions
3-address instructions
2-address instructions
1-address instructions
0-address instructions

1
Classification of instructions
(continued)

The 4-address instruction

specifies the two source
operands, the destination operand
and the address of the next
instruction
op code destination source 1 source 2 next address

2
Classification of instructions
(continued)

A 3-address instruction specifies

addresses for both operands as
well as the result

op code destination source 1 source 2

3
Classification of instructions
(continued)

A 2-address instruction overwrites

one operand with the result
One field serves two purposes

op code destination source 2

source 1

4
Classification of instructions
(continued)

A 1-address instruction has a

dedicated CPU register, called the
accumulator, to hold one operand
& the result No address is
needed to specify the
accumulator
op code source 2

5
Classification of instructions
(continued)
A 0-address instruction uses a stack
to hold both operands and the result.
Operations are performed between
the value on the top of the stack TOS)
and the second value on the stack
(SOS) and the result is stored on the
TOS
op code
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 Comparison of
instruction formats
As an example assume:
that a single byte is used for the op
code
the size of the memory address space
is 16 Mbytes
a single addressable memory unit is a
byte
Size of operands is 24 bits
Data bus size is 8 bits 7
 Comparison of
instruction formats
(continued)

We will use the following two

parameters to compare the five
instruction formats mentioned before
Code size
Has an effect on the storage requirements
Number of memory accesses
Has an effect on execution time

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 4-address instruction
op code destination source 1 source 2 next address

1 byte 3 bytes 3 bytes 3 bytes 3 bytes

Code size = 1+3+3+3+3 = 13 bytes

No of bytes accessed from memory
13 bytes for instruction fetch +
6 bytes for source operand fetch +
3 bytes for storing destination operand
Total = 22 bytes
9
 3-address instruction
op code destination source 1 source 2

1 byte 3 bytes 3 bytes 3 bytes

Code size = 1+3+3+3 = 10 bytes

No of bytes accessed from memory
10 bytes for instruction fetch +
6 bytes for source operand fetch +
3 bytes for storing destination operand
Total = 19 bytes
10
 2-address instruction
op code destination source 2
source 1

1 byte 3 bytes 3 bytes

Code size = 1+3+3 = 7 bytes

No of bytes accessed from memory
7 bytes for instruction fetch +
6 bytes for source operand fetch +
3 bytes for storing destination operand
Total = 16 bytes
11
 1-address instruction
op code source 2

1 byte 3 bytes

Code size = 1+3= 4 bytes

No of bytes accessed from memory
4 bytes for instruction fetch +
3 bytes for source operand fetch +
0 bytes for storing destination operand
Total = 7 bytes
12
 0-address instruction
op code

1 byte

Code size = 1= 1 bytes

# of bytes accessed from memory
1 bytes for instruction fetch +
6 bytes for source operand fetch +
3 bytes for storing destination operand
Total = 10 bytes
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Summary

14
 Example 2.1 text
expression evaluation a = (b+c)*d - e

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