Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Course Administration
Instructor: Laxmi N. Bhuyan
(bhuyan@cs.ucr.edu) (
http://www.ucr.edu/~bhuyan)
Tel: (951)827-2244 351 Engg. 2
Office Hours: W 3-4.30 or by appt
TA:
E-mail: rhalstea@cs.ucr.edu
Office Hrs: EBU 2 Room 110
Course Administration
Text: Computer Organization and Design: The
Hardware/Software Interface, Patterson and Hennessy, 4th Ed.
Prerequisite:
Assembly Language (CS061) and Digital system (CS120B)
Grade breakdown
Test 1 (Chapters 1 and 2)
Test 2 (Chapter 4)
Test 3 (Chapters 5-7)
Homework Assignments
25%
30%
25%
20%
Historical Perspective
Decade of 70s (Microprocessors)
Programmable Controllers
Single Chip Microprocessors
Personal Computers
KILLER MICROS
Performance Growth In
Perspective
Doubling every 18 months since 1982
Cars travel at 11,000 mph; get 4000 miles/gal
Air Travel LA-NY in 90 seconds (Mach 200)
Wheat yield 20,000 bushels per acre
Memory
DRAM capacity: about 60% per year (4x every 3 years)
Memory speed: about 10% per year
Cost per bit: improves about 25% per year
Disk
capacity: about 60% per year
Main Memory
DRAM capacity: 2x / 2 years; 1000X size in last decade
Cost/bit: improves about 25% per year
Disk
capacity: > 2X in size every 1.5 years
Cost/bit: improves about 60% per year
120X size in last decade
100,000,000
10,000,000
transistors
Moores Law
Pentium
i80486
1,000,000
i80386
i80286
100,000
2X transistors/Chip
Every 1.5 years
i8086
10,000
i8080
CalledMooresLaw:
i4004
1000
1970
1975
1980
1985
Year
1990
1995
2000
1,000,000,000
year
size(Megabit)
100,000,000
0.0625
0.25
1
4
16
64
256
Now 1.4X/yr,
or doubling every
2 years
10,000,000
Bits
1980
1983
1986
1989
1992
1996
2000
1,000,000
100,000
10,000
1,000
1970
1975
1980
1985
1990
Year
1995
2000
1100
1000
900
800
700
600
500
400
300
200
100
0
1.54x/year
87 88 89 90 91 92 93 94 95 96 97
Cost
Reliability
Etc.
Classes of Computers
High performance (supercomputers)
Supercomputers Cray T-90
Massively parallel computers Cray T3E
Balanced cost/performance
Workstations SPARCstations
Servers SGI Origin, UltraSPARC
High-end PCs Pentium quads
Low cost/power
Low-end PCs, laptops, PDAs mobile Pentiums
What is *Computer
Architecture*
Computer Architecture =
Instruction Set Architecture +
Organization +
Hardware +
Software
Hardware
Operating System
Compiler
(Unix;
Assembler Windows 9x)
Processor Memory I/O system
Instruction Set
Architecture
transistors, IC layout
CS 161
Computer Architecture =
Instruction Set Architecture
(ISA)
-
+
Machine Organization
-
Technology
Programming
Languages
Applications
Computer
Architecture
Operating
Systems
Compiler
Machine Organization:
Personal Computer
Processor
(CPU)
(active)
Control
(brain)
Datapath
(brawn)
Computer
Memory
(passive)
(where
programs,
& data
live when
running)
Devices
Input
Output
Keyboard,
Mouse
Disk
(where
programs,
& data
live when
not running)
Display,
Printer
Computer Organization
Interfaces
Hardware Components
Compiler/System View
Building Architect
Construction Engineer
von Neumann
Computer
1944: The First Electronic Computer ENIAC at IAS,
Princeton Univ. (18,000 vacuum tubes)
Stored-Program Concept Storing programs as
numbers by John von Neumann Eckert and
Mauchly worked in engineering the concept.
Idea: A program is written as a sequence of
instructions, represented by binary numbers. The
instructions are stored in the memory just as data.
They are read one by one, decoded and then
executed by the CPU.
Execution Cycle
Instruction
Fetch
Instruction
Decode
Operand
Fetch
Execute
Result
Store
Next
Instruction
software
instruction set
hardware
(ISA)
programmer/compiler view
Realization
(chip)