3-5 Decoders

3-6 Encoders
3-7 Multiplexers

Convert numbers to be
displayed
BCD

to 7-segment
display decoder

Hex

to 7-segment
display decoder

7-Segment Display
Configuration

Common Anode

Requires logic 0 to
light up (ON) a
segment.

Common Cathode

Requires logic 1 to
light up (ON) a
segment.

3-5 DECODERS

n
DECODER

m 2n
Converts binary information, from n coded inputs to
a maximum of 2n outputs

3-5 DECODERS
Functional Specs:
To

generate the 2n (or less) minterms of

input variables.
For each input, 7 outputs are equal
to 0 and only 1 equals to 1.
The output that is 1 represents the
minterm equivalent of the input
number.

Truth Table for 3-to-8-Line

Decoder

3-to-8-Line Decoder

A 2-to-4-Line Decoder

Decoder Expansion

When a certain decoder size id needed,

but only smaller number of sizes is
available.

Combine 2 or more decoders in a hierarchy,

i.e. cascade the smaller decoders to form a
larger decoder size.

Example: A 3-to-8 Decoder

Constructed with Two 2-to-4
Decoders

 Its Operation

The MSB input, A2, functions:

As enable, EN, of one decoder, and

As its complement, N(EN) to the other decoder.
When A2=0,
Top decoder enabled Generates minterms D0
to D3.
Lower decoder disabled Outputs equal to 0.
When A2=1,
Top decoder disabled Outputs equal to 0.
Lower decoder enabled Generates minterms
D4 to D7.

 Enable Input
Very

useful and convenient way to

interconnect 2 or more functional
blocks.

For the purpose of expanding

digital functions into:
Similar functions with more
inputs and outputs.

Exercise
Construct

using:

Four

a 6-to-64-line decoder,

4-to-16-line decoders and one

2-to-4-line decoder.

Combinational Circuit
Implementation of
Decoders
Binary Adder

Implementing a Binary
Adder Using a Decoder
S(X,Y,Z) = m (1, 2, 4, 7)
C(X,Y,Z) = m (3, 5, 6, 7)
3 inputs and 8 minterms

Use a 3-to-8 decoder.

Implementing a Binary Adder

Using a 3-to-8 Decoder

3-6 ENCODERS

m
ENCODER

m 2n

3-6

ENCODERS

Inverse

operation of decoder.
The output lines generate the binary
code corresponding to the input value.
Assume only 1 input has the value of 1
at any given time.
Example:

Octal-to-binary encoder.

Truth Table for Octal-to-Binary

Encoder

Priority Encoder

What about when 2 inputs are 1

at the same time?

Use Priority Encoder

To ensure only one input is encoded.

e.g.
D3 = D6 = 1

Output = 110
(D6 has a higher priority than D3)

Priority Encoder

If 2 or more inputs are equal to 1 at the

same time, the input having the highest
priority is the one encoded.

Example: 4-input Priority Encoder

Use condensed TT (5 rows to represent 16

rows).
V (valid) =1 when 1 or more input is equal to
1.

Condensed Truth Table of Priority

Encoder

X @ output => dont care

X @ input => product term that
is not minterm

Maps for Priority

Encoder

Logic Diagram of a 4-Input

Priority Encoder

3-7 Multiplexers
(Pemultipleks)
Selects

binary information from one

of many input lines and directs the
information to a single output line.

The

selection of an input line is

controlled by a set of variables, i.e.
the selection inputs.
Also called Data Selector.

Mutiplexer (MUX)

4-to-1-Line Multiplexer

 Multiplexer
Also

called MUX.
Resembles a decoder circuit.
2n input lines.
n selection inputs (SEL0, , SELn).
Can be constructed from:

Decoders.
Transmission gates.

4-to-1-Line Multiplexer with

Transmission Gates

 Multiplexer
May

have an Enable, EN, input, to

control its operation.
EN = Inactive Outputs Disabled.
EN = Active Normal Operation.

EN

is useful when using 2 or more

MUXes to obtain a bigger MUX (i.e.
more inputs).

Combine MUXes in parallel with the same

SEL and EN lines.

Quadruple 2-to-1-Line
Multiplexer

Quadruple 2-to-1-Line
Multiplexer

Has ____ number of MUXes.

YO can be selected from either A0 or B0.
Y1- from either A1 or B1, etc.
EN=1,
S=0, all A inputs are passsed to the
outputs.
S=1, all B inputs are passed to the
outputs.
EN=0, all outputs are 0.

Implementing a Boolean
Function with a Multiplexer
A multiplexer is basically a decoder that
includes the OR gate within the block.
To implement a Boolean function of n
variables with a mux having n selection
inputs and 2n data inputs, one for each
minterm.

The minterms are generated in a mux by the

circuit associated with the selection inputs.
Individual minterms can be selected by the
data inputs.

 Implementing a Boolean
Function with a Multiplexer

A more efficient way

To implement a Boolean function of n
variables with a mux having only n-1
selection inputs and 2n-1 data inputs.

Example 1:
F (X,Y,Z) = m (1, 2, 6, 7)

Example 1

 Implementing a Boolean
Function with a Multiplexer
General procedure:
1.
2.
3.

Produce Truth Table for Boolean function.

The first n-1 variables are applied to the
selection inputs of the mux.
The remaining single variable of the
function is used for the data input.

 Implementing a Boolean
Function with a Multiplexer
4.

5.

For each combination of the selection

variables, we evaluate the output as a
function of the last variable, i.e. a 0, 1,
the variable or its complement.
These values are then applied to the data
inputs in the proper order.

Example 2: Implementing a 4Input Function with a Multiplexer

F (A, B, C, D) = m (1, 3, 4, 11, 12, 13, 14,
15)
Implement the function with a mux having
3-selection inputs.

 Example 2

Demultiplexer

Performs the inverse function of a

multiplexer.

Receives information from a single line and

transmits it to one of possible 2n possible
output lines.
The selection is is controlled by the bit
combination of n selection lines.

A demultiplexer is identical to a 2-to-4-line

decoder with enable input.

A decoder with enable input =

A Decoder/Demultiplexer.

1-to-4-Line Demultiplexer

Adders &
Multipliers
To be covered in Lab 3 Preview