UPF:

UPF provides the ability for electronic systems to

be designed with power as a key consideration
early in the process.
Why UPF:

Power Management a big challenge in SoC design.

No existing HDL adequately supports the specification
of power distribution and management

Multi voltage States :

Shutdown:
The power supply of the entire design is cut off when the
circuit is not in use.
Such designs do not require data to be retained in the
registers or latches used in the design

Stand by :
Clock gated standby
Low VDD standby
Scan Based Standby

Low power Techniques:

Power gating:
Temporarily shutting down blocks in a design when the
blocks are not in use.
Reduces the leakage power of the chip.

Isolation:
When the power is shut off, each power domain must be
isolated from rest of the design so that it does not corrupt
the downstream logic.
Power shutdown results in slow output from the power gated
blocks. These output spends significant time at threshold
voltage, causing large crowbar currents in the always on
blocks.

 Retention:
In this technique, retention memory elements are used to
prevent data from being lost in a specific power domain during
power off.
flipflops and latches are used to save state information before
the power is switched off and restore it when the power is turned
back on.

Level shifter:
If two interacting power domains are working with different
voltage levels, then the logic 1 of the one domain may not
be represented as the same unambiguous logic 1 in the
other domain.
So level shifters are inserted in the domain boundary to
shift the voltage level from high to low or vice-versa.

Unified Power Format

Commands
Supply Ports
Main supply to the design
Provides power state and voltage value
create_supply_port VDD_CLUSTER0
create_supply_port VSS_CLUSTER0

Power Domains
a set of design elements that share a common primary
supply set
create_power_domain TOP
create_power_domain CLUSTER0
create_power_domain CLUSTER1

 Power Switches
Circuit breakers to various domains and controls various
components of it.
create_power_switch main_sw \
-domain CLUSTER0 \
-input_supply_port {in VDD_CLUSTER0} \
-output_supply_port {out VDD_O_CLUSTER0} \
-control_port {inst_on inst_on} \
-on_state {state2001 in {!list_on}}

Supply Nets
Wiring between main supply and breaker or switch/ports
create_supply_net net_VDD_CLUSTER0 domain CLUSTER0
connect_supply_net net_VDD_CLUSTER0 ports
VDD_CLUSTER0

 Isolation
set_isolation CLUSTER0_SIG domain CLUSTER0
Set_isolation_control CLUSTER0_SIG domain
CLUSTER0 isolation_signal out_cluster0
-isolation_sense low -location parent

Retention
Set_retention CLUSTER0_ret domain CLUSTER0
retention_power_net VDD -retention_ground_net
VSS
Set_retention_control CLUSTER0_RET domain
CLUSTER0 save_signal {save_net high}
restore_signal {restore_net high}