Introduction to

Microprocessors
Lecture 1

Evolution of Computers
First generation (1939-1954)
vacuum tube
Second generation (1954-1959) transistor
Third generation (1959-1971) - IC
Fourth generation (1971-present) microprocessor

Evolution of Computers
First generation (1939-1954) - vacuum
tube

IBM 650, 1954

Vacuum Tube
Vacuum Tubes is a device that relies on the flow
of electric current through a vacuum. Vacuum
tubes may be used for rectification,
amplification, switching, or similar processing or
creation of electrical signals.

Second generation (1954-1959)

Transistor
Manchester University Experimental Transistor
Computer

Third generation (19591971) - IC

The least expensive general
purpose small computer in 1960s

Fourth generation (1971present) - microprocessor

In 1971, Intel developed 4-bit 4004
chip for calculator applications.
ROM/RAM buffer

Timing

Reset

Control logic
Program
counter

Instruction
decoder
ALU

Reg.

I/O

Refresh
logic
System bus

Block diagram of Intel 4004

4004 chip layout

Introduction to Assembly
Language:
CPU can only work in binary
It can do so at very high speed
Program that consist of 0s and 1s is called machine
language.
The process of working in machine language was
still cumbersome for humans.
Therefore assembly languages were developed
which provided mnemonics for the machine code
instructions, plus other features that made
programing faster

Contd. . .
Assembly language program must be translated
into machine code by a program called assembler.
Assembly language is referred to as a low
language
Because it deals directly with the internal structure
of the CPU.
To program in assembly language you must know
the number of registers and their size and other
details of the CPU

Inside the Processor

There are two concept to execute
the instruction:
Pipelined Execution
Non pipelined Execution

Pipelined Vs non Pipelined

Execution
Non Pipelined e.g 8085
Fetch 1

Exec 1

Fetch 2

Exec 2

Pipelined e.g 8086

Fetch 1

Exec 1
Fetch 2

Exec 2
Fetch 3

Exec 3

Introduction to 8086
8086 Features
16-bit Arithmetic Logic Unit
16-bit data bus
20-bit address bus

8086 Architecture
The 8086 has two parts, the Bus Interface Unit
(BIU) and the Execution Unit (EU).
The BIU fetches instructions, reads and writes
data, and computes the 20-bit address.
The EU decodes and executes the instructions
using the 16-bit ALU.
The BIU contains the following registers:

Contd. . .
IP - the Instruction Pointer
CS - the Code Segment Register
DS - the Data Segment Register
SS - the Stack Segment Register
ES - the Extra Segment Register

Contd. . .
The BIU fetches instructions using the CS and IP,
written CS:IP, to construct the 20-bit address.
Data is fetched using a segment register (usually
the DS) and an effective address (EA) computed
by the EU depending on the addressing mode.

Registers
15

Data Group

Pointer and
Index Group

8 7

AX

AH

AL

Accumulator

BX

BH

BL

Base

CX

CH

CL

Counter

DX

DH

DL

Data

SP

Stack Pointer

BP

Base Pointer

SI

Source Index

DI

Destination Index

8086 Architecture
The EU contains the following 16bit registers:
AX - the Accumulator
BX - the Base Register
CX - the Count Register
DX - the Data Register

Contd. . .
SP - the Stack Pointer
BP - the Base Pointer
SI - the Source Index Register
DI - the Destination Register
These are referred to as generalpurpose registers, although, as seen by
their names, they often have a specialpurpose use for some instructions.

Contd. . .
The AX, BX, CX, and DX registers
can be considered as two 8-bit
registers, a High byte and a Low
byte. This allows byte operations
and compatibility with the previous
generation of 8-bit processors, the
8080 and 8085. The 8-bit registers
are:

Contd. . .
AX --> AH,AL
BX --> BH,BL
CX --> CH,CL
DX --> DH,DL

 The EU(Execution Unit) also contains

the Flag
Register which is a collection of
condition bits and control bits. The
condition bits are set or cleared by
the execution of an instruction. The
control bits are set by instructions to
control some operation of the CPU.

Flag Bits
Bit 0 - CF Carry Flag - Set by carry out of
msb
Bit 2 - PF Parity Flag - Set if result has even
parity
Bit 4 - AF Auxiliary Flag - for BCD arithmetic
Bit 6 - ZF Zero Flag - Set if result is zero
Bit 7 - SF Sign Flag = msb of result
Bit 8 - TF Single Step Trap Flag
Bit 9 - IF Interrupt Enable Flag
Bit 10 - DF String Instruction Direction Flag
Bit 11 - OF Overflow Flag
Bits 1, 3, 5, 12-15 are undefined.

AH

AL

BH

BL

CH

CL

ES

DH

DL

SS

BP
DI

CS

DS
IP

SI
SP

Address
generation and
bus control

operands

ALU
flags

Instruction
queue
Internal Block Diagram of 8088/8086

8086 Programmers Model

16-bit Registers
ES
Extra Segment

BIU registers

CS
SS
DS
IP

(20 bit adder)

AX
BX
CX
DX

EU registers
16 bit arithmetic

AH
BH
CH
DH

SP
BP
SI
DI
FLAGS

Code Segment
Stack Segment
Data Segment
Instruction Pointer

AL
BL
CL
DL

Accumulator
Base Register
Count Register
Data Register
Stack Pointer
Base Pointer
Source Index Register
Destination Index
Register

Segments
Segment Starting address is
segment register value shifted 4
place to the left.

MEMORY

Address
000000H

CODE

STACK

64K Data
Segment

DATA
CS:0

EXTRA
64K Code
Segment

Segments are < or = 64K,

can overlap, start at an address
that ends in 0H.

0FFFFFH

The Code Segment

000000H

4000H

CS: 0400H
IP

0056H

4056H

Left-shift 4
bits
0
0400
Segment Register
+ 0056
Offset
04056H
Physical or
Absolute Address

CS:IP = 400:56
Logical Address
Memory

0FFFFFH

 The offset is the distance in bytes

from the start of the segment.
The offset is given by the IP for the
Code Segment.
Instructions are always fetched with
using the CS register.
The physical address is also called the absolute address

The Data Segment

000000H

DS:

05C0
EA 0050

Segment Register05C0 0
+ 0050
Offset
05C50H
Physical Address

05C00H
05C50H

DS:EA
Memory

0FFFFFH

Data is usually fetched with respect to the DS

register.
The effective address (EA) is the offset.
The EA depends on the addressing mode.

Programming
MOV Instruction:
MOV instruction copies data from one location to
another
Syntax:
MOV destination , source
copy source operand to destination

More Examples
MOV CL,55H
Move 55H into register CL
MOV DL,CL
Copy the contents of CL into DL
(Now DL=CL=55H)

Use of 16 Bit Registers

MOV CX,468FH
Move 468FH into CX
Now CH=46 and CL=8F
MOV AX,CX
Move contents of CX to AX
Now AX = CX = 468FH

ERRORS with MOV

MOV AL,DX (ERROR)
Since the contents of a 16-bit
register can not move into an 8-bit
Register

Other Examples
MOV
MOV
MOV
MOV
MOV
MOV

Ax,58CFH
DX,6678H
AH,6789H
AL,8FH
AX,45H
AX,687H