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MODELS FOR
SPICE
Prof. Drago Dobrescu
OUTLINE
1. INTRODUCTION
2. SPICE DC MODEL FOR DIODES
3. SPICE DC MODEL FOR BIPOLAR TRANSISTORS
4. SPICE AC MODEL FOR DIODES
5. SPICE AC MODEL FOR BIPOLAR TRANSISTORS
6. CONCLUSION
INTRODUCTION
What is SPICE?
LAB
FINAL TEST
max 80 points
TOTAL
SPICE HISTORY
First Released in 1971 and announced in 1973 at the Sixteenth
Midwest Symposium on Circuit Theory
Rapidly adopted by universities and industry in the early 1970s
SPICE 2G6 became the de facto industry standard in the late 1970s
SPICE began as an innovative class project under the direction of Ron
Rohrer in the academic year 1969-1970
The computer at UC Berkeley at that time was a CDC 6400
The input to the computer was punched cards
The output of the computer was from the line printer
The MIPS rate was comparable to on Intel 286
The maximum available memory was 100,000 octal 60 bit words
daytime and 140,000 octal at night
The simulation program developed in Ron Rohrers classes was named
CANCER Computer Analysis of Nonlinear Circuits, Excluding Radiation
CANCER
Modified Newton-Raphson iteration with heuristics
that worked well with bipolar circuits
Implicit integration techniques to reduce problems
with the widely spread time constants of an IC
Use of Adjoint Circuit techniques to implement
Sensitivity Analysis, Noise Analysis, and Distortion
Analysis using Volterra Series
About 6000 lines of FORTRAN code
DC operating point analysis, small-signal AC
analysis and transient analysis in one package
Built-in models for diodes and bipolar transistors
CANCER was the first simulator to utilize sparse
matrix techniques
CANCER was never released, but was renamed
SPICE and released into the public domain in 1971
SPICE Limitations
According to student feedback, not very user friendly!
Limited error checking
DC Nonconvergence
No Transient Timestep Control
No dynamic memory allocation
SPICE 2
First released into the public domain in 1975
Contained all features of SPICE
Data structures totally revamped to incorporate dynamic memory allocation
Thorough upgrade of DC convergence and transient numerical integration
algorithms
About 8,000 lines of FORTRAN
Many industrial research centers adopted SPICE2 and developed proprietary
versions of the program, including Bell Labs (ADVICE), Texas Instruments
(TISPICE), Motorola (MCSPICE)
Shawn and Kim Hailey formed Meta Software and modified a copy of SPICE 2E
into the most successful version of a commercial SPICE known as HSPICE
SPICE 3
In 1989, SPICE3 was released into the public domain
This later version of SPICE3 was coded in the C language and utilized the more
sophisticated data structures of C
SPICE3 contains about 135,000 lines of C code
MODELS
A model (from V.L. modellus) is a pattern, plan,
representation (especially in miniature), or description
designed to show the main object or workings of an object,
system, or concept.
In the electronic field, modelling represents the
caracterization of the semiconductor device electric
proprieties (or devices mathematicaly interconected), of the
equivalent circuits and the
tabels with the model
parameters.
MODELS CLASSIFICATION
COMPARING MODELS
Physical model
Static model = DC model
Empiric (Experimental) model
Example: DC model for the diode
s p a2c e c h a r g e r e g i o n
d u
dx
E
p p0
V
+ +
n
+
+ + +
E
qN A
+ + +
( x + l p+0 ) +- l p0 x 0
+ + +
qN D (l x )
n0
0 x l n0
p, n
B0
-w cp
0
-q N A
+
+
+
+
+
ln0
w cn
E
-lp 0
0
jnM
j
2j n m 1
1
) B 0
p(M
qj p mN A N D
kT N A N D
ln
q
n i2
+
+
+
+
+
+qN D
-lp 0
n n0
p n 0 x 0
- l p0
qN A
2
(
x
l
)
p
0
n p 0 2
u
0
- l p 0 qN D (l l xn 0) 2 0 xx l
n0
n0
B 0
2
N A l p0 N D l n0
p
n
l 0 l n0 l p0
+
+
+ E
+
+
v
ln0
x
- E m ax = -q N A lp 0 = -q N D ln 0
u
-lp 0
0
ln0
B0
x
qN A
(x l p ) - l p x 0
qN D
(l n x)
0 x ln
B B 0 VA
l ln lp
2 1
1
(
) B
q NA ND
qN A
2
(
x
l
)
- lp x 0
p
2
u
V qN D (l x) 2
0 x ln
A
n
B 0
2
I A I diff I gr
I 0d
I A I 0d [exp(
qVA
qV
) 1] I 0gr [exp( A ) 1]
kT
2kT
I 0d
qV
I A I diff I 0d exp( A )
kT
I A I R I 0gr
Dp
Dn
)
Lp N D Ln N A
n
I 0gr qA jl i
2 0
qA jn i2 (
I A I 0 [exp(
qVA
) 1]
mkT
Parameters: I0, m
Saturation Current
Ideality Factor
lo g IF
V J R S IF
IF
R Sp
R Sn
V J
+
V F
VF
mkT I F
ln
R s I F
q
I0
V F
lo g I0
0
Parameters: I0, m, RS
Series resistance
mkT I F 1
ln
R s I F1
q
I0
VF 2
mkT I F 2
ln
RsIF 2
q
I0
VF 3
mkT I F 3
ln
Rs IF 3
q
I0
I F2 2 I F 1 I F 3
mkT I F 1 I F 3
VF 1 2VF 2 VF 3
ln 2 R s ( I F 1 2 I F 2 I F 3 )
q
IF2
VF 1 2VF 2 VF 3
Rs
I F1 2I F 2 I F 3