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8.2
Objectives
To provide a detailed description of various ways of
8.3
Background
Program must be brought (from disk) into memory and placed
Main memory and registers are only storage CPU can access
directly
8.4
8.5
8.6
8.7
8.8
The user program deals with logical addresses; it never sees the
8.9
8.10
Dynamic Loading
Routine is not loaded until it is called
Better memory-space utilization; unused routine is never loaded
Useful when large amounts of code are needed to handle
8.11
Dynamic Linking
Linking postponed until execution time
Small piece of code, stub, used to locate the appropriate
memory address
8.12
Swapping
Major part of swap time is transfer time; total transfer time is directly
proportional to the amount of memory swapped
8.13
8.14
Contiguous Allocation
Main memory usually into two partitions:
8.15
8.16
OS
OS
OS
process 5
process 5
process 5
process 5
process 9
process 9
process 8
process 2
process 10
process 2
process 2
8.17
process 2
8.18
Fragmentation
External Fragmentation total memory space exists to satisfy a
I/O problem
8.19
Paging
Logical address space of a process can be noncontiguous;
8.20
page number
page offset
m-n
8.21
Paging Hardware
8.22
8.23
Paging Example
8.24
Free Frames
After allocation
Before allocation
Operating System Concepts 8th Edition
8.25
page table
memory accesses. One for the page table and one for the
data/instruction.
8.26
Associative Memory
Associative memory parallel search
Page #
Frame #
8.27
8.28
Hit ratio =
Effective Access Time (EAT)
EAT = (1 + ) + (2 + )(1 )
=2+
8.29
Memory Protection
Memory protection implemented by associating protection bit
8.30
8.31
Shared Pages
Shared code
The pages for the private code and data can appear
anywhere in the logical address space
8.32
8.33
8.34
8.35
8.36
A logical address (on 32-bit machine with 1K page size) is divided into:
a page number consisting of 22 bits
a page offset consisting of 10 bits
Since the page table is paged, the page number is further divided into:
a 12-bit page number
a 10-bit page offset
Thus, a logical address is as follows:
page number
pi
12
page offset
p2
10
10
where pi is an index into the outer page table, and p2 is the displacement within the
page of the outer page table
8.37
Address-Translation Scheme
8.38
8.39
match
8.40
8.41
8.42
8.43
Segmentation
Memory-management scheme that supports user view of memory
A program is a collection of segments
8.44
8.45
1
2
3
user space
8.46
Segmentation Architecture
Logical address consists of a two tuple:
<segment-number, offset>,
Segment table maps two-dimensional physical addresses;
8.47
read/write/execute privileges
8.48
Segmentation Hardware
8.49
Example of Segmentation
8.50
8.51
8.52
8.53
8.54
8.55
8.56
End of Chapter 8