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What are the Steps of program execution?

Computer executes a stored program.


A program consists of sequence of commands
Each execution command/element is called an instruction.
A processor executes an instruction by
(1) sending out an address to the address bus (for the program)
(2) telling the memory to deliver the information from that address to
the data bus
(3) get the instruction from the data bus (called fetch)
(4) decode the instruction.
(5) the processor does the work according to the specifics of the
Memory
instruction (called execution).
0
Address Bus
Program
+ Data
CPU
Data Bus
ECE 362 Microprocessor Systems and Interfacing

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Can you tell me more about Microprocessor


components?

Arithmetic Logic Unit (ALU)

Control Unit

Decodes instructions and decides what to do


Calculates an address that selects a memory location where data is sent
or retrieved.

Registers

Performs arithmetic or logic calculations between values in registers and


values in memory.

Fast temporary storage used in program execution and computations

Bus Interface Unit (BIU)

Interface to buses. Outputs addresses and coordinates the transfer of


data between CPU and memory.
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What are Registers (of 68HC12 microcontroller)?

Fast accessing storage that holds very essential


information for program execution and decision making
They have special names

Program counter PC
Accumulator A
Accumulator B
Accumulator D (D = A cascade B)
Index register X
Index register Y
Stack pointer SP
Conditional code register - CCR

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Whats PC (Program Counter)?

Program Counter (PC)

Used to access program (code) in sequence


A register that points to the address of the next instruction to be fetched.
Number of bits in PC is usually the same as the number of lines in the
address bus.
PC is incremented every time a byte is retrieved from program memory.
If multiple bytes are read with every memory access, PC may be
incremented by the size (2, 4, or 8) of memory access.
PC must be set before running programs.
Upon reset, PC points to a specific memory location where a reset
handler must reside.

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Program (code) area and data area


memory

address
0

Typically program (code) area and data


area are separated

to avoid confusion or wrong access

3FFFH
4000H
Data
area
7FFFH
8000H
Program
(Code)

FFFFH
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How is an instruction executed step-by-step?

Bus Interface

Processor block diagram


6

ECE 365-Lee

How is an instruction executed step-by-step?

ECE 365

What are 68HC12 Registers and their size?

Accumulators A,B and D


Index registers IX and IY (or we call them X and Y)
Program counter (PC)
Stack pointer (SP)
Condition code/flag register (CCR)

Record the size of the following registers:


A _____
IX _____
SP ____

B _____ D _____
IY _____ PC ____
CCR ______

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68HC12 Registers and Their Size

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What are the Functionalities of Registers?

Data in internal registers can be manipulated very quickly.


Whats the functionality of accumulators?

Whats the functionality of index registers?

Accumulators are typically used for computational data storage


E.g., A and B
address pointing (i.e., typically used to access memory and I/O
E.g., X and Y

There are typically multiple registers with similar capabilities so


several different values can be held in the CPU

E.g., A and B, X and Y

CCR: contains the status of CPU (operation mode, computation


results such as positive, negative, zero, overflow)
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What does an instruction consist of?

Instruction consists of opcode and operand(s)


LDAB

$1234

Whats opcode and what information does it include?

opcode means operation code (encoded command)


it may include the registers involved
it also contains addressing mode

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Whats Operand?

Additional information needed to complete the execution of an


instruction.

such as memory address, registers, or values

LDAB $1234

For example, the instruction may require moving the contents of an


external memory location to an internal register. The opcode will
likely indicate the internal register involved in this data transfer
instruction, but the address of the external memory location is also
necessary.

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More about Operands

An instruction that increments an internal register may have all


of the needed information in the opcode, and will not require an
operand.
An instruction that adds 25 to an internal register will likely
require an operand to store the 25. The 25 is referred to as
immediate data.
An instruction that needs to access memory location 25 will need
an operand to hold this memory location value.

Reading such a separate location is referred to as direct addressing.

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More about Operands

Some instructions have two (or more) operands


The register involved is also considered as operand (in other
CPUs)
In fact, most instructions involve two operands
ABA, LDAA $18, MOVW, STD
Types of operands
immediate value, register, address, displacement,
combination of these

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68HC20 Instruction Format


Opcode with internal
register and addressing
mode
1 or 2 bytes

Operand 1

Operand 2

0 to 2 bytes

0 to 2 bytes

Instruction examples

1-byte machine code


CLRA, INCA, INCB, INX, DEX, DEY, LSLD
2-byte
ABA, LDD $18,
3-byte
LDD #1234, LDD $1234
4-byte
LDD $1234, X
5-byte and 6-byte
MOVW $1234 $5678
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Whats Machine Code (Object Code)?

The codes that implement the instructions are referred to as


machine code (also called object code).

It is binary
It is typically read out in hexadecimal

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What kinds of instruction types need?

Computation instructions

Data transfer instructions

arithmetic computations
addition, subtraction, multiplication, division
logical computations
AND, OR, XOR, complement,
load (reading data from memory)
store (writing data to memory)

Execution control instructions

to implement if ( ) then . else . ; for-loop


branch instructions

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Whats addressing mode?

Various ways to move around operands


What various ways?

sometimes need value itself


immediate addressing mode
need to access memory
direct addressing mode (short address)
extended addressing mode (long address)
need indexed accesses for arrays and matrix
indexed addressing mode
sometimes memory contains pointers (or addresses)
indirect addressing mode

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Why use different addressing mode?

If you need to add 50 and 40,

you can place 50 and 40 in the instructions themselves,

use immediate addressing mode

or can place them in a separate memory space called data area

can use direct or extended or indexed addressing mode

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Data Transfer Instructions

Lets learn popular immediate data transfer instructions

Immediate
The data is part of the instruction.
Data follows the opcode.
Use # in assembly to indicate immediate.

This is called immediate addressing mode

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Data Transfer Instruction: LDAA

LDAA

; Load into Accumulator A, LDAA is a mnemonic


LDAA #$32
; # indicates immediate addressing
; $ means the number is a hexadecimal number
;Machine code of this instruction in computer memory
86
;opcode (in hex) ; LDAA is translated to 10000110 binary
32
;operand (in hex)
After the execution of this instruction, what is the value in accumulator A
in hex, binary and decimal?
Answer _________ ________________ _____________

Write the instruction to load a 2F hex into accumulator A.


ECE 362 Microprocessor Systems and Interfacing
Answer ______________________

1-21

Execution of LDAA #$32


In program memory

PC

86
32
to CPU
Accumulator A

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Data Transfer Instruction: LDAB

LDAB

;Load into Accumulator B


LDAB #24 ;Assembly instruction
;Machine code in computer memory E000 and E001
E000 C6 ;Opcode
E001 18 ;Operand
What will be the value in B? Answer ___ hex
What are E000 and E001? Why are they 16-bit numbers? ______________
How many bytes does it need to access to fetch the instruction?
___________ and to execute the instruction? ___________
How many memory accesses are required for the instruction fetch/execution if
data bus is 16 bits (assuming data is aligned in word location)?
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8-bit vs 16-bit data bus

8-bit data bus: can access 1 byte at a time

In program memory

44
86
32

16-bit data bus: can access 2 bytes at a time

CC
10
24

ECE 362 Microprocessor Systems and Interfacing

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Review: Data Transfer Instructions

Write the assembly instruction to load the decimal value 22 into


register B.
Answer _________________
Write the machine code for the above instruction.

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Data Transfer Instructions: LDD

LDD

;Load Double Accumulator D

LDD #$1024
A000
A001
A002

CC ;Opcode
10 ;Operands
24

What values are in A, B and D? Answer ______


Why are two bytes of operands required? _____
What are A000, A001 and A002? Answer _____
How many bytes does it need to access to fetch the instruction?
___________ and to execute the instruction? ___________
How many memory accesses are required for the instruction fetch/execution if
data bus is 16 bits (assuming data is aligned in word location)?
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Data Transfer Instructions

We have learned popular immediate data transfer instructions

Immediate - The data is part of the instruction. Data follows the opcode.
Use # to indicate immediate.

Next we learn data transfer from memory into a register

Extended
The memory address of the data is part of the instruction.
An address for data follows the opcode.
68HC12 addresses are 16 bits.

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Data Transfer Instructions: LDAA

LDAA $1006
; extended addressing
Corresponding machine code
C000 B6
C001 10
C002 06
What type of addressing is used? _________
Where does the value to be loaded in A come from? ________
What happens if LDAA #$1006 is attempted? ______
How many bytes does it need to access to fetch the instruction?
___________ and to execute the instruction? ___________
How many memory accesses are required for the instruction fetch/execution
if data bus is 16 bits?
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Data Transfer Instructions: LDD

LDD

$1026

; extended addressing

D000 FC
D001 10
D002 26
The contents of 1026 are loaded in the most significant part of register D
(register A), and the contents of 1027 are loaded in the least significant
part of D (register B).
How many bytes does it need to access to fetch the instruction?
___________ and to execute the instruction? ___________
How many memory accesses are required for the instruction fetch/execution
if data bus is 16 bits (assuming data is aligned in word location)?

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Data Transfer Instructions: STAA

STAA
F000
F001
F002

$1000 ; Store the contents of A at location 1000 hex


; extended addressing
7A
10
00

How many bytes does it need to access to fetch the instruction? ___________
and to execute the instruction? ___________
How many memory accesses are required for the instruction fetch/execution if
data bus is 16 bits (assuming data is aligned in word location)?

STD $1000 (Opcode 7C)

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Data Transfer Instructions

LDAA, LDAB
LDD
LDX, LDY
STAA, STAB
STD
STX, STY
MOVB S,D
MOVW S,D

;Load A or B
;Load D
;Load X or Y
;Store A or B
;Store D
;Store X or Y
(SMem) -> (DMem)
(Smem) -> (Dmem)

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Data Transfer Instructions

TAB
AB
TBA
BA
XGDX D IX, IX D
XGDY D IY, IY D
TFR S,D S D
LEAX IND (IND) X
LEAY IND (IND) Y

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Laboratory 1.1 : Machine Code Entry


Manually disassemble the following machine code (write assembly code
based on machine code using the information on pages 1-24 to 1-28 in
this lecture). Enter these machine code to memory starting at address 850
hexadecimal. See details below.
Opcode
Operand
86
32
86
20
C6
18
CC
00
24
CC
10
58

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Laboratory 1.2 Data Transfer Instructions

Write the mnemonic and machine code that load a hex 3A4 into register
D and then store that value in memory starting at location $850.

Test the above program by


entering the machine code using the debugger.
Single step through the code.

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What kinds of Data Types does 68HC12 support?

Bits
5-bit signed integers
8-bit signed and unsigned integers
8-bit, 2-digit binary-coded-decimal numbers
9-bit signed integers
16-bit signed and unsigned integers
16-bit effective addresses
32-bit signed and unsigned integers

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What kinds of Addressing Modes does 68HC12


support?

We have seen two examples of addressing mode


Addressing mode describes how CPU gets the operands
List of addressing modes
Inherent addressing mode
Immediate addressing mode
Direct addressing mode
Extended addressing mode
Indexed addressing mode
Pre-increment, Post increment
Pre-decrement, Post-decrement
Relative addressing mode
Indexed indirect addressing mode

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Why do we need so many Addressing Modes?

Because there can be many ways to access operands.


richness, flexibility, easier programming, better high-level language
support
Operands can be in
Registers
Immediate values
Memory (direct or extended)
Relative locations
Indexed memory
Indirect memory
Stack
Autoincrement or autodecrement wanted

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Whats Inherent Addressing?

(or called register mode in other CPUs)


Operands are already in registers inside CPU

loaded from memory for computation


counters
the results of previous computation
read from input ports
Registers are fastest temporary storage

Examples
ABA ; add B to A
INX ; increment X register by 1

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Immediate Addressing mode more detail?


The operand explicitly describes the information
typically constant values
The operand starts with # sign
The operand can be 8 or 16 bits.
Example

LDAA

#$3A

LDD #$10 ; *** operand has to be 2 bytes


How many bytes does it need to access to fetch the instruction? ___________ and
to execute the instruction? ___________
How many memory accesses are required for the instruction fetch/execution if data
bus is 16 bits (assuming data is aligned in word location)?

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Whats Direct Addressing?

The address of the information is shown as operand

The address size is 8 bit.


Can only access memory locations 00-FF

required data is pointed to by the address info of the instruction

direct mode is for memory page 0 (i.e., first 256 bytes of memory)

Example
LDAA

$3A

LDD $10
STD $0005

ECE 362 Microprocessor Systems and Interfacing

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Whats Extended Addressing?

The address of the information is shown as operand


The address size is 16 bit
Most other microprocessors call it direct addressing
Operation is similar to direct addressing
Used to access memory locations 100~FFFF.

for all other memory pages except page 0

Examples
LDAA

$3A00

LDD $1000

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Whats Indexed Addressing?

The address of the information is shown as the distance to the


address in a special/index register
The address is the first operand
The distance is a constant/immediate value
The special/index register can be X, Y, SP, or PC
Examples
ADDA

$30, X

LDD $10, Y

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What are Autoincrement and Autodecrement


addressing modes?

The value of an index register specified is automatically


incremented or decremented for convenience
Why do we need such modes?

How much adjusted?

for accessing arrays and matrices


many elements are sequentially accessed typically
you specify as an offset value

When adjusted?

either before accessing operand in memory: preor after accessing operand in memory:
postthis is to support various situations (flexibility)

ECE 362 Microprocessor Systems and Interfacing

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What are Pre- and Post- Autoincrement and


Autodecrement addressing modes?

Pre-autoincrement

Post-autoincrement

use the contents (address) of index register for memory access, and then
increment by the offset amount

Pre-autodecrement

increment the index register by the offset and then use the adjusted value
(address) for memory access

decrement the index register and then use the adjusted value (address)
for memory access

Post-autodecrement

use the contents (address) of index register for memory access, and then
decrement by the offset amount

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What are Autoincrement and Autodecrement?

Autoincrement
pre-Autoincrement
post-Autoincrement
Autodecrement
pre-Autodecrement
post-Autodecrement

ADAA
LDD 4, Y+

2, +X

ADAA 8, -X
LDD 2, Y-

Index register (value) is automatically increased/decreased before/after


opcode-specified operation

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What is
Indexed Indirect Addressing with 16-bit Offset?

The address (operand) of the information appears in the


memory location of the sum value of the distance and
index/special register
The distance (or offset) is a constant/immediate value
The index/special register can be X, Y, SP, or PC
Examples
ADAA

[$30, X]

; [ ] denotes indirect mode

LDD [$10, Y]

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What is Indexed Indirect Addressing with D-offset?

The address (operand) of the information appears in the


memory location of the sum value of two registers (the distance
register and index/special register)
The distance (or offset) is in a register
The index/special register can be X, Y, SP, or PC
Examples
ADAA

[D, X]

LDD [D, Y]

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Whats Relative Addressing?

Only used in Branch instructions

The operand is address


But unlike direct/extended addressing modes, the translated machine
code contains the distance to the current value in PC
The distance is expressed as a signed 8-bit 2s complement amount
(range of -128 +127)

for execution sequence change

positive amounts mean forward branch (i.e., jumping to higher PC


address)
negative amounts mean backward branch (jumping to lower PC address)

Examples
BNE

$30 ; $30 is target address, machine code: 26 rr

BEQ

Label; Label is target, machine code: 27 rr


; where rr is the distance to the target from current PC

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Table 1.3 68HC12 Addressing Modes


Addressing Mode
Inherent

Description
Data location is inherent in instruction

Immediate

Data immediately follows the opcode

Direct

Data is on page zero given by an 8-bit


address ($00-$FF)
Data is in memory given by a
16-bit address ($0000-$FFFF)
Opcode is followed by an 8-bit or 16-bit
relative offset from PC
5-bit, 9-bit, or 16-bit constant offset
from X, Y, SP, or PC
Auto pre-decrement X, Y, or SP
by 1 - 8
Auto pre-increment X, Y, or SP
by 1 - 8
Auto post-decrement X, Y, or SP
by 1 - 8
Auto post-increment X, Y, or SP
by 1 - 8
Add contents of A, B, or D to
X, Y, SP, or PC
Address of data located at 16-bit
constant offset from X, Y, SP, or PC
Address of data located at X, Y, SP, or
PC plus the value in D

Extended
Relative
Indexed
(constant offset)
Indexed
(pre-decrement)
Indexed
(pre-increment)
Indexed
(post-decrement)
Indexed
(post-increment)
Indexed
(accumulator offset)
Indexed-Indirect
(16-bit offset)
Indexed-Indirect
(D accumulator offset)

ECE 362 Microprocessor Systems and Interfacing

Examples
INX
DECB
LDAA #$2C
LDD #$1234
STAA $FC
STD $34
STAB $1234
STX $0848
BNE -$2B
LBEQ $0452
LDD -2,X
JSR 0,Y
STAA 1,-X
MOVW 0,X,2,-X
LDAB 1,+Y
STD 2,+X
STD 2,XLDAA 4,YLDD 2,X+
STAA 1,X+
ADDA B,X
STX D,Y
LDAA [0,Y]
JSR [0,Y]
ADDA [D,X]
JSR [D,Y]
1-49

Some Definitions

Memory Access

Fetch

Read
Data read
Instruction read (fetch)
Write
Data write
reading one instruction (involves decoding)

Execution

processing (of an instruction)


may or may not need to access memory

ECE 362 Microprocessor Systems and Interfacing

1-50

Fetch and Execution of LDD $1026 (FC 10 26)


address
0

memory
Data
area

1026H
1027H

7FFFH
8000H
8000H
8000H
Program
(Code)
FFFFH
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One mnemonic (inst. type) may have many


addressing modes

LDAA, LDAB
LDD
LDX, LDY
STAA, STAB
STD
STX, STY

;Load A or B
;Load D
;Load X or Y
;Store A or B
;Store D
;Store X or Y

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One mnemonic (inst. type) may have many


addressing modes

ADDA: Adds the operand to accumulator A.


A + (Mem) A

Example
ADDA
ADDA
ADDA
ADDA
ADDA

10
1000
#10
6,X
[D,X]

;Opcode 9B, direct


;Opcode BB, extended
;Opcode 8B, immediate
; indexed
; indirect

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Exercise

What are operands?


What common data transfer instructions are available?

between a register and another register


between a register and a memory location

load or store
between two memory locations

MOVB and MOVW

Whats addressing mode and why do so many addressing


modes need?

Same mnemonic can have many addressing modes

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Quiz: Addressing Modes/Disassembly


1. How many memory bytes must be referenced for the following
instructions to complete execution? All opcodes are single byte.
What type of addressing is used? Assume all instructions are executed
in the most efficient manner possible.
LDAA
$204A
Number of memory bytes referenced? ______
What type of addressing is used? ______
LDD
$20
Number of memory bytes referenced? ______
What type of addressing is used? ______

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Quiz (cont)
2. Using the table below, disassemble the following machine code. Write
the mnemonics for each instruction.

OPCODE

OPERAND

CC
20
B6
96
40
DC
86
B6
96
25

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Lab 1.3 Debugger setup

Make the dip switches 1,2,3 on the top board at ON position and
the dip switches 4 to 8 on the top board at OFF position
When you fist logged on the computer and using the code
Warrior debugger, go to fileconfigurationload and then
uncheck the box for automatic erase flash

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Laboratory 1.3 : Addressing Modes


Open the given Project folder. Double click on Project
application. Run debugger. Using the debugger step through
the program and answer the questions below.
Entry:
ldaa #50 ;Instruction 1 at address $C000
adda $C000 ;Instruction 2
adda $C001 ;Instruction 3
adda #$50
;Instruction 4
staa $abc
;Instruction 5
ldab $abc
;Instruction 6
ldd Counter
ldx FiboRes
std abc
; abs = address $8A0
stx doReMi
;doReMi = address $8A2
end

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Laboratory 1.3 : Addressing Modes (cont.)


After executing the first instruction
(i) What value is in Accumulator A? __________
(ii) What is the value of the Program Counter? __________
(iii) From which address was the data loaded retrieved? _________
(iv) What addressing mode is used? ________
ldaa #50
adda
$C000
adda
$C001
adda
#$50
staa $abc
ldab$abc

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Laboratory 1.3 : Addressing Modes (cont.)


After executing the second instruction
(i) What value is in Accumulator A? __________
(ii) What is the value of the Program Counter? __________
(iii) From which address was the data loaded retrieved? _________
(iv) What addressing mode is used? ________
ldaa #50
adda
$C000
adda
$C001
adda
#$50
staa $abc
ldab$abc

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Laboratory 1.3 : Addressing Modes (cont.)


After executing the third instruction
(i) What value is in Accumulator A? __________
(ii) What is the value of the Program Counter? __________
(iv) What addressing mode is used in the third instruction ? ________
(iii) From which address was the data retrieved? _________
After executing the fourth instruction
(v) What value is in Accumulator A? _________
(vi) From which address was the data retrieved? _________
(viii) What addressing mode is used in the fourth instruction? ________
After executing the sixth instruction
(ix) What value is in Accumulator B? __________
(x) What is the value of the Program Counter? __________
(xi) What addressing mode is used? ________
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