8051 MICROCONTOLLER ARCHITECTURE

DEPARTMENT OF ECE
MVGR COLLEGE OF ENGINEERING
July 4,CHINTALAVALASA,VIZIANAGARAM
2015

Contents
Introduction to embedded systems
The 8051 architecture
Micro controller hardware
Ports
External memory
Timers & Counters
Serial port communication
Interrupts
July 4, 2015

Contents:
Microcontrollers Microcontrollers
Why should we study them?
Where they are being used?
vs. Microprocessor
Need for them
What is it?
July 4, 2015

 Why we should study microprocessor or

microcontroller?
They are in curriculum
They are used in personal computers

If the above are only reasons, see the statistics

where they are being used

July 4, 2015

 They are being used in Embedded systems

Embedded system means the processor is embedded
into that application.
An embedded product uses a microprocessor or
microcontroller to do one task only.
In an embedded system, there is only one application
software that is typically burned into ROM.
Example printer, keyboard, video game player

July 4, 2015

A short list of embedded systems

Anti-lock brakes
Auto-focus cameras
Automatic teller
machines
Automatic toll systems
Automatic transmission
Avionic systems
Battery chargers
Camcorders
Cell phones
Cell-phone base
stations
Cordless phones
Cruise control
Curbside check-in
systems
Disk drives
July 4, 2015

Digital cameras
Electronic card readers
Portable video games
Printers
Satellite phones
Scanners
Smart ovens/dishwashers
Speech recognizers
Stereo systems
Teleconferencing systems
Televisions
Temperature controllers
Theft tracking systems
TV set-top boxes
VCRs, DVD players
Video game consoles
Video phones

Electronic instruments
Electronic toys/games
Factory control
Fax machines
Fingerprint identifiers
Home security systems
Life-support systems
Medical testing systems
Modems
MPEG decoders
Network cards
Network
switches/routers
On-board navigation
Pagers
Photocopiers
Washers and dryers
6 on
And the list goes on and

July 4, 2015

General-purpose microprocessor

CPU for Computers

No RAM, ROM, I/O on CPU chip itself
Example Intels x86, Motorolas 680x0

CPU
GeneralPurpose
Microprocessor

Many chips on mothers board

Data Bus

RAM

ROM

I/O
Port

Timer

Serial
COM
Port

Address Bus
General-Purpose Microprocessor System
July 4, 2015

Microcontroller :
A smaller computer
On-chip RAM, ROM, I/O ports...
Example Motorolas 6811, Intels 8051, Zilogs Z8 and PIC 16X

CPU
I/O
Port

RAM ROM
Serial
Timer COM
Port

July 4, 2015

A single chip
Microcontroller
9

Microprocessor vs. Microcontroller

Microprocessor
CPU is stand-alone, RAM,
ROM, I/O, timer are separate
designer can decide on the
amount of ROM, RAM and
I/O ports.
expensive
versatility
general-purpose

July 4, 2015

Microcontroller
CPU, RAM, ROM, I/O and
timer are all on a single chip
fix amount of on-chip ROM,
RAM, I/O ports
for applications in which cost,
power and space are critical
single-purpose

10

Need for microcontroller

for applications in which cost, power and
space are critical
Example : TV remote control

July 4, 2015

11

What is a Microcontroller?
A microcontroller is an entire computer
manufactured on a single chip
They have a high concentration of on-chip
facilities such as

serial ports,
parallel input/output ports,
Timers & counters,
interrupt control,
analog-to-digital converters,
random access memory, read only memory, etc.
July 4, 2015

12

What are its Advantages

Cost is very less
Around Rs.100

Consumes less power

Typically milliwatts while operating
Nanowatts in sleeping and idle mode
Making it ideal for low power embedded systems

Low space
Needs no extra circuitry
Possible to build handy systems
July 4, 2015

13

Common Microcontrollers
Atmel
ARM
Intel
8-bit
8XC42
MCS48
MCS51
8xC251
16-bit
MCS96
MXS296
National Semiconductor
COP8
Microchip
12-bit instruction PIC
14-bit instruction PIC
PIC16F84
16-bit instruction PIC
NEC

July 4, 2015

Motorola
8-bit
68HC05
68HC08
68HC11
16-bit
68HC12
68HC16
32-bit
683xx
Texas Instruments
TMS370
MSP430
Zilog
Z8
Z86E02

14

Three criteria in Choosing a Microcontroller

1.

meeting the computing needs of the task efficiently and cost

effectively
speed, the amount of ROM and RAM, the number of I/O ports
and timers, size, packaging, power consumption
easy to upgrade
cost per unit
2. availability of software development tools
assemblers, debuggers, C compilers, emulator, simulator,
technical support
3. wide availability and reliable sources of the microcontrollers.

July 4, 2015

15

Embedded Products Using

Microcontrollers
Home
Appliances, intercom, telephones, security
systems, garage door openers, answering
machines, fax machines, home computers,
TVs, cable TV tuner, VCR, camcorder, remote
controls, video games, cellular phones,
musical instruments, sewing machines,
lighting control, paging, camera, pinball
machines, toys, exercise equipment
July 4, 2015

16

Embedded Products Using

Microcontrollers
Office
Telephones, computers, security systems, fax
machines, microwave, copier, laser printer,
color printer, paging

July 4, 2015

17

Embedded Products Using

Microcontrollers
Auto
Trip computer, engine control, air bag, ABS,
instrumentation, security system, transmission
control, entertainment, climate control, cellular
phone, keyless entry

July 4, 2015

18

Microcontroller Architectures
Address Bus
CPU

Memory
Program
or Data

Data Bus
2n

Address Bus
CPU

Fetch Bus

Memory
Program

Address Bus 0
Data Bus
July 4, 2015

Von Neumann
Architecture

Harvard
Architecture

Data
19

About 8051
It was the first microcontroller developed
by Intel in early 80s
It is an 8 bit microcontroller & a 40 pin IC
Now produced by many companies in
many variations
The most popular microcontroller about
50% of market share
July 4, 2015

20

More about 8051

Harvard architecture single chip microcontroller (physically

separate storage and signal pathways for their instructions and
data )

Typically contains
8 bit Processor (CPU).
4K Bytes ROM
128 Bytes RAM
two timer/counters (16 bit)
A serial port
4 general purpose parallel input/output port
Interrupt controller

The 8051 can address 64K of external data memory and 64K of
External program memory.
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21

Block Diagram
External interrupts
Interrupt
Control

On-chip
ROM for
program
code

Timer/Counter

On-chip
RAM

Timer 1
Timer 0

Counter
Inputs

CPU

OSC

Bus
Control

4 I/O Ports

P0 P1 P2 P3

Serial
Port

TxD RxD

Address/Data
July 4, 2015

22

Comparison of the 8051 Family Members

Feature
8051
ROM (program space in bytes) 4K
RAM (bytes)
128
Timers
2
I/O pins
32
Serial port
1
Interrupt sources
6

July 4, 2015

8052
8K
256
3
32
1
8

8031
0K
128
2
32
1
6

23

July 4, 2015

24

Pin Description of the 8051

DIP
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND

July 4, 2015

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

8051
(8031)

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

Vcc
P0.0(AD0
P
) 0.1(AD1)
P0.2(AD2
P
) 0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
EA/VPP
ALE/PROG
PSEN
P2.7(A15)
P2.6(A14
)P2.5(A13
P
) 2.4(A12
)P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)

25

Pins of 8051 1/4

Vcc pin 40
Vcc provides supply voltage to the chip.
The voltage source is +5V.
GND pin 20 ground
XTAL1 and XTAL2 pins 19,18
These 2 pins provide external clock.
Way 1 using a quartz crystal oscillator
Way 2 using a TTL oscillator
Example 4-1 shows the relationship between XTAL and the
machine cycle.

July 4, 2015

26

Pins of 8051 2/4

RST pin 9 reset
It is an input pin and is active high normally low .
The high pulse must be high at least 2 machine cycles.
It is a power-on reset.
Upon applying a high pulse to RST, the microcontroller will
reset and all values in registers will be lost.
Reset values of some 8051 registers
Way 1 Power-on reset circuit
Way 2 Power-on reset with debounce

July 4, 2015

27

Pins of 8051 3/4

EA pin 31 external access

There is no on-chip ROM in 8031 and 8032 .
The EA pin is connected to GND to indicate
the code is stored externally.
PSEN ALE are used for external ROM.
For 8051, /EA pin is connected to Vcc.
PSEN pin 29 program store enable
This is an output pin and is connected to the
OE pin of the ROM.
July 4, 2015

28

Pins of 8051 4/4

ALE pin 30 address latch enable
It is an output pin and is active high.
8051 port 0 provides both address and data.
The ALE pin is used for de-multiplexing the address and data by
connecting to the G pin of the 74LS373 latch.
I/O port pins
The four ports P0, P1, P2, and P3.
Each port uses 8 pins.
All I/O pins are bi-directional.

July 4, 2015

29

Oscillator
XTAL Connection to 8051

Using a quartz crystal oscillator

We can observe the frequency on the XTAL2 pin.
C2
XTAL2
30pF
C1
XTAL1
30pF
GND

July 4, 2015

30

XTAL Connection to an External Clock Source

N
C

Using a TTL oscillator

XTAL2 is unconnected.

EXTERNAL
OSCILLATOR
SIGNAL

XTAL2

XTAL1

GND

July 4, 2015

31

Example :
Find the machine cycle for
(a) XTAL = 11.0592 MHz
(b) XTAL = 16 MHz.
Solution:
(a) 11.0592 MHz / 12 = 921.6 kHz;
machine cycle = 1 / 921.6 kHz = 1.085 s
(b) 16 MHz / 12 = 1.333 MHz;
machine cycle = 1 / 1.333 MHz = 0.75 s

July 4, 2015

32

Registers
A
B
R0

DPTR

DPH

DPL

R1
R2

PC

PC

R3
R4

Some 8051 16-bit Register

R5
R6
R7
Some 8-bitt Registers of
the 8051

July 4, 2015

33

RESET Value of Some 8051 Registers:

Register
PC
ACC
B
PSW
SP
DPTR
RAM are all zero.
July 4, 2015

Reset Value
0000
0000
0000
0000
0007
0000

34

RESET Pin
Power-On RESET Circuit

Vcc

+
10 uF

31
30 pF

8.2 K
30 pF

11.0592 MHz

19
18

EA/VPP
X1
X2

9 RST

July 4, 2015

35

Power-On RESET with Debounce

Vcc

31
10 uF

30 pF

EA/VPP
X1

X2
RST

8.2 K

July 4, 2015

36

Pins of I/O Port

The 8051 has four I/O ports
Port 0 pins 32-39 P0 P0.0 P0.7
Port 1 pins 1-8 P1 P1.0 P1.7
Port 2 pins 21-28 P2 P2.0 P2.7
Port 3 pins 10-17 P3 P3.0 P3.7
Each port has 8 pins.
Named P0.X X=0,1,...,7 , P1.X, P2.X, P3.X
Ex P0.0 is the bit 0 LSB of P0
Ex P0.7 is the bit 7 MSB of P0
These 8 bits form a byte.
Each port can be used as input or output (bi-direction).
July 4, 2015

37

Memory mapping in 8051

ROM memory map in 8051 family
4k
0000H

8k

32k
0000H

0000H

0FFFH
DS5000-32
8751
AT89C51

1FFFH

from Atmel Corporation

July 4, 2015

8752
AT89C52

7FFFH

from Dallas Semiconductor

38

 RAM memory space allocation in the 8051

7FH
Scratch pad RAM

30H
2FH
Bit-Addressable RAM
20H
1FH
18H
17H
10H
0FH
08H
07H
00H

July 4, 2015

Register Bank 3
Register Bank 2
Register Bank 1( Stack)
Register Bank 0

39

Bit Addressable Memory

2F

7F

78

2E
2D
2C

20h 2Fh (16 locations X

8-bits = 128 bits)
Bit addressing:
mov C, 1Ah
or
mov C, 23h.2

2B
2A
29
28
27
26
25
24
23

1A

22
21
20

10
0F
07

08
06

05

04

July 4, 2015

03

02

01

00

40

8051 Flag bits and the PSW register

PSW Register
CY

AC

F0

RS1

RS0

OV

Carry flag
Auxiliary carry flag
Available to the user for general purpose
Register Bank selector bit 1
Register Bank selector bit 0
Overflow flag
User define bit
Parity flag Set/Reset odd/even parity

RS1

RS0

Register Bank

--

PSW.7
PSW.6
PSW.5
PSW.4
PSW.3
PSW.2
PSW.1
PSW.0

CY
AC
-RS1
RS0
OV
-P

Address

00H-07H

08H-0FH

10H-17H

18H-1FH

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41

Instructions that Affect Flag Bits:

Note: X can be 0 or 1

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42

Stack in the 8051

The register used to access
the stack is called SP (stack
pointer) register.

7FH
Scratch pad RAM
30H

The stack pointer in the

8051 is only 8 bits wide,
which means that it can take
value 00 to FFH. When
8051 powered up, the SP
register contains value 07.

July 4, 2015

2FH
Bit-Addressable RAM
20H
1FH
18H
17H
10H
0FH
08H
07H
00H

Register Bank 3
Register Bank 2
Register Bank 1( Stack)
Register Bank 0

43

Example:
MOV
MOV
MOV
PUSH
PUSH
PUSH

R6,#25H
R1,#12H
R4,#0F3H
6
1
4

0BH

0BH

0BH

0BH

0AH

0AH

0AH

0AH

F3

09H

09H

09H

12

09H

12

08H

08H

08H

25

08H

25

Start SP=07H

July 4, 2015

25

SP=08H

SP=09H

SP=08H

44

SPECIAL FUNCTION REGISTERS

NAME

Function

Internal Ram
address

ACCUMULATOR

0E0

ARTHIMETIC

0F0

DPH

ADDRESSSING EXTERNAL MEMEORY

83

DPL

ADDRESSSING EXTERNAL MEMEORY

82

IE

INTERRUPT ENABLE CONTROL

0A8

IP

INTERRUPT PROIRITY

0B8

P0

I/O PORT LATCH

80

P1

I/O PORT LATCH

90

P2

I/O PORT LATCH

0A0

P3

I/O PORT LATCH

0B0

PCON

POWER CONTROL

87

PSW

PROGRAM STATUS WORD

0D0

July 4, 2015

45

SPECIAL FUNCTION REGISTERS

NAME

Function

Internal Ram
address

SCON

SERIAL PORT CONTROL

98

SBUF

SERAIL PORT BUFFER

99

SP

TACK POINTER

81

TMOD

TIMER/COUNTER MODE CONTROL

89

TCON

TIMER/COUNTER CONTROL

88

TL0

TIMER 0 LOW BYTE

8A

TH0

TIMER 0 HIGH BYTE

8C

TL1

TIMER 1 LOW BYTE

8B

TH1

TIMER 1 HIGH BYTE

8D

July 4, 2015

46

I/O PROGRAMMING

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(INT0)P3.2
(INT1)P3.3
(T0)P3.4
(T1)P3.5
(WR)P3.6
(RD)P3.7
XTAL2
XTAL1
GND

July 4, 2015

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

8051
(8031)

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
EA/VPP
ALE/PROG
PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)

47

I/O Port Programming.

Port 1 pins 1-8

Port 1 is denoted by P1.

P1.0 ~ P1.7
We use P1 as examples to show the operations on ports.
P1 as an output port (i.e., write CPU data to the external pin)
P1 as an input port (i.e., read pin data into CPU bus)

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48

Other Pins
P1, P2, and P3 have internal pull-up resisters.
P1, P2, and P3 are not open drain.
P0 has no internal pull-up resistors and does not connects to
Vcc inside the 8051.
P0 is open drain.
Compare the figures of P1.X and P0.X.
However, for a programmer, it is the same to program P0, P1,
P2 and P3.
All the ports upon RESET are configured as output.

July 4, 2015

49

Hardware Structure of I/O Pin

Each pin of I/O ports
Internal CPU bus communicate with CPU
A D latch store the value of this pin
D latch is controlled by Write to latch
Write to latch 1 write data into the D latch
2 Tri-state buffer
TB1: controlled by Read pin
Read pin 1 really read the data present at the pin
TB2: controlled by Read latch
Read latch 1 read value from internal latch
A transistor M1 gate
Gate=0: open
Gate=1: close
July 4, 2015

50

Tri-state Buffer
Output

Input

Tri-state control
(active high)

July 4, 2015

Low

Highimpedance
(open-circuit)

51

A Pin of Port 1
Read latch

TB2

Vcc
Load(L1)

Internal CPU
bus

Write to latch

Clk

P1.X
pin

P1.X
Q

M1

TB1

P0.x

Read pin

July 4, 2015

8051 IC

52

Writing 1 to Output Pin P1.X

Read latch

Vcc

TB2

Load(L1) 2. output pin is

Vcc

1. write a 1 to the pin

Internal CPU
bus

Write to latch

Clk

P1.X
pin

P1.X
Q

M1

output 1

TB1
Read pin

July 4, 2015

8051 IC

53

Writing 0 to Output Pin P1.X

Read latch

Vcc

TB2

Load(L1) 2. output pin is

ground

1. write a 0 to the pin

Internal CPU
bus

Write to latch

Clk

P1.X
pin

P1.X
Q

M1

output 0

TB1
Read pin

July 4, 2015

8051 IC

54

Port 1 as Output Write to a Port

Send data to Port 1

BACK:

MOV
A,#55H
MOV
P1,A
ACALL
DELAY
CPL A
SJMP BACK

Let P1 toggle.
You can write to P1 directly.
July 4, 2015

55

Reading High at Input Pin

Read latch
1.

TB2

write a 1 to the pin MOV

P1,#0FFH
Internal CPU bus

2. MOV A,P1

Vcc

external pin=High
Load(L1)

P1.X pin

P1.X
Write to latch

Clk

M1

TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1

July 4, 2015

8051 IC

56

Reading Low at Input Pin

Read latch
1.

Vcc

2. MOV A,P1

TB2

write a 1 to the pin

Load(L1)

external pin=Low

MOV P1,#0FFH
Internal CPU bus

P1.X pin

P1.X
Write to latch

Clk

M1

TB1
Read pin
3. Read pin=1 Read latch=0
Write to latch=1

July 4, 2015

8051 IC

57

Port 1 as Input Read from Port

In order to make P1 an input, the port must be programmed by writing 1 to

all the bit.

BACK:

MOV
MOV
MOV
MOV
SJMP

A,#0FFH
P1,A
A,P1
P2,A
BACK

;A=11111111B
;make P1 an input port
;get data from P0
;send data to P2

To be an input port, P0, P1, P2 and P3 have similar methods.

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58

Port 2 pins 21-28

Port 2 does not need any pull-up resistors since
it already has pull-up resistors internally.
In an 8031-based system, P2 are used to
provide address A8-A15.

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59

Port 3 pins 10-17

Port 3 does not need any pull-up resistors since it already has
pull-up resistors internally.
Although port 3 is configured as an output port upon reset, this
is not the way it is most commonly used.
Port 3 has the additional function of providing signals.
Serial communications signal RxD, TxD Chapter 10
External interrupt /INT0, /INT1 Chapter 11
Timer/counter T0, T1 Chapter 9
External memory accesses in 8031-based system /WR,
/RD Chapter 14

July 4, 2015

60

Port 3 Alternate Functions

P3 Bit

Function

Pin

P3.0

RxD

10

P3.1

TxD

11

P3.2

INT0

12

P3.3

INT1

13

P3.4

T0

14

P3.5

T1

15

P3.6

WR

16

P3.7

RD

17

July 4, 2015

61

A Pin of Port 0
Read latch

TB2

Internal CPU
bus

Write to latch

Clk

P1.X
Q

TB1
Read pin

July 4, 2015

P0.X
pin

8051 IC

M1

P1.x
62

Port 0 pins 32-39

P0 is an open drain.
Open drain is a term used for MOS chips in the same way
that open collector is used for TTL chips.
When P0 is used for simple data I/O we must connect it to
external pull-up resistors.
Each pin of P0 must be connected externally to a 10K ohm
pull-up resistor.
With external pull-up resistors connected upon reset, port 0
is configured as an output port.

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63

Port 0 with Pull-Up Resistors

Vcc

July 4, 2015

Port 0

P0.0
DS5000 P0.1
P0.2
8751
P0.3
P0.4
8951
P0.5
P0.6
P0.7

10 K

64

Dual Role of Port 0

When connecting an 8051/8031 to an external memory, the 8051
uses ports to send addresses and read instructions.
8031 is capable of accessing 64K bytes of external memory.
16-bit address P0 provides both address A0-A7, P2 provides
address A8-A15.
Also, P0 provides data lines D0-D7.
When P0 is used for address/data multiplexing, it is connected to the
74LS373 to latch the address.
There is no need for external pull-up resistors as shown in
Chapter 14.

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65

74LS373
PSEN
ALE
P0.0
P0.7

74LS373

G
D

OE
OC
A0
A7
D0
D7

EA
P2.0

A8

P2.7

A15

8051
July
4, 2015

ROM

66

Reading ROM (1/2)

P0.0

2. 74373 latches the

address and send to
OE
ROM
OC
G 74LS373
A0

P0.7

A7

PSEN
ALE

1. Send address to
ROM

Address
D0
D7

EA
P2.0

A8

P2.7

A12

8051
July 4, 2015

ROM

67

Reading ROM (2/2)

PSEN
ALE
P0.0
P0.7

2. 74373 latches the

address and send to
ROM

74LS373

G
D

Address

OE
OC
A0
A7
D0
D7

EA

3. ROM send the

instruction back
P2.0

A8

P2.7

A12

8051
July
4, 2015

ROM

68

ALE Pin
The ALE pin is used for de-multiplexing the
address and data by connecting to the G pin of
the 74LS373 latch.
When ALE=0, P0 provides data D0-D7.
When ALE=1, P0 provides address A0-A7.
The reason is to allow P0 to multiplex address and
data.

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Timer/Counter Logic

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PROGRAMMING 8051 TIMERS

Timer 0 registers
TL0 ( timer 0 low byte )
TH0 ( timer 0 high byte )

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Timer 1 registers
TL1 ( timer 1 low byte )
TH1 ( timer 1 high byte )

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TMOD (timer mode) register

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Operation of Timer on
Mode-0

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Operation of Timer in
Mode 1

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Operation of Timer in
Mode 2

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Operation of Timer in
Mode 3

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8051 SERIAL
COMMUNICATION

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Basics of serial
communication

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Start and stop bits

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SCON (Serial control) register

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SM0,SM1
SM0 and SM1 are D7 and D6 of the SCON

SM0
0
0
1
1

SM1
0
Serial Mode 0
1
Serial Mode 1,8 bit data,
1 stop bit, 1 start bit
0
Serial Mode 2
1
Serial Mode 3

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Doubling the baud rate in the

8051
1. To use a higher frequency crystal
2. To change a bit in the PCON register
D7

D0

SMO
D

--

--

MOV A,PCON
SETB ACC.7
MOV PCON,A

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--

GF1

GF0

PD

IDL

;place a copy of PCON in ACC

;make D7=1
;now SMOD=1 without
;changing any other bits
86

Baud rates for SMOD=0

Machine cycle freq. = 11.0592 MHz / 12 = 921.6 kHz
and
921.6 kHz / 32 = 28,800 Hz since SMOD = 0

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Baud rates for SMOD=1

Machine cycle freq. = 11.0592 MHz / 12 = 921.6 kHz
and
921.6 kHz / 16 = 57,600 Hz since SMOD = 1

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INTERRUPTS PROGRAMMING

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INTERRUPTS PROGRAMMING

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Six interrupts in the 8051

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Step in enabling an
interrupt

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Writing the ISR

Example:
Writing the ISR for Timer0 interrupt

ORG 0000H
;reset
LJMP MAIN
ORG 000BH
;Timer0 entry point
T0ISR: .
;Timer0 ISR begins
.
RETI
;return to main program
MAIN: .
;main program
.
.
END
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Interrupt priority upon reset

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Assembler Directives
ORG (origin)
Is to indicate beginning of the address
ORG 0000H or ORG 8000H

END
This indicates the assembler the end of the source file
It is last line of program

EQU (equate)
This is used to define a constant without occupying
memory location
COUNTEQU 25h
. .
MOV R3,#COUNT

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Structure of Assembly language

and Running an 8051 program
EDITOR
PROGRAM

ORG
MOV
MOV
MOV
ADD
ADD
HERE: SJMP
END

0H
R5,#25H
R7,#34H
Myfile.lst
A,#0
A,R5
A,#12H
HERE

Myfile.asm
ASSEMBLER
PROGRAM
Other obj file
Myfile.obj
LINKER
PROGRAM

Myfile.abs
OH
PROGRAM
Myfile.hex

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8051 Instruction Set

ACALL: Absolute Call

JC: Jump if Carry Set

PUSH: Push Value Onto Stack

ADD, ADDC: Add Acc. (With Carry)

JMP: Jump to Address

RET: Return From Subroutine

AJMP: Absolute Jump

JNB: Jump if Bit Not Set

RETI: Return From Interrupt

ANL: Bitwise AND

JNC: Jump if Carry Not Set

RL: Rotate Accumulator Left

CJNE: Compare & Jump if Not Equal

JNZ: Jump if Acc. Not Zero

RLC: Rotate Acc. Left Through Carry

CLR: Clear Register

JZ: Jump if Accumulator Zero

RR: Rotate Accumulator Right

CPL: Complement Register

LCALL: Long Call

RRC: Rotate Acc. Right Through Carry

DA: Decimal Adjust

LJMP: Long Jump

SETB: Set Bit

DEC: Decrement Register

MOV: Move Memory

SJMP: Short Jump

DIV: Divide Accumulator by B

MOVC: Move Code Memory

SUBB: Sub. From Acc. With Borrow

DJNZ: Dec. Reg. & Jump if Not Zero

MOVX: Move Extended Memory

SWAP: Swap Accumulator Nibbles

INC: Increment Register

MUL: Multiply Accumulator by B

XCH: Exchange Bytes

JB: Jump if Bit Set

NOP: No Operation

XCHD: Exchange Digits

JBC: Jump if Bit Set and Clear Bit

ORL: Bitwise OR

XRL: Bitwise Exclusive OR

POP: Pop Value From Stack

Undefined: Undefined Instruction

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THANK YOU

ANY QUERIES

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