Modern Semiconductor Devices for Integrated Circuits (C.

Hu)
Slide 3-1
Chapter 3
Device Fabrication Technology
About 10
20
transistors (or 10 billion for every person in the
world) are manufactured every year.
VLS (Very Lar!e Scale nte!ration)
"LS ("ltra Lar!e Scale nte!ration)
#S (#i!a$Scale nte!ration)
Variations of this versatile technolo!y are used for flat$panel
displays% micro$electro$mechanical systems (MEMS)% and
chips for &'A screenin!...
Slide 3-2
3.1 Introduction to Device Fabrication
()idation
Litho!raphy *
+tchin!
on mplantation
Annealin! *
&iffusion
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-3
Si ,afers

(
2
'
2
-
2
( or ./+(trichloroethylene)
0uart1 tube
2esistance$heated furnace
3low
controller
3.2 Oidation o! Silicon
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-4
3.2 Oidation o! Silicon
Si 4 (
2
Si(
2
Si 42-
2
( Si(
2
4 2-
2
&ry ()idation 5
,et ()idation 5
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-
E"#M$%E & T'o()tep Oidation
(a) How long does it take to grow 0.1m of dry oxide at 1000
o
C ?
(b) After step (a), how long will it take to grow an additional
0.m of oxide at !00
o
C in a wet ambient ?
Solution5
(a) "rom the #1000
o
C dry$ %&r'e in (lide )*), it takes .+ hr to
grow 0.1m of oxide.
(b) ,se the #!00
o
C wet$ %&r'e only. -t wo&ld ha'e taken 0..hr to
grow the 0.1 m oxide and ./hr to grow 0.) m oxide from
bare sili%on. 0he answer is ./hr10..hr 2 1..hr.
3.2 Oidation o! Silicon
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-!
3.3 %ithography
2esist /oatin!
(a)
&evelopment (c)
+tchin! and 2esist Strip (d)

6hotoresist
()ide


Si
+)posure
(b)



Si


Si

6ositive resist

'e!ative resist


Si



Si

(ptical
Lens system

&eep "ltraviolet Li!ht
6hotomas7 with
opa8ue and
clear patterns
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-"
3.3 %ithography
Photolithography Resolution Limit, *
9
3 k due to optical diffraction
9
,avelen!th needs to be minimi1ed. (2:; nm% 1<= nm%
1>? nm@)
9
k (<1) can be reduced will


9
Lar!e aperture% hi!h 8uality lens
9
Small e)posure field% step$and$repeat usin! AstepperB
9
(ptical pro)imity correction
9
6hase$shift mas7% etc.
9
Litho!raphy is difficult and e)pensive. .here can be :0
litho!raphy steps in an / process.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-#
3.3 %ithography
,afers are bein! loaded into a stepper in a clean room.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-$
%&oto Mas'
%&otoresist
(afer
(ater

(a)
())
%&oto Mas' %&oto Mas'
%&otoresist
(afer
%&otoresist
(afer
(ater

(a)
())
conventional dry litho!raphy wet or immersion litho!raphy
3.3.1 +et %ithography
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-1*
2eflective Aphotomas7B
Laser produced
plasma emittin!
+"V
Etre,e -. %ithography /13n, 'avelength0
'o suitable lens material at this
wavelen!th. (ptics is based on mirrors
with nm flatness.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-11
9
Electron 1ea, +riting 5 +lectron beam(s) scans and e)posed
electron resist on wafer. 2eady technolo!y with relatively low
throu!hput.
9
Electron $ro2ection %ithography 5 +)poses a comple)
pattern usin! mas7 and electron lens similar to
optical litho!raphy.
9
3ano(i,print 5 6atterns are etched into a durable material to
ma7e a Astamp.B .his stamp is pressed into a li8uid film over
the wafer surface. Li8uid is hardened with "V to create an
imprint of the fine patterns.
1eyond Optical %ithography
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-12
3.4 $attern Tran)!er5Etching
Isotropic etching Anisotropic etching
Si(
2
Si(
2
Si(
2

(1)

(2)

(=)
photoresist
p h o t o r e s i s t
Si(
2
( 1 )

( 2 )

photoresist
p h o t o r e s i s t
Si(
2
Si(
2
( = )
(a) sotropic wet etchin! (b) Anisotropic dry etchin!.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-13
3.4 $attern Tran)!er5Etching
/ross$section View .op View
*eactive(Ion Etching Sy)te,)
#as nlet
23
Vacuum
,afers
#as Caffle
23
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-14
3.4 $attern Tran)!er5Etching
Dry Etching /al)o 6no'n a) $la),a Etching7 or
*eactive(Ion Etching0 is anisotropic.
9
Silicon and its compounds can be etched by plasmas
containin! 3.
9
Aluminum can be etched by /l.
9
Some concerns 5
$ Selectivity and +nd$6oint &etection
$ 6lasma 6rocess$nduced &ama!e or ,afer /har!in!
&ama!e and Antenna +ffect
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-1
Scanning electron ,icro)cope vie' o! a pla),a(etched
8.19 , pattern in polycry)talline )ilicon !il,.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-1!
3.: Doping
3.5.1 Ion Implantation
9
.he dominant dopin! method
9
+)cellent control of dose (cm
$2
)
9
#ood control of implant depth with ener!y (DeV to EeV)
9
2epairin! crystal dama!e and dopant activation re8uires
annealin!% which can cause dopant diffusion and loss of
depth control.
&opant ions
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-1"
3.5.1 Ion Implantation
Sche,atic o! an Ion I,planter
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-1#
3.5.1 Ion implantation
6hosphorous density
profile after
implantation
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-1$
3.5.1 Ion Implantation
Model o! I,plantation Doping $ro!ile /;au))ian0
2 2
2 F ) (
) ( 2
) (
3 3 x
i
e
3
4
x 4

4
i
5 dose (cm
$2
)
3 5 ran!e or depth
3 5 spread or si!ma
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-2*
Other Doping Method)
9
;a)(Source Doping 5 3or e)ample% dope Si with 6
usin! 6(/l
=
.
9
Solid(Source Doping 5 &opant diffuses from a doped
solid film (Si#e or o)ide) into Si.
9
In(Situ Doping 5 &opant is introduced while a Si
film is bein! deposited.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-21
3.9 Dopant Di!!u)ion
5t x
o
e
5t
4
t x 4
: F
2
) % (

4 5 4
d
or 4
a
(cm
$=
)
4
o
5 dopant atoms per cm
2
t 5 diffusion time
5 5 diffusivity% is the appro)imate distance of
dopant diffusion
5t
p$type Si
Si(
2
n$type
diffusion layer
Gunction depth
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-22
3.9 Dopant Di!!u)ion
9
Some applications need
very deep Hunctions (hi!h
0% lon! t). (thers need
very shallow Hunctions
(low 0% short t).
9
5 increases with
increasin! temperature.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-23
3.9 Dopant Di!!u)ion
Shallo' <unction and *apid Ther,al #nnealing
9
After ion implantation% thermal annealin! is re8uired. 3urnace
annealin! ta7es minutes and causes too much diffusion of dopants
for some applications.
9
n rapid thermal annealin! (2.A)% the wafer is heated to hi!h
temperature in seconds by a ban7 of heat lamps.
9
n flash annealin! (100mS) and laser annealin! (I1uS)% dopant
ddiffusion is practically eliminated.

Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-24
3.= Thin(Fil, Depo)ition
Three >ind) o! Solid
/rystalline 6olycrystalline
+)ample5
Silicon wafer
.hin film of Si or metal.
.hin film of
Si(
2
or Si
=
'
:
.
Amorphous
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-2
3.= Thin(Fil, Depo)ition
9
Advanced E(S3+. !ate dielectric
9
6oly$Si film for transistor !ates
9
Eetal layers for interconnects
9
&ielectric between metal layers
9
+ncapsulation of /

+)amples of thin films in inte!rated circuits
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-2!
3.7.1 Sputtering

.ar!et material
deposited on wafer
S i , a f e r
on (Ar
4
)

Sputterin! tar!et
Atoms sputtered out of the tar!et
Sche,atic Illu)tration o! Sputtering $roce))
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-2"
3.7.2 hemical !apor "eposition #!"$
.hin film is formed from !as phase components.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-2#
So,e Che,ical *eaction) o! C.D
6oly$Si 5 Si-
:
(!) Si (s) 4 2-
2
(!)
Si=': 5 =Si-
2
/l
2
(!)4:'-
=
(!) Si
=
'
:
(s)4J-/l(!)4J-
2
(!)
Si(2 5 Si-
:
(!) 4 (
2
(!) Si(
2
(s) 4 2-
2
(!)
or
Si-
2
/l
2
(!)42'
2
( (!) Si(
2
(s)42-/l (!)42'
2
(!)

Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-2$
.wo types of /V& e8uipment5
9
LP!" #Lo% Pressure !"$ 5 #ood uniformity.
"sed for poly$Si% o)ide% nitride.
9
P&!" #Plasma &nhanced !"$ 5 Low temperature
process and hi!h deposition rate. "sed for o)ide%
nitride% etc.
3.7.2 hemical !apor "eposition #!"$
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-3*
Si ,afers
0uart1 tube

2esistance$heated furnace
6ressure sensor

#as control
Source
!ases

6ump
.rap

e)haust .o

system
L6/V& Systems
3.7.2 hemical !apor "eposition #!"$
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-31
3.7.2 hemical !apor "eposition #!"$
6+/V& Systems
/old ,all 6arallel 6late
-ot ,all 6arallel 6late
6ump
6lasma +lectrodes
6ower leads
,afers
#as
nlet
,afers #as nHection
2in!
6ump
-eater /oil
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Si(
2
Si(
2

Substrate
Si(
2
Si(
2

Substrate
& p i ' i l m

(b)
Substrate

Substrate
&pi 'ilm

(a)
Si Si
Si Si
Slide 3-32
3.7.3 &pita(y /Depo)ition o! Single(Cry)talline Fil,0
+pita)y
Selective +pita)y
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-33
3.? Interconnect 5 The 1ac6(end $roce))

&opant diffusion re!ion
Si

Si)
2

Al$/u

(a)
Si
diffusion re!ion
/oSi
2
*etal 1
*etal 2
*etal 3
&ielectric
&ielectric

+ncapsulation


(b)
&ielectric
via or plu!
silicide
Al or /u
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-34
SEM& Multi(%evel Interconnect /a!ter re,oving the dielectric0
3.? Interconnect 5 The 1ac6(end $roce))
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-3
Copper Interconnect
9
Al interconnect is prone to voids formation by
electromi!ration.
9
/u has e)cellent electromi!ration reliability
and :0K lower resistance than Al.
9
Cecause dry etchin! of copper is difficult (copper
etchin! products tend to be non$volatile)% copper
patterns are defined by a da,a)cene process.
3.? Interconnect 5 The 1ac6(end $roce))
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-3!
dielectric
dielectric dielectric
dielectric
/u
/u
liner
liner
(a) (b)
(c) (d)
Copper Da,a)cene $roce))
9
/hemical$Eechanical
6olishin! (/E6)
removes unwanted
materials.
9
Carrier liner prevents
/u diffusion.
3.? Interconnect 5 The 1ac6(end $roce))
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-3"
3.? Interconnect 5 The 1ac6(end $roce))
$lanari@ation
9
A flat surface is hi!hly desirable for subse8uent
litho!raphy and etchin!.
9
/E6 (/hemical$Eechanical 6olishin!) is used
to planari1e each layer of dielectric in the
interconnect system. Also used in the front$end
process.
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-3#
3.A Te)ting7 #))e,bly7 and Buali!ication
9
,afer acceptance test
9
&ie sortin!
9
,afer sawin! or laser cuttin!
9
6ac7a!in!
9
3lip$chip solder bump technolo!y
9
Eulti$chip modules
9
Curn$in
9
3inal test
9
0ualification
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-3$
3.18 Chapter Su,,ary5# Device Fabrication Ea,ple
,afer
()idation
Litho!raphy
+tchin!
Annealin! *
&iffusion
Al
Sputterin!
(0)

6ositive resist
Si(2

6$Si

6$Si
Si(2
6$Si
Eas7
"V
Si(2 Si(2
Si(2 Si(2
Si(2 Si(2
6$Si
6
'
4
Si(2 Si(2
6
'
4
6$Si
Si(2 Si(2
6
'
4
Eas7
Al
2esist
Si(2 Si(2
6
'
4
( 1 )
(2)
(:)
Arsenic implantation
A l
"V
(?)
(=)
(>)
(J)
(;)
(<)
Si(2 Si(2
6
'
4
Si(2 Si(2
6
'
4
(10)
Si(
2
Si(
2
6
'
4
(11)
Si(2 Si(2
6
'
4
(12)
Si(2 Si(2
6
'
4
(1=)
Al
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Al
Al
Al
Al
Al
6hotoresist
Au
Au
wire
6lastic pac7a!e
metal leads
Si(2
A l
"V
Litho!raphy
(0)

6ositive resist
Si(2

6$Si

6$Si
Si(2
6$Si
Eas7
"V
Si(2 Si(2
Si(2 Si(2
Si(2 Si(2
6$Si
6
'
4
Si(2 Si(2
6
'
4
6$Si
Si(2 Si(2
6
'
4
Eas7
Al
2esist
Si(2 Si(2
6
'
4
( 1 )
(2)
(:)
Arsenic implantation
A l
"V
(?)
(=)
(>)
(J)
(;)
(<)
Si(2 Si(2
6
'
4
Si(2 Si(2
6
'
4
(10)
Si(
2
Si(
2
6
'
4
(11)
Si(2 Si(2
6
'
4
(12)
Si(2 Si(2
6
'
4
(1=)
Al
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Al
Al
Al
Al
Al
6hotoresist
Au
Au
wire
6lastic pac7a!e
metal leads
Si(2
A l
"V
on
mplantation
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Slide 3-4*
Eetal
etchin!
/V&
nitride
deposition
Litho!raphy
and etchin!
Cac7 Side
millin!
Cac7 side
metalli1ation
&icin!% wire bondin!%
and pac7a!in!
3.18 Chapter Su,,ary5# Device Fabrication Ea,ple
(0)

6ositive resist
Si(2

6$Si

6$Si
Si(2
6$Si
Eas7
"V
Si(2 Si(2
Si(2 Si(2
Si(2 Si(2
6$Si
6
'
4
Si(2 Si(2
6
'
4
6$Si
Si(2 Si(2
6
'
4
Eas7
Al
2esis t
Si(2 Si(2
6
'
4
( 1 )
(2)
(:)
Arsenic implantation
A l
"V
(?)
(=)
(>)
(J)
(;)
(<)
Si(2 Si(2
6
'
4
Si(2 Si(2
6
'
4
(10)
Si(
2
Si(
2
6
'
4
(11)
Si(2 Si(2
6
'
4
(12)
Si(2 Si(2
6
'
4
(1=)
Al
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Al
Al
Al
Al
Al
6hotoresist
Au
Au
wire
6lastic pac7a!e
metal leads
Si(2
A l
(0)

6ositive resist
Si(2

6$Si

6$Si
Si(2
6$Si
Eas7
"V
Si(2 Si(2
Si(2 Si(2
Si(2 Si(2
6$Si
6
'
4
Si(2 Si(2
6
'
4
6$Si
Si(2 Si(2
6
'
4
Eas7
Al
2esist
Si(2 Si(2
6
'
4
( 1 )
(2)
(:)
Arsenic implantation
A l
"V
(?)
(=)
(>)
(J)
(;)
(<)
Si(2 Si(2
6
'
4
Si(2 Si(2
6
'
4
(10)
Si(
2
Si(
2
6
'
4
(11)
Si(2 Si(2
6
'
4
(12)
Si(2 Si(2
6
'
4
(1=)
Al
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Si
=
'
:
Al
Al
Al
Al
Al
6hotoresist
Au
Au
wire
6lastic pac7a!e
metal leads
Si(2
A l
Modern Semiconductor Devices for Integrated Circuits (C. Hu)