18/08/2014 B.I.T.S.

Pilani (January 2006)

Analog and Digital VLSI Design
EEE C443
An Overview of VLSI
18/08/2014 B.I.T.S. Pilani (January 2006)
Why VLSI?
More portability at all system levels
Decreased power consumption
Higher reliability due to better on-chip
interconnects
Higher speed
Manufacturing cost reduction and
scalability
18/08/2014 B.I.T.S. Pilani (January 2006)
The Making of a Chip
Architecture
Abstraction (Behavioural)
Logic
Transistor
Physical
18/08/2014 B.I.T.S. Pilani (January 2006)
Design Manufacturing Process
Customer specs leading to a feasibility
study and process choice
Design Review, DRC, P&R leading to mask
generation
Wafer fabrication and testing, prototype
packaging and testing
Volume packaging, packaged chip testing
and final delivery

18/08/2014 B.I.T.S. Pilani (January 2006)
Design Methodologies
Top Down realising the desired
behaviour by partitioning into
interconnection of desired sub-behaviours
Bottom Up realising desired behaviour
by interconnecting available
parts/components
Mixed mixture of the above two and you
meet somewhere inbetween
18/08/2014 B.I.T.S. Pilani (January 2006)
CMOS circuits
Consists of nMOS and pMOS transistors
together
Use pull-up and pull-down networks to
realise given function
Called complementary because???
18/08/2014 B.I.T.S. Pilani (January 2006)
Realisation Methods
Field Programmable Gate Arrays
Sea Of Gates
Gate Arrays
Standard Cells
Full Custom
18/08/2014 B.I.T.S. Pilani (January 2006)
Gate Arrays
Prefabricated wafers with I/O stages
defined
Regular arrangement of transistors and
interconnect channels
Short turn-around time
Economical in medium quantities
18/08/2014 B.I.T.S. Pilani (January 2006)
Sea of Gates
Prefabricated wafers with I/O stages
defined
Regular arrangement of transistors only
and no interconnect channels
Short turn-around time
Economical in medium quantities
18/08/2014 B.I.T.S. Pilani (January 2006)
Standard Cells
Complete fabrication process
Predefined libraries of logic functions
Long turn-around time
Economical at high quantities
More flexible than previously discussed
technologies
18/08/2014 B.I.T.S. Pilani (January 2006)
Full Custom Design
Complete fabrication process
Infinite flexibility under given constraints
Very long design and turn around time
Very efficient use of silicon real estate
18/08/2014 B.I.T.S. Pilani (January 2006)
Multi-Metal I
18/08/2014 B.I.T.S. Pilani (January 2006)
Multi-Metal II
18/08/2014 B.I.T.S. Pilani (January 2006)
Opteron Dual Core
18/08/2014 B.I.T.S. Pilani (January 2006)
Wire Bonding