1

EE462L, Spring 2014

Isolated Firing Circuit for
H-Bridge Inverter

(partially pre-Fall 2009 approach)
2
Isolation is needed because we have three separate
MOSFET source nodes, and these three nodes are
ground references for the respective firing circuits
One logic
signal
toggles
A+,A
One logic
signal
toggles
B+,B
Vdc
(source of power delivered to load)
Load
A
+
B
+
A

B

Local ground
reference for A
+
firing circuit
Local ground
reference for B
+
firing circuit
Local ground
reference for B

firing circuit
Local ground
reference for A

firing circuit
S
S
S
S
!
3



8 5
Comp

1 4

270k





V
tri
V
cont
V
cont
270k
1k
1.5k
1.5k
V(A+,A)
12V
from DC-DC chip

+12V
from DC-DC chip

Common (0V) from DC-DC chip

+12V
12V
Comparator Gives V(A+,A)
wrt. Common (0V)
V
cont
> V
tri
V
cont
< V
tri
+24V
0V
V
cont
> V
tri
V
cont
< V
tri
Use V(A+,A) wrt. 12V
Output of the Comparator Chip
Since the comparator
compares signals that can be
either positive or negative, the
comparator must be powered
by V supply
4



8 5
Comp

1 4

270k





V
tri
V
cont
V
cont
270k
1k
1.5k
1.5k
V(B+,B)
12V
from DC-DC chip

+12V
from DC-DC chip

Common (0V) from DC-DC chip

+12V
12V
Comparator Gives V(B+,B)
wrt. Common (0V)
V
cont
> V
tri
V
cont
< V
tri
+24V
0V
V
cont
> V
tri
V
cont
< V
tri
Use V(B+,B) wrt. 12V
Output of the Comparator Chip
Since the comparator
compares signals that
can be either positive or
negative, the
comparator must be
powered by V supply
5


AC wall wart
(marked with yellow paint)
DC
wall
wart
V(A+,A)
control
signal
V(B+,B)
control
signal
Reference (is 12V
from DC-DC chip)
The control signals at the open-circuited output
of the PWM control circuit are +24V, or 0V
When V(A+,A) is 24V,
MOSFET A+ is on,
MOSFET A is off
When V(A+,A) is 0V,
MOSFET A+ is off,
MOSFET A is on
MOSFETs B+ and B work
the same way with V(B+,B)
6


Figure 14. Output control voltage V(A
+
,A

) on top, and V(B

+
,B

) on bottom, with respect

to protoboard 12V reference, with m
a
> 0 (the situation shown is where V
cont
is negative)


Figure 13. Output control voltage V(A
+
,A

) on top, and V(B

+
,B

) on bottom, with respect

to protoboard 12V reference, with m
a
> 0 (the situation shown is where V
cont
is positive)
Save screen
snapshot #3
0V
+24V
0V
+24V
0V
+24V
0V
+24V
Look for symmetry of
pulse centers
Look for symmetry of
pulse centers
7

O ne firing circuit for each MOSFET , with each firing
circuit mounted on a separate protoboard . Protoboards
A

and B

can share a power supply and ground . A
+

and B
+
must each use separate power supplies and
grounds . Do not connect any of these grounds to the
ground of the control circuit.
O
+
O


( see Figure 2 for connections )
Powered by + 12V that is isolated from the
PWM control circuit
10k
0.1F
10 1 . 2 k
MOSFET

G D S
100k
5 4

Opto

8 1
5 4

Dri ver

8 1
Outl ine of
protoboard
A
+
and B
+
use inverting drivers
(1426s) . A

and B

use non -
inverting d rivers (1427s) . The
optocouplers provide an additional
inversion.
g reen
g reen
g reen
blue for A
+
,B
+
,
violet for A

,B


blue
blue
red
blue
Grounds ( isolated
from control circuit )
Wait until
next week

Switching diode
14mA
Optocoupler is current-
controlled. Gate current
turns on the transistor,
which pulls down the
collector voltage.
Isolating
barrier
Once the MOSFET is
connected, this
asymmetrical circuit will
add blanking by making
the turn-on slower than
the turn-off. (blanking is
the opposite of overlap)
Overlap is the time that
A
+
and A

are
simultaneously on,
which should be avoided.
Hence, some blanking
(time between one
turning off and the other
turning on) is desirable.
8
14mA from
control circuit
10k
+12V
+
V
driver
= 0V

Isolating
barrier
14mA to Opto Input Yields 0V to Input of Driver Chip,
so Inverting Driver Chip Turns MOSFET ON

To
driver
1.2mA (will pull down V
driver
to zero)
Spec. sheet current transfer ratio
0.2 to 0.3 (times 14mA)
!
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10k
+12V
+
V
driver
= 12V

0mA
Isolating
barrier
0mA to Opto Input Yields 12V to Input of Driver Chip, so
Inverting Driver Chip Turns MOSFET OFF
To
driver
0mA from
control circuit
!
10

A
+
Firing
A

Firing
B
+
Firing
B

Firing

Control Circuit from Previous Lab
Jack for
DC wall
wart
Figure 2. Physical layout of firing circuits
(A
+
opto and driver are powered by a +12V isolated DC converter chip. Likewise, B+ is powered
by another +12V isolated DC converter chip. A

and B

are powered by the DC wall wart.)

Individual protoboard for
each firing circuit
Optically-isolated firing
circuits. Mount drivers
near the MOSFETs
O
+
O

O
+
O

O
+
O

O
+
O

V(A
+
,A

) V(B
+
,B

)
12Vdc
regulated
blue
blue
blue
violet violet
Jack for
AC wall
wart
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We use the control signals to send 14ma through
optocouplers on each of the four firing circuit boards
A+ and A are
daisy chained
B+ and B are
daisy chained
(for complementary
outputs)
So, each 14mA control signal passes through two optocouplers in series
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24V control signals from the comparators, less 3.2V drop across two
series optocoupler LEDs, and with 14mA, requires about 1.5k of
resistance in series with the daisy-chained optocouplers
With 14mA, the LED of each optocoupler has about 1.6V drop
If applied half the time, 24V across a 1.5k resistor would produce
about 0.2W. So, it is a good idea to size up to W resistors.
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Thus, you use W series resistors between the
comparator chip and the output terminals

(For control electronics wiring with solid
#22 wire, use green for ground, red for
+12V
dc
, violet for 12V
dc
, and blue for
all others)
Figure 7. PWM inverter control circuit
(note be sure to use the wiring color code to
make troubleshooting easier)

8 5
Op Amp
1 4
0.01F
(freq. control)
500
trimmer
7 1
Waveform Gen.
8 14
1k
1k
0.01F
100k
Approx
22kHz
triangle
wave
Filtered and
buffered
triangle wave
High-pass filter to
block DC
8 5
Comp
1 4
1.5k, W
270k
1.5k, W
1k
1k
270k
+12Vdc regulated from 2W,
DC converter chip
12Vdc
regulated from
2W, DC
converter chip
V(A
+
,A

) V(B
+
,B

)

V
cont

V
cont

red
green
blue
blue
blue
violet
blue
violet
violet
violet
green
red
red
green
The IC is upside
down to minimize
wiring clutter
These W resistors can get hot - keep them off
the surface of the protoboard
10k
9.53k
1k
trimmer
V
cont

blue
V
cont

60Hz AC signal from AC wall
wart and 500 potentiometer
Protoboard common connected to 0V output pin
2W, DC converter chip
See Appendix for IC pin configurations
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Layout of inverter control circuit and isolated firing circuits


AC wall wart
(marked with yellow paint)
DC
wall
wart
A
+
A

B
+
B

No MOSFETs connected yet (i.e., the drivers are open-circuited)
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Keep the 0.1F capacitors
across the drivers to prevent
driver failure

Use the same pattern for B+
and B

One DC converter chip feeds
A+

Another DC converter chip
feeds B+

Wall wart feeds A and B



DC converter chip
feeds A
+
circuit
Inverting driver
for A
+
(1426s)
Non-inverting driver
for A

(1427s)
Wall wart feeds A

circuit
1
2
V

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f
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D
C

c
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r

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p

1
2
V

r
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f
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w
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w
a
r
t

g
r
o
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f
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p
i
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D
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o
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r
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w
a
r
t

Zoom-in view of A+ and
A isolated firing circuits
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wall
wart
input
chip
output
+ +

Side view of A+ and A isolated firing circuit and single 12V
isolated DC-DC converter chip that powers A+
Socket each single DC-DC converter chip,
using one half of an 8-pin SIP socket.
Carefully break an 8-pin SIP socket in
half. Do this by clamping on one-half
with your long-nose pliers, and then
bending the other half down with your
fingers. It should be a clean break.
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V(A
+
,A

)



Opto A
+

output

Save screen
snapshot #1
0.5V
3.2V
Input and Output Voltages of Optocoupler
V
cont
= 0 (i.e., m
a
= 0) in this Snapshot
12V
0V
Opto Input (the 1.5k resistor drops the voltage
from 24V to 3.2V)
As expected, the opto
output is inverted
This phototransistor turn off delay will limit
your PWM operating frequency
Phototransistor
turning on
Phototransistor
turning off
Look for Symmetry Among all Four Circuits
!
Different time-constants to avoid shoot-through
(i.e. to provide a dead-time)
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Look for Nearly Perfect Alignment Between V(A+,A) Signal to
Optocoupler, and Output of A+ Inverting Driver Chip




V(A
+
,A

)


A
+
driver
output

In
phase
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Look for Nearly Perfect Out of Phase Alignment Between V(A+,A)
Signal to Optocoupler, and Output of A Non-Inverting Driver Chip




V(A
+
,A

)


A

driver
output

Out of
phase
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Now the present circuit based on PCBs:
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Key new component: IRS21844
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IRS21844
High output
Low output
Actual pinout
22
IRS21844
Blanking time and isolation already integrated in a single IC