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VLSI Implementation Of Adders

Full Adder Implementation

Full Adder Implementation
Carry Ripple Adder
Given two n-bit numbers (a(n-
1),a(n-2),a(n-3),,a(0)) and (b(n-1),b(n-
A full adder adds three bits (a,b,c), where
a and b are data inputs and c is the
carry-in bit. It outputs a sum bit s and a
carry-out bit co
Using FA in Building Ripple Carry Adder
Critical Path in K-bit Ripple Carry Adder
Example : Realize the logic function f = w + xyz
using 4 bit RCA
Conditions and Outcomes
2s Complement Adder With Provision For
Detecting Conditions And Exceptions
Analysis of Carry Propagation
The length of a carry chain is the number of digit positions from where the carry is
generated upto and including where it is finally absorbed. A carry chain of length
0 means no carry production and a chain of length 1 means that carry is
absorbed in the next position.
Analysis of Carry Propagation
Expected length of worst case carry chain in a K-bit Addition
with random operands is upper bounded by log
Carry Lookahead Adders
Some interesting facts about carry
a(j) b(j) c(j) c(j+1)
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 1
If a(j) = b(j) then
c(j+1) = a(j) = b(j)
If a(j) <> b(j) then
c(j+1) = c(j)
Carry Lookahead Circuit
a(j) b(j) c(j+1) Status (x(j+1))
0 0 0 Kill (k)
0 1 c(j) Propagate (p)
1 0 c(j) Propagate (p)
1 1 1 Generate (g)
Unrolling the Carry Recurrence
4 bit carry
network with full
look ahead
4 bit Look Ahead Carry Generator
4 bit look ahead carry
generator with P and
G signals for the full
16 bit Carry Lookahead Adder using four 4 bit CLA
Adder and one 4 bit Lookhead Carry Generator
64 bit Carry Lookahead Adder using 16 4 bit
Adders and 5 Lookahead Carry Generators
Simple Carry Skip Adders
Worst case propagation delay through carry skip adder is 9.5 stages (17 gate levels) of
propagation compared to 16 stages (32 gate levels) for 16 bit RCA
Multilevel Carry Skip Adder
Allows carry to skip over several blocks at once. A carry that would need 3
time units to skip these 3 blocks in a single level skip adder can now do so in
1 time unit.
Multilevel Carry Skip Adder
Carry Select Adders
Two Level Carry Select Adder built out
of K/4 bit adders
Carry Save Adder
Given three n-bit numbers x, y and z.
The circuit computes a n-bit number u and
a (n+1)-bit number v such that
x+y+z = u + v.
Carry Save Addition - Example
Tree of Carry Save Adders Reducing 7 Numbers
into 2
Using Daddas Strategy
to add seven 6 digit