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UNIT III
Real - Time Operating
Systems
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Example: engine control
Tasks:
spark control
crankshaft sensing
fuel/air mixture
oxygen sensor
filter
engine
controller
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Task graphs
Tasks may have data
dependencies---must
execute in certain order.
Task graph shows
data/control
dependencies between
processes.
Task: connected set of
processes.
Task set: One or more
tasks.
P3
P1 P2
P4
P5
P6
task 1 task 2
task set
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Communication between tasks
Task graph assumes that
all processes in each task
run at the same rate,
tasks do not
communicate.
In reality, some amount of
inter-task communication
is necessary.
Its hard to require
immediate response for
multi-rate communication.
MPEG
system
layer
MPEG
audio
MPEG
video
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State of a process
A process can be in
one of three states:
executing on the CPU;
ready to run;
waiting for data.
executing
ready waiting
gets data
and CPU
needs
data
gets data
needs data
preempted
gets
CPU
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Buggy cooperative multitasking system
Void process 1 ()
{
If(input 1==0)
{
subA();
}
Else
{
subB();
Switch();S
}
}
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Process2 ()
{
X =global 1; // global 1 is input to the process
While(x<500)
x= aproc(global2); // subroutine does its work
Switch();
}
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Processes and operating
systems
Scheduling policies:
RMS;
EDF.
Scheduling modeling assumptions.
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Rate monotonic scheduling
RMS (Liu and Layland): widely-used,
analyzable scheduling policy.
Analysis is known as Rate Monotonic
Analysis (RMA).
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RMA model
All process run on single CPU.
Zero context switch time.
No data dependencies between
processes.
Process execution time is constant.
Deadline is at end of period.
Highest-priority ready process runs.
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Rate-monotonic analysis
Response time: time required to finish
process.
Critical instant: scheduling state that gives
worst response time.
Critical instant occurs when all higher-
priority processes are ready to execute.
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RMS priorities
Optimal (fixed) priority assignment:
shortest-period process gets highest priority;
priority inversely proportional to period;
break ties arbitrarily.
No fixed-priority scheme does better.
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RMS CPU utilization, contd.
RMS cannot use 100% of CPU, even with
zero context switch overhead.
Must keep idle cycles available to handle
worst-case scenario.
However, RMS guarantees all processes
will always meet their deadlines.
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RMS implementation
Efficient implementation:
scan processes;
choose highest-priority active process.
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Earliest-deadline-first
scheduling
EDF: dynamic priority scheduling scheme.
Process closest to its deadline has highest
priority.
Requires recalculating processes at every
timer interrupt.
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EDF analysis
EDF can use 100% of CPU.
But EDF may fail to miss a deadline.
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EDF implementation
On each timer interrupt:
compute time to deadline;
choose process closest to deadline.
Generally considered too expensive to use
in practice.
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EARLIEST DEADLINE FIRST SCHEDULING


CONSIDER THE FOLLOWING PROCESSES

PROCESS EXECUTION TIME PERIOD
P1 1 3
P2 1 4
P3 2 5

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P1=3,1 P2=4,1 P3=5,3
TIME RUNNING PROCESS DEADLINE
0 P1
1 P2
2 P3 P1
3 P3 P2
4 P1 P3
5 P2 P1
6 P1
7 P3 P2
8 P3 P1
9 P1 P3

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P1=3,1 P2=4,1 P3=5,3
TIME RUNNING PROCESS DEADLINE
10 P2
11 P3 P1,P2
12 P3 P1
13 P1 P2
14 P2 P1,P3
15 P1 P2
16 P2
17 P3 P1
18 P3 P1

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Fixing scheduling problems
What if your set of processes is
unschedulable?
Change deadlines in requirements.
Reduce execution times of processes.
Get a faster CPU.
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Priority inversion
Priority inversion: low-priority process
keeps high-priority process from running.
Improper use of system resources can
cause scheduling problems:
Low-priority process grabs I/O device.
High-priority device needs I/O device, but
cant get it until low-priority process is done.
Can cause deadlock.
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Solving priority inversion
Give priorities to system resources.
Have process inherit the priority of a
resource that it requests.
Low-priority process inherits priority of device
if higher.
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Data dependencies
Data dependencies
allow us to improve
utilization.
Restrict combination of
processes that can run
simultaneously.
P1 and P2 cant run
simultaneously.
P1
P2
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Context-switching time
Non-zero context switch time can push
limits of a tight schedule.
Hard to calculate effects---depends on
order of context switches.
In practice, OS context switch overhead is
small (hundreds of clock cycles) relative to
many common task periods (ms ms).
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Interprocess communication
Interprocess communication (IPC): OS
provides mechanisms so that processes
can pass data.
Two types of communications:
blocking: sending process waits for response;
non-blocking: sending process continues.
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IPC styles
Shared memory:
processes have some memory in common;
must cooperate to avoid destroying/missing
messages.
Message passing:
processes send messages along a
communication channel---no common
address space.
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Shared memory
Shared memory on a bus:
CPU 1 CPU 2
memory
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Race condition in shared
memory
Problem when two CPUs try to write the
same location:
CPU 1 reads flag and sees 0.
CPU 2 reads flag and sees 0.
CPU 1 sets flag to one and writes location.
CPU 2 sets flag to one and overwrites
location.
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Critical regions
Critical region: section of code that cannot
be interrupted by another process.
Examples:
writing shared memory;
accessing I/O device.
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Message passing
Message passing on a network:
CPU 1 CPU 2
message message
message
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Process data dependencies
One process may not
be able to start until
another finishes.
Data dependencies
defined in a task
graph.
All processes in one
task run at the same
rate.
P1 P2
P3
P4
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INTERPROCESS COMMUNICATION MECHANISMS
SIGNALS POSIX
Signal Description
SIGABRT
Abnormal termination signal such as
issued by the abort() function.
SIGALRM
Timeout signal such as issued by the
alarm() function.
SIGHUP
Death of session leader, or hangup
detected on controlling terminal.
SIGILL
Detection of an invalid hardware
instruction. Note that if a second fault
occurs while your process is in a signal
handler for this fault, the process will be
terminated.
SIGINT Interactive attention signal (Break).
SIGKILL
Termination signal should be used only
for emergency situations. This signal
cannot be caught or ignored.
SIGPIPE
Attempt to write on a pipe with no
readers.
SIGQUIT Interactive termination signal.
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INTERPROCESS COMMUNICATION MECHANISMS
SIGNALS
Signal Description
SIGSEGV
Detection of an invalid memory reference.
Note that if a second fault occurs while
your process is in a signal handler for this
fault, the process will be terminated.
SIGSTOP
Stop process (the default). This signal
cannot be caught or ignored.
SIGSYS Bad argument to system call.
SIGTERM Termination signal.
SIGUSR1 Reserved as application-defined signal 1.
SIGUSR2 Reserved as application-defined signal 2.
SIGWINCH Window size changed.
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CPU power consumption
Most modern CPUs are designed with
power consumption in mind to some
degree.
Power vs. energy:
heat depends on power consumption;
battery life depends on energy consumption.
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CMOS power consumption
Voltage drops: power consumption
proportional to V
2
.
Toggling: more activity means more
power.
Leakage: basic circuit characteristics; can
be eliminated by disconnecting power.
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CPU power-saving strategies
Reduce power supply voltage.
Run at lower clock frequency.
Disable function units with control signals
when not in use.
Disconnect parts from power supply when
not in use.
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low power features
Parallel execution units---longer idle shutdown
times.
Multiple data widths:
16-bit ALU vs. 40-bit ALU.
Instruction caches minimizes main memory
accesses.
Power management:
Function unit idle detection.
Memory idle detection.

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Power management styles
Static power management: does not
depend on CPU activity.
Example: user-activated power-down mode.
Dynamic power management: based on
CPU activity.
Example: disabling off function units.
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Power optimization
Power management: determining how
system resources are scheduled/used to
control power consumption.
OS can manage for power just as it
manages for time.
OS reduces power by shutting down units.
May have partial shutdown modes.
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Power management and
performance
Power management and performance are
often at odds.
Entering power-down mode consumes
energy,
time.
Leaving power-down mode consumes
energy,
time.
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Simple power management
policies
Request-driven: power up once request is
received. Adds delay to response.
Predictive shutdown: try to predict how
long you have before next request.
May start up in advance of request in
anticipation of a new request.
If you predict wrong, you will incur additional
delay while starting up.
Ex :- pagers
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Probabilistic shutdown
Assume service requests are probabilistic.
Optimize expected values:
power consumption;
response time.
Simple probabilistic: shut down after time
T
on
, turn back on after waiting for T
off
.

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Advanced Configuration and
Power Interface
ACPI: open standard for power
management services.
Hardware platform
device
drivers
ACPI BIOS
OS kernel
applications
power
management
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ACPI global power states
Five basic global power states
G3: mechanical off
G2: soft off
S1: low wake-up latency with no loss of context
S2: low latency with loss of CPU/cache state
S3: low latency with loss of all state except memory
S4: lowest-power state with all devices off
G1: sleeping state
G0: working state
Legacy state