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Stacks and Queues

CS1251 Computer Organization Carl Hamacher

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Stack
Data Structure

0
. . .

first word

Last-In-First-Out Pushdown Stack Pointer (SP)


Push Pop

SP

top element
. . .

Register

Stack
BOTTOM

Operations

. . .

2k-1

last word

Memory

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Stack Operations
Push

Add new item to top of stack SP decremented before move

ADD #-1,SP MOVE ITEM,(SP)

Pop

Remove item from top of stack SP incremented after move

MOVE (SP),ITEM ADD #1,SP

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Other Addressing Modes


Autodecrement (Push)

Register Indirect Contents of register automatically decremented before accessing the operand
Register Indirect Contents of register automatically incremented after accessing the operand

MOVE ITEM,-(SP)

Autoincrement (Pop)

MOVE (SP)+,ITEM

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Stack Overflow
Check for stack limits before push and pop Compare src,dst

SAFEPUSH COMPARE TOP,SP BLEZ FULLERROR MOVE ITEM,-(SP)

SAFEPOP

[dst] - [src] Condition Codes

COMPARE BOTTOM,SP BGTZ EMPTYERROR MOVE (SP)+,ITEM

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Queue
Data Structure

0
. . .

first word

First-In-First-Out
OUT

Two Pointers

IN OUT Append Remove

Queue
IN

. . .

Operations

. . .

2k-1

last word

Memory

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Subroutines
Reusable subtask Operations

Call
Store contents of the PC in the LINK register Branch to the target address

Return

Branch to the address contained in the LINK register

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Nesting Subroutines
Subsequent subroutine calls destroy return address in LINK register Last subroutine returns to subroutine that called it

Retrun address are last-in-first-out Call pushes PC onto stack Return pops return address off stack into PC

Use Processor Stack to store return addresses


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Parameter Passing
Program passes parameters to subroutine Subroutine returns parameters to calling program Passing Methods

Memory Registers Processor Stack

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Parameter Passing via Registers


Calling Program
MOVE MOVE CALL MOVE N,R1 #NUM1,R2 LISTADD R0,SUM R0 R1 R2 R3 0 n NUM1 Accumulator Counter Pointer

Subroutine
LISTADD CLEAR LOOP ADD DEC BGTZ RETURN R0 (R2)+,R0 R1 LOOP

SUM N NUM1
. . .

NUMn

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Parameter Passing via Stack


MOVE MOVE CALL MOVE ADD LISTADD MvMult MOVE MOVE CLEAR LOOP ADD DEC BGTZ MOVE MvMult RETURN
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#NUM1,-(SP) N,-(SP) LISTADD 1(SP),SUM #2,SP R0-R2,-(SP) 4(SP),R1 5(SP),R2 R0 (R2)+,R0 R1 LOOP R0,5(SP) (SP)+,R0-R2

Level 4

[R2]
[R1] [R0]

Level 3 Level 2 Level 1

Return address n NUM1 / SUM

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Stack Frame
Private workspace for subroutine

Created at subroutine call Contains parameters and local variables Freed up when subroutine returns
General purpose register Fixed during subroutine execution Provides easy access to parameters and variables

Frame Pointer (FP)


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Example Processor: ARM


Advanced RISC Machines (ARM) Limited

http://www.arm.com/
PlayStation Portable Nintendo DS iPod

ARM Powered Products


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Register Structure
31 0

R0 R1
. . .

General Purpose Registers

R14

(PC) R15

Program Counter

Status Register N Z

C V

...

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Instruction Format
Condition OP code Rn Rd Other info Rm

Assembly Language

RTN

OPcode Rd,Rn,Rm ADD R0,R2,R4

R0 [R2] + [R4]

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Instruction Set
See Appendix B

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Addressing Modes
Name Immediate Register Absolute (Direct) Syntax #Value Ri LOC Addressing Function Operand = Value EA = Ri EA = LOC

Pre-indexed, with Immediate offset


Post-indexed, with Immediate offset Relative

[Rn,#offset] EA = [Rn] + offset


[Rn],#offset EA = [Rn]; Rn [Rn] + offset Location EA = Location = [PC] + offset

EA = Effective Address
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Program for Adding Numbers


R0 0 n NUM1 Next Number Accumulator Counter Pointer

LDR LDR MOV LOOP LDR ADD SUBS BGT STR

R1,N R2,POINTER R0,#0 R3,[R2],#4 R0,R0,R3 R1,R1,#1 LOOP R0,SUM

R1 R2 R3

SUM N NUM1
. . .

NUMn

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Performance Equation
Processor Execution Time (T) Number of Machine Language Instructions (N) Average Steps per Machine Instruction (S) Clock Rate (R)

NS T R

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CISC vs RISC
Complex Instruction Set Computers (CISC)

Smaller N Larger S
Larger N Smaller S Easier to Pipeline

Reduced Instruction Set Computers (RISC)


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Questions?

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