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NAND NOR
NOT
XNOR (or Equivalence) Table 1.3: All possible binary Boolean functions
XOR
Law
Karnaugh
map(K-map)
It allows a digital designer to convert an AND function to an equivalent OR function and vice versa. (ab)=a+b (a+b)=ab
possible AND set of input values If there are two input values, x and y, there are four possible minterms: xy, xy, xy, xy
Implicants(PI) Essential Prime Implicants(EPI): groups which include cells that covered by only one group.
some patterns of input values will never occur, it is called dont care condition. We can treat the dont care values as either 0 or 1, whichever makes it easier to group the minterms.
buffer: to boost the current of input to a higher level Tri-state buffer: it has a data input, just like the regular buffer, but also an enable input, E.
If
Buffers:
Regular buffers(simply buffers): for boosting the current Tri-state buffers: enable, high-impedance
chooses one of its data inputs and passes it through to its output. Select signals are needed for select a data input
Figure 1.9 (b) Schematic representation with an active high enable signals
Figure 1.9 (c) Schematic representation with an active low enable signals
Decoder
It
accepts a value and decodes it. It has n inputs and 2n outputs, numbered from 0 to 2n1.
Figure 1.11 (b) Schematic representation with an active high enable signals
Page 19, Figure 1.11 (c) Schematic representation with an active low enable signals
Encoder
It
is the exact opposite of the decoder. It receives 2n inputs and outputs an nbit value corresponding to the input value.
Figure 1.12 (b) Schematic representation with an active high enable signals
Figure 1.12 (c) Schematic representation with an active low enable signals
Priority encoder
The
encoder works if zero or one inputs are active, but fails. A priority encoder works just like a regular encoder, with one exception, Whenever more than one input is active, the output is set to corresponding to the highest active input.
Figure 1.13 (b) and (c) The other 4-to-2 priority encoder and its truth table
Comparator
It
compares two n-bit binary values to determine which is greater, or if they are equal.
Figure 1.16 n-bit comparator constructed using 1-bit comparators with propagated inputs
Adder
Adders
are most commonly used, not only to perform addition, but also to perform subtraction, multiplication, and division.
Half
Full subtracter
A
doing this, a CPU may use a parallel adder for addition and subtraction.
Memory
It
is a group of circuit used to store data. Address inputs Data lines Classes of memory chips depending on volatility
ROM
RAM
Clock
has one input, D, and a clock input. The value of D becomes output, Q, after some delay. LD signal: It must be high as the clock changes from 0 to 1 in order for the data to be loaded into the F-F.
Figure 1.27 Positive level triggered D latch with set and clear
stores a binary value and, when signaled to do so, arithmetically increases or decreases its value. Ripple counter Up/down counter